MA-22424-1: mxc: vpu: h1: Use fixed-length types in ioctl parameters

To support 32bit application, we should use fixed-length types in ioctl
parameters, specifically avoid using the type long and unsigned long.

remove some unused ioctl cmd.
clear some building warning.

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Reviewed-by: TaoJiang <tao.jiang_2@nxp.com>
This commit is contained in:
Ming Qian 2024-05-14 11:31:09 +09:00
parent 16dd4e050e
commit 08d3e59a62
2 changed files with 26 additions and 33 deletions

View File

@ -142,7 +142,7 @@ typedef struct {
u32 reg_corrupt;
struct semaphore core_suspend_sem;
volatile u8 *hwregs;
void __iomem *hwregs;
struct fasync_struct *async_queue;
unsigned int mirror_regs[512];
struct device *dev;
@ -189,7 +189,7 @@ static int hantro_h1_clk_disable(struct device *dev)
static int hantro_h1_ctrlblk_reset(struct device *dev)
{
volatile u8 *iobase;
void __iomem *iobase;
u32 val;
if (hx280enc_data.skip_blkctrl)
@ -197,7 +197,7 @@ static int hantro_h1_ctrlblk_reset(struct device *dev)
//config H1
hantro_h1_clk_enable(dev);
iobase = (volatile u8 *)ioremap(BLK_CTL_BASE, 0x10000);
iobase = ioremap(BLK_CTL_BASE, 0x10000);
val = ioread32(iobase);
val &= (~0x4);
@ -272,7 +272,7 @@ static int CheckEncIrq(hx280enc_t *dev)
return rdy;
}
unsigned int WaitEncReady(hx280enc_t *dev)
static unsigned int WaitEncReady(hx280enc_t *dev)
{
u32 irq_status, is_write1_clr;
int i;
@ -306,7 +306,7 @@ unsigned int WaitEncReady(hx280enc_t *dev)
return 0;
}
int CheckCoreOccupation(hx280enc_t *dev, struct file *filp)
static int CheckCoreOccupation(hx280enc_t *dev, struct file *filp)
{
int ret = 0;
unsigned long flags;
@ -322,7 +322,7 @@ int CheckCoreOccupation(hx280enc_t *dev, struct file *filp)
return ret;
}
int GetWorkableCore(hx280enc_t *dev, struct file *filp)
static int GetWorkableCore(hx280enc_t *dev, struct file *filp)
{
int ret = 0;
@ -334,7 +334,7 @@ int GetWorkableCore(hx280enc_t *dev, struct file *filp)
return ret;
}
long ReserveEncoder(hx280enc_t *dev, struct file *filp)
static long ReserveEncoder(hx280enc_t *dev, struct file *filp)
{
/* lock a core that has specified core id*/
if (wait_event_interruptible(enc_hw_queue, GetWorkableCore(dev, filp) != 0))
@ -343,7 +343,7 @@ long ReserveEncoder(hx280enc_t *dev, struct file *filp)
return 0;
}
void ReleaseEncoder(hx280enc_t *dev, struct file *filp)
static void ReleaseEncoder(hx280enc_t *dev, struct file *filp)
{
unsigned long flags;
@ -362,11 +362,11 @@ void ReleaseEncoder(hx280enc_t *dev, struct file *filp)
wake_up_interruptible_all(&enc_hw_queue);
}
static long EncRefreshRegs(hx280enc_t *dev, unsigned int *regs)
static long EncRefreshRegs(hx280enc_t *dev, u32 *regs)
{
long ret;
ret = copy_to_user(regs, dev->mirror_regs, dev->iosize);
ret = copy_to_user((void __user *)regs, dev->mirror_regs, dev->iosize);
if (ret) {
PDEBUG("%s: copy_to_user failed, returned %li\n", __func__, ret);
return -EFAULT;
@ -392,7 +392,7 @@ static int hx280enc_write_regs(struct enc_regs_buffer *regs)
}
reg_buf = &dev->mirror_regs[regs->offset / 4];
ret = copy_from_user((void *)reg_buf, (void *)regs->regs, regs->size);
ret = copy_from_user((void *)reg_buf, (void __user *)regs->regs, regs->size);
if (ret)
return ret;
@ -427,7 +427,7 @@ static int hx280enc_read_regs(struct enc_regs_buffer *regs)
for (i = 0; i < regs->size / 4; i++)
reg_buf[i] = ioread32((dev->hwregs + regs->offset) + i * 4);
ret = copy_to_user((void *)regs->regs, (void *)reg_buf, regs->size);
ret = copy_to_user((void __user *)regs->regs, (void *)reg_buf, regs->size);
return ret;
}
@ -453,18 +453,18 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
* "write" is reversed
*/
if (_IOC_DIR(cmd) & _IOC_READ)
err = !access_ok((void *) arg, _IOC_SIZE(cmd));
err = !access_ok((void __user *)arg, _IOC_SIZE(cmd));
else if (_IOC_DIR(cmd) & _IOC_WRITE)
err = !access_ok((void *) arg, _IOC_SIZE(cmd));
err = !access_ok((void __user *)arg, _IOC_SIZE(cmd));
if (err)
return -EFAULT;
switch (_IOC_NR(cmd)) {
case _IOC_NR(HX280ENC_IOCGHWOFFSET):
__put_user(hx280enc_data.iobaseaddr, (unsigned long *) arg);
__put_user(hx280enc_data.iobaseaddr, (u32 __user *)arg);
break;
case _IOC_NR(HX280ENC_IOCGHWIOSIZE):
__put_user(hx280enc_data.iosize, (unsigned int *) arg);
__put_user(hx280enc_data.iosize, (u32 __user *)arg);
break;
case _IOC_NR(HX280ENC_IOCH_ENC_RESERVE): {
int ret;
@ -478,7 +478,7 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
ReleaseEncoder(&hx280enc_data, filp);
break;
case _IOC_NR(HX280ENC_IOCG_CORE_WAIT): {
unsigned int *regs = (unsigned int *)arg;
u32 *regs = (u32 *)arg;
unsigned int ret1, ret2;
ret1 = WaitEncReady(&hx280enc_data);
@ -492,7 +492,7 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
case _IOC_NR(HX280ENC_IOC_WRITE_REGS): {
struct enc_regs_buffer regs;
err = copy_from_user(&regs, (void *)arg, sizeof(regs));
err = copy_from_user(&regs, (void __user *)arg, sizeof(regs));
if (err)
return err;
@ -504,7 +504,7 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
case _IOC_NR(HX280ENC_IOC_READ_REGS): {
struct enc_regs_buffer regs;
err = copy_from_user(&regs, (void *)arg, sizeof(regs));
err = copy_from_user(&regs, (void __user *)arg, sizeof(regs));
if (err)
return err;
@ -769,7 +769,7 @@ static int ReserveIO(void)
PDEBUG(KERN_INFO "hx280enc: failed to reserve HW regs\n");
return -EBUSY;
}
hx280enc_data.hwregs = (volatile u8 *) ioremap(hx280enc_data.iobaseaddr, hx280enc_data.iosize);
hx280enc_data.hwregs = ioremap(hx280enc_data.iobaseaddr, hx280enc_data.iosize);
if (hx280enc_data.hwregs == NULL) {
PDEBUG(KERN_INFO "hx280enc: failed to ioremap HW regs\n");
ReleaseIO();
@ -804,7 +804,7 @@ static void ReleaseIO(void)
if (hx280enc_data.is_valid == 0)
return;
if (hx280enc_data.hwregs)
iounmap((void *) hx280enc_data.hwregs);
iounmap(hx280enc_data.hwregs);
release_mem_region(hx280enc_data.iobaseaddr, hx280enc_data.iosize);
}

View File

@ -64,19 +64,12 @@ struct mirror_regs {
* #define HX280ENC_IOCGBUFBUSADDRESS _IOR(HX280ENC_IOC_MAGIC, 1, unsigned long *)
* #define HX280ENC_IOCGBUFSIZE _IOR(HX280ENC_IOC_MAGIC, 2, unsigned int *)
*/
#define HX280ENC_IOCGHWOFFSET _IOR(HX280ENC_IOC_MAGIC, 3, unsigned long *)
#define HX280ENC_IOCGHWIOSIZE _IOR(HX280ENC_IOC_MAGIC, 4, unsigned int *)
#define HX280ENC_IOC_CLI _IO(HX280ENC_IOC_MAGIC, 5)
#define HX280ENC_IOC_STI _IO(HX280ENC_IOC_MAGIC, 6)
#define HX280ENC_IOCXVIRT2BUS _IOWR(HX280ENC_IOC_MAGIC, 7, unsigned long *)
#define HX280ENC_IOCGHWOFFSET _IOR(HX280ENC_IOC_MAGIC, 3, u32 *)
#define HX280ENC_IOCGHWIOSIZE _IOR(HX280ENC_IOC_MAGIC, 4, u32 *)
#define HX280ENC_IOCHARDRESET _IO(HX280ENC_IOC_MAGIC, 8) /* debugging tool */
#define HX280ENC_IOCGSRAMOFFSET _IOR(HX280ENC_IOC_MAGIC, 9, unsigned long *)
#define HX280ENC_IOCGSRAMEIOSIZE _IOR(HX280ENC_IOC_MAGIC, 10, unsigned int *)
#define HX280ENC_IOCH_ENC_RESERVE _IOR(HX280ENC_IOC_MAGIC, 11, unsigned int *)
#define HX280ENC_IOCH_ENC_RELEASE _IOR(HX280ENC_IOC_MAGIC, 12, unsigned int *)
#define HX280ENC_IOCG_CORE_WAIT _IOR(HX280ENC_IOC_MAGIC, 13, unsigned int *)
#define HX280ENC_IOCH_ENC_RESERVE _IOR(HX280ENC_IOC_MAGIC, 11, u32 *)
#define HX280ENC_IOCH_ENC_RELEASE _IOR(HX280ENC_IOC_MAGIC, 12, u32 *)
#define HX280ENC_IOCG_CORE_WAIT _IOR(HX280ENC_IOC_MAGIC, 13, u32 *)
#define HX280ENC_IOC_MAXNR 30
#endif /* !_UAPI_HX280ENC_H_ */