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MA-22424-1: mxc: vpu: h1: Use fixed-length types in ioctl parameters
To support 32bit application, we should use fixed-length types in ioctl parameters, specifically avoid using the type long and unsigned long. remove some unused ioctl cmd. clear some building warning. Signed-off-by: Ming Qian <ming.qian@nxp.com> Reviewed-by: TaoJiang <tao.jiang_2@nxp.com>
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16dd4e050e
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08d3e59a62
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@ -142,7 +142,7 @@ typedef struct {
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u32 reg_corrupt;
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struct semaphore core_suspend_sem;
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volatile u8 *hwregs;
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void __iomem *hwregs;
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struct fasync_struct *async_queue;
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unsigned int mirror_regs[512];
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struct device *dev;
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@ -189,7 +189,7 @@ static int hantro_h1_clk_disable(struct device *dev)
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static int hantro_h1_ctrlblk_reset(struct device *dev)
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{
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volatile u8 *iobase;
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void __iomem *iobase;
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u32 val;
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if (hx280enc_data.skip_blkctrl)
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@ -197,7 +197,7 @@ static int hantro_h1_ctrlblk_reset(struct device *dev)
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//config H1
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hantro_h1_clk_enable(dev);
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iobase = (volatile u8 *)ioremap(BLK_CTL_BASE, 0x10000);
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iobase = ioremap(BLK_CTL_BASE, 0x10000);
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val = ioread32(iobase);
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val &= (~0x4);
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@ -272,7 +272,7 @@ static int CheckEncIrq(hx280enc_t *dev)
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return rdy;
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}
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unsigned int WaitEncReady(hx280enc_t *dev)
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static unsigned int WaitEncReady(hx280enc_t *dev)
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{
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u32 irq_status, is_write1_clr;
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int i;
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@ -306,7 +306,7 @@ unsigned int WaitEncReady(hx280enc_t *dev)
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return 0;
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}
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int CheckCoreOccupation(hx280enc_t *dev, struct file *filp)
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static int CheckCoreOccupation(hx280enc_t *dev, struct file *filp)
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{
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int ret = 0;
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unsigned long flags;
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@ -322,7 +322,7 @@ int CheckCoreOccupation(hx280enc_t *dev, struct file *filp)
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return ret;
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}
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int GetWorkableCore(hx280enc_t *dev, struct file *filp)
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static int GetWorkableCore(hx280enc_t *dev, struct file *filp)
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{
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int ret = 0;
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@ -334,7 +334,7 @@ int GetWorkableCore(hx280enc_t *dev, struct file *filp)
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return ret;
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}
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long ReserveEncoder(hx280enc_t *dev, struct file *filp)
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static long ReserveEncoder(hx280enc_t *dev, struct file *filp)
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{
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/* lock a core that has specified core id*/
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if (wait_event_interruptible(enc_hw_queue, GetWorkableCore(dev, filp) != 0))
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@ -343,7 +343,7 @@ long ReserveEncoder(hx280enc_t *dev, struct file *filp)
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return 0;
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}
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void ReleaseEncoder(hx280enc_t *dev, struct file *filp)
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static void ReleaseEncoder(hx280enc_t *dev, struct file *filp)
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{
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unsigned long flags;
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@ -362,11 +362,11 @@ void ReleaseEncoder(hx280enc_t *dev, struct file *filp)
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wake_up_interruptible_all(&enc_hw_queue);
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}
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static long EncRefreshRegs(hx280enc_t *dev, unsigned int *regs)
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static long EncRefreshRegs(hx280enc_t *dev, u32 *regs)
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{
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long ret;
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ret = copy_to_user(regs, dev->mirror_regs, dev->iosize);
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ret = copy_to_user((void __user *)regs, dev->mirror_regs, dev->iosize);
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if (ret) {
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PDEBUG("%s: copy_to_user failed, returned %li\n", __func__, ret);
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return -EFAULT;
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@ -392,7 +392,7 @@ static int hx280enc_write_regs(struct enc_regs_buffer *regs)
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}
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reg_buf = &dev->mirror_regs[regs->offset / 4];
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ret = copy_from_user((void *)reg_buf, (void *)regs->regs, regs->size);
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ret = copy_from_user((void *)reg_buf, (void __user *)regs->regs, regs->size);
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if (ret)
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return ret;
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@ -427,7 +427,7 @@ static int hx280enc_read_regs(struct enc_regs_buffer *regs)
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for (i = 0; i < regs->size / 4; i++)
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reg_buf[i] = ioread32((dev->hwregs + regs->offset) + i * 4);
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ret = copy_to_user((void *)regs->regs, (void *)reg_buf, regs->size);
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ret = copy_to_user((void __user *)regs->regs, (void *)reg_buf, regs->size);
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return ret;
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}
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@ -453,18 +453,18 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
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* "write" is reversed
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*/
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if (_IOC_DIR(cmd) & _IOC_READ)
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err = !access_ok((void *) arg, _IOC_SIZE(cmd));
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err = !access_ok((void __user *)arg, _IOC_SIZE(cmd));
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else if (_IOC_DIR(cmd) & _IOC_WRITE)
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err = !access_ok((void *) arg, _IOC_SIZE(cmd));
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err = !access_ok((void __user *)arg, _IOC_SIZE(cmd));
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if (err)
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return -EFAULT;
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switch (_IOC_NR(cmd)) {
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case _IOC_NR(HX280ENC_IOCGHWOFFSET):
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__put_user(hx280enc_data.iobaseaddr, (unsigned long *) arg);
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__put_user(hx280enc_data.iobaseaddr, (u32 __user *)arg);
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break;
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case _IOC_NR(HX280ENC_IOCGHWIOSIZE):
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__put_user(hx280enc_data.iosize, (unsigned int *) arg);
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__put_user(hx280enc_data.iosize, (u32 __user *)arg);
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break;
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case _IOC_NR(HX280ENC_IOCH_ENC_RESERVE): {
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int ret;
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@ -478,7 +478,7 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
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ReleaseEncoder(&hx280enc_data, filp);
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break;
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case _IOC_NR(HX280ENC_IOCG_CORE_WAIT): {
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unsigned int *regs = (unsigned int *)arg;
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u32 *regs = (u32 *)arg;
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unsigned int ret1, ret2;
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ret1 = WaitEncReady(&hx280enc_data);
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@ -492,7 +492,7 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
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case _IOC_NR(HX280ENC_IOC_WRITE_REGS): {
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struct enc_regs_buffer regs;
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err = copy_from_user(®s, (void *)arg, sizeof(regs));
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err = copy_from_user(®s, (void __user *)arg, sizeof(regs));
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if (err)
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return err;
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@ -504,7 +504,7 @@ static long hx280enc_ioctl(struct file *filp, unsigned int cmd, unsigned long ar
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case _IOC_NR(HX280ENC_IOC_READ_REGS): {
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struct enc_regs_buffer regs;
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err = copy_from_user(®s, (void *)arg, sizeof(regs));
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err = copy_from_user(®s, (void __user *)arg, sizeof(regs));
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if (err)
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return err;
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@ -769,7 +769,7 @@ static int ReserveIO(void)
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PDEBUG(KERN_INFO "hx280enc: failed to reserve HW regs\n");
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return -EBUSY;
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}
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hx280enc_data.hwregs = (volatile u8 *) ioremap(hx280enc_data.iobaseaddr, hx280enc_data.iosize);
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hx280enc_data.hwregs = ioremap(hx280enc_data.iobaseaddr, hx280enc_data.iosize);
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if (hx280enc_data.hwregs == NULL) {
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PDEBUG(KERN_INFO "hx280enc: failed to ioremap HW regs\n");
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ReleaseIO();
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@ -804,7 +804,7 @@ static void ReleaseIO(void)
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if (hx280enc_data.is_valid == 0)
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return;
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if (hx280enc_data.hwregs)
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iounmap((void *) hx280enc_data.hwregs);
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iounmap(hx280enc_data.hwregs);
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release_mem_region(hx280enc_data.iobaseaddr, hx280enc_data.iosize);
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}
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@ -64,19 +64,12 @@ struct mirror_regs {
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* #define HX280ENC_IOCGBUFBUSADDRESS _IOR(HX280ENC_IOC_MAGIC, 1, unsigned long *)
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* #define HX280ENC_IOCGBUFSIZE _IOR(HX280ENC_IOC_MAGIC, 2, unsigned int *)
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*/
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#define HX280ENC_IOCGHWOFFSET _IOR(HX280ENC_IOC_MAGIC, 3, unsigned long *)
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#define HX280ENC_IOCGHWIOSIZE _IOR(HX280ENC_IOC_MAGIC, 4, unsigned int *)
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#define HX280ENC_IOC_CLI _IO(HX280ENC_IOC_MAGIC, 5)
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#define HX280ENC_IOC_STI _IO(HX280ENC_IOC_MAGIC, 6)
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#define HX280ENC_IOCXVIRT2BUS _IOWR(HX280ENC_IOC_MAGIC, 7, unsigned long *)
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#define HX280ENC_IOCGHWOFFSET _IOR(HX280ENC_IOC_MAGIC, 3, u32 *)
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#define HX280ENC_IOCGHWIOSIZE _IOR(HX280ENC_IOC_MAGIC, 4, u32 *)
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#define HX280ENC_IOCHARDRESET _IO(HX280ENC_IOC_MAGIC, 8) /* debugging tool */
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#define HX280ENC_IOCGSRAMOFFSET _IOR(HX280ENC_IOC_MAGIC, 9, unsigned long *)
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#define HX280ENC_IOCGSRAMEIOSIZE _IOR(HX280ENC_IOC_MAGIC, 10, unsigned int *)
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#define HX280ENC_IOCH_ENC_RESERVE _IOR(HX280ENC_IOC_MAGIC, 11, unsigned int *)
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#define HX280ENC_IOCH_ENC_RELEASE _IOR(HX280ENC_IOC_MAGIC, 12, unsigned int *)
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#define HX280ENC_IOCG_CORE_WAIT _IOR(HX280ENC_IOC_MAGIC, 13, unsigned int *)
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#define HX280ENC_IOCH_ENC_RESERVE _IOR(HX280ENC_IOC_MAGIC, 11, u32 *)
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#define HX280ENC_IOCH_ENC_RELEASE _IOR(HX280ENC_IOC_MAGIC, 12, u32 *)
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#define HX280ENC_IOCG_CORE_WAIT _IOR(HX280ENC_IOC_MAGIC, 13, u32 *)
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#define HX280ENC_IOC_MAXNR 30
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#endif /* !_UAPI_HX280ENC_H_ */
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