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drm/amdgpu/pm: Fix the null pointer dereference for smu7

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[ Upstream commit c02c1960c9 ]

optimize the code to avoid pass a null pointer (hwmgr->backend)
to function smu7_update_edc_leakage_table.

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Ma Jun 2024-05-10 15:01:59 +08:00 committed by Greg Kroah-Hartman
parent 837ab17cee
commit 09544cd95c
1 changed files with 23 additions and 25 deletions
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18
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
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@ -2957,6 +2957,7 @@ static int smu7_update_edc_leakage_table(struct pp_hwmgr *hwmgr)
static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
{
struct amdgpu_device *adev = hwmgr->adev;
struct smu7_hwmgr *data;
int result = 0;
@ -2993,8 +2994,8 @@ static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
/* Initalize Dynamic State Adjustment Rule Settings */
result = phm_initializa_dynamic_state_adjustment_rule_settings(hwmgr);
if (0 == result) {
struct amdgpu_device *adev = hwmgr->adev;
if (result)
goto fail;
data->is_tlu_enabled = false;
@ -3015,18 +3016,15 @@ static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
hwmgr->platform_descriptor.clockStep.engineClock = 500;
hwmgr->platform_descriptor.clockStep.memoryClock = 500;
smu7_thermal_parameter_init(hwmgr);
} else {
/* Ignore return value in here, we are cleaning up a mess. */
smu7_hwmgr_backend_fini(hwmgr);
}
result = smu7_update_edc_leakage_table(hwmgr);
if (result) {
smu7_hwmgr_backend_fini(hwmgr);
return result;
}
if (result)
goto fail;
return 0;
fail:
smu7_hwmgr_backend_fini(hwmgr);
return result;
}
static int smu7_force_dpm_highest(struct pp_hwmgr *hwmgr)