MIRRORS/linux-imx
1
0
Fork 0
mirror of https://github.com/nxp-imx/linux-imx.git synced 2025-07-08 18:35:20 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

pinctrl: ocelot: fix system hang on level based interrupts

Browse Source 
commit 93b8ddc545 upstream.

The current implementation only calls chained_irq_enter() and
chained_irq_exit() if it detects pending interrupts.

```
for (i = 0; i < info->stride; i++) {
	uregmap_read(info->map, id_reg + 4 * i, &reg);
	if (!reg)
		continue;

	chained_irq_enter(parent_chip, desc);
```

However, in case of GPIO pin configured in level mode and the parent
controller configured in edge mode, GPIO interrupt might be lowered by the
hardware. In the result, if the interrupt is short enough, the parent
interrupt is still pending while the GPIO interrupt is cleared;
chained_irq_enter() never gets called and the system hangs trying to
service the parent interrupt.

Moving chained_irq_enter() and chained_irq_exit() outside the for loop
ensures that they are called even when GPIO interrupt is lowered by the
hardware.

The similar code with chained_irq_enter() / chained_irq_exit() functions
wrapping interrupt checking loop may be found in many other drivers:
```
grep -r -A 10 chained_irq_enter drivers/pinctrl
```

Cc: stable@vger.kernel.org
Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/20241012105743.12450-2-matsievskiysv@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sergey Matsievskiy 2024-10-12 13:57:43 +03:00 committed by Greg Kroah-Hartman
parent 481b477ab6
commit 20728e8628
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/pinctrl/pinctrl-ocelot.c
View File

@ -1962,21 +1962,21 @@ static void ocelot_irq_handler(struct irq_desc *desc)
unsigned int reg = 0, irq, i; unsigned int reg = 0, irq, i;
unsigned long irqs; unsigned long irqs;
chained_irq_enter(parent_chip, desc);
for (i = 0; i < info->stride; i++) { for (i = 0; i < info->stride; i++) {
regmap_read(info->map, id_reg + 4 * i, &reg); regmap_read(info->map, id_reg + 4 * i, &reg);
if (!reg) if (!reg)
continue; continue;
chained_irq_enter(parent_chip, desc);
irqs = reg; irqs = reg;
for_each_set_bit(irq, &irqs, for_each_set_bit(irq, &irqs,
min(32U, info->desc->npins - 32 * i)) min(32U, info->desc->npins - 32 * i))
generic_handle_domain_irq(chip->irq.domain, irq + 32 * i); generic_handle_domain_irq(chip->irq.domain, irq + 32 * i);
chained_irq_exit(parent_chip, desc);
} }
chained_irq_exit(parent_chip, desc);
} }
static int ocelot_gpiochip_register(struct platform_device *pdev, static int ocelot_gpiochip_register(struct platform_device *pdev,