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arm64: dts: imx8mp: Add TC9595 bridge on DH electronics i.MX8M Plus DHCOM

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Add TC9595 DSI-to-DPI and DSI-to-(e)DP bridge to
DH electronics i.MX8M Plus DHCOM SoM . The bridge
is populated on the SoM, but disabled by default
unless used for display output.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Marek Vasut 2023-05-15 18:24:24 +02:00 committed by Shawn Guo
parent 0c45fb7faf
commit 20d0b83e71
1 changed files with 55 additions and 0 deletions
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55
arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
View File

@ -232,6 +232,36 @@
sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay"; status = "okay";
tc_bridge: bridge@f {
compatible = "toshiba,tc9595", "toshiba,tc358767";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tc9595>;
reg = <0xf>;
clock-names = "ref";
clocks = <&clk IMX8MP_CLK_CLKOUT2>;
assigned-clocks = <&clk IMX8MP_CLK_CLKOUT2_SEL>,
<&clk IMX8MP_CLK_CLKOUT2>,
<&clk IMX8MP_AUDIO_PLL2_OUT>;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
assigned-clock-rates = <13000000>, <13000000>, <156000000>;
reset-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tc_bridge_in: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&dsi_out>;
};
};
};
};
pmic: pmic@25 { pmic: pmic@25 {
compatible = "nxp,pca9450c"; compatible = "nxp,pca9450c";
reg = <0x25>; reg = <0x25>;
@ -398,6 +428,22 @@
status = "okay"; status = "okay";
}; };
&mipi_dsi {
samsung,burst-clock-frequency = <160000000>;
samsung,esc-clock-frequency = <10000000>;
ports {
port@1 {
reg = <1>;
dsi_out: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&tc_bridge_in>;
};
};
};
};
&pwm1 { &pwm1 {
pinctrl-0 = <&pinctrl_pwm1>; pinctrl-0 = <&pinctrl_pwm1>;
pinctrl-names = "default"; pinctrl-names = "default";
@ -863,6 +909,15 @@
>; >;
}; };
pinctrl_tc9595: dhcom-tc9595-grp {
fsl,pins = <
/* RESET_DSIBRIDGE */
MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x40000146
/* DSI-CONV_INT Interrupt */
MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x141
>;
};
pinctrl_touch: dhcom-touch-grp { pinctrl_touch: dhcom-touch-grp {
fsl,pins = < fsl,pins = <
/* #TOUCH_INT */ /* #TOUCH_INT */