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arm64: dts: imx8mp: Fix pgc vpu locations

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[ Upstream commit 2f8405fb07 ]

The various pgv_vpu nodes have a mismatch between the value after
the @ symbol and what is referenced by 'reg' so reorder the nodes
to align.

Fixes: df680992dd ("arm64: dts: imx8mp: add vpu pgc nodes")
Suggested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewd-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Adam Ford 2024-06-19 05:10:44 -05:00 committed by Greg Kroah-Hartman
parent 713750aadb
commit 2e67d5cdc3
1 changed files with 28 additions and 27 deletions
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55
arch/arm64/boot/dts/freescale/imx8mp.dtsi
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@ -834,6 +834,12 @@
assigned-clock-rates = <800000000>, <400000000>;
};
pgc_vpumix: power-domain@8 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
};
pgc_gpu3d: power-domain@9 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_GPU3D>;
@ -849,6 +855,28 @@
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
};
pgc_vpu_g1: power-domain@11 {
#power-domain-cells = <0>;
power-domains = <&pgc_vpumix>;
reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
};
pgc_vpu_g2: power-domain@12 {
#power-domain-cells = <0>;
power-domains = <&pgc_vpumix>;
reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
};
pgc_vpu_vc8000e: power-domain@13 {
#power-domain-cells = <0>;
power-domains = <&pgc_vpumix>;
reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
};
pgc_hdmimix: power-domain@14 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>;
@ -886,33 +914,6 @@
reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>;
clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>;
};
pgc_vpumix: power-domain@19 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
};
pgc_vpu_g1: power-domain@20 {
#power-domain-cells = <0>;
power-domains = <&pgc_vpumix>;
reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
};
pgc_vpu_g2: power-domain@21 {
#power-domain-cells = <0>;
power-domains = <&pgc_vpumix>;
reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
};
pgc_vpu_vc8000e: power-domain@22 {
#power-domain-cells = <0>;
power-domains = <&pgc_vpumix>;
reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
};
};
};
};