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net: pcs: xpcs: fix the wrong register that was written back
commit93ef6ee5c2
upstream. The value is read from the register TXGBE_RX_GEN_CTL3, and it should be written back to TXGBE_RX_GEN_CTL3 when it changes some fields. Cc: stable@vger.kernel.org Fixes:f629acc6f2
("net: pcs: xpcs: support to switch mode for Wangxun NICs") Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com> Reported-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/20240924022857.865422-1-jiawenwu@trustnetic.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -109,7 +109,7 @@ static void txgbe_pma_config_1g(struct dw_xpcs *xpcs)
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txgbe_write_pma(xpcs, TXGBE_DFE_TAP_CTL0, 0);
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val = txgbe_read_pma(xpcs, TXGBE_RX_GEN_CTL3);
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val = u16_replace_bits(val, 0x4, TXGBE_RX_GEN_CTL3_LOS_TRSHLD0);
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txgbe_write_pma(xpcs, TXGBE_RX_EQ_ATTN_CTL, val);
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txgbe_write_pma(xpcs, TXGBE_RX_GEN_CTL3, val);
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txgbe_write_pma(xpcs, TXGBE_MPLLA_CTL0, 0x20);
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txgbe_write_pma(xpcs, TXGBE_MPLLA_CTL3, 0x46);
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