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MLK-11360-01 crypto: caam_snvs: add snvs clock management
caam_snvs driver involves snvs HP registers access that needs to enable snvs clock source. The patch add the clock management. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Dan Douglass <dan.douglass@freescale.com> (Vipul: Fixed merge conflicts) Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
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@ -456,18 +456,14 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
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value type: <u32>
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Definition: LP register offset. default it is 0x34.
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- clocks
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Usage: optional, required if SNVS LP RTC requires explicit
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enablement of clocks
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Value type: <prop_encoded-array>
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Definition: a clock specifier describing the clock required for
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enabling and disabling SNVS LP RTC.
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- clock-names
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Usage: optional, required if SNVS LP RTC requires explicit
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enablement of clocks
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Value type: <string>
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Definition: clock name string should be "snvs-rtc".
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- clocks
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies the source clock for
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snvs register access. If i.MX clk driver defines the clock node,
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it needs user to specify the clocks in device tree for all modules
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with snvs LP/HP registers access. The modules involved snvs LP/HP
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registers access are snvs-power key, snvs-rtc, and caam.
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EXAMPLE
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sec_mon_rtc_lp@1 {
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@ -51,12 +51,15 @@ static irqreturn_t snvs_secvio_interrupt(int irq, void *snvsdev)
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struct device *dev = snvsdev;
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struct snvs_secvio_drv_private *svpriv = dev_get_drvdata(dev);
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clk_enable(svpriv->clk);
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/* Check the HP secvio status register */
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svpriv->irqcause = rd_reg32(&svpriv->svregs->hp.secvio_status) &
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HP_SECVIOST_SECVIOMASK;
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if (!svpriv->irqcause)
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if (!svpriv->irqcause) {
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clk_disable(svpriv->clk);
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return IRQ_NONE;
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}
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/* Now ACK cause */
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clrsetbits_32(&svpriv->svregs->hp.secvio_status, 0, svpriv->irqcause);
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@ -66,6 +69,8 @@ static irqreturn_t snvs_secvio_interrupt(int irq, void *snvsdev)
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tasklet_schedule(&svpriv->irqtask[smp_processor_id()]);
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preempt_enable();
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clk_disable(svpriv->clk);
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return IRQ_HANDLED;
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}
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@ -176,6 +181,7 @@ static int snvs_secvio_remove(struct platform_device *pdev)
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svdev = &pdev->dev;
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svpriv = dev_get_drvdata(svdev);
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clk_enable(svpriv->clk);
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/* Set all sources to nonfatal */
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wr_reg32(&svpriv->svregs->hp.secvio_intcfg, 0);
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@ -183,6 +189,7 @@ static int snvs_secvio_remove(struct platform_device *pdev)
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for_each_possible_cpu(i)
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tasklet_kill(&svpriv->irqtask[i]);
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clk_disable_unprepare(svpriv->clk);
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free_irq(svpriv->irq, svdev);
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iounmap(svpriv->svregs);
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kfree(svpriv);
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@ -227,6 +234,12 @@ static int snvs_secvio_probe(struct platform_device *pdev)
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}
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svpriv->svregs = (struct snvs_full __force *)snvsregs;
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svpriv->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(svpriv->clk)) {
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dev_err(&pdev->dev, "can't get snvs clock\n");
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svpriv->clk = NULL;
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}
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/* Device data set up. Now init interrupt source descriptions */
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for (i = 0; i < MAX_SECVIO_SOURCES; i++) {
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svpriv->intsrc[i].intname = violation_src_name[i];
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@ -248,6 +261,7 @@ static int snvs_secvio_probe(struct platform_device *pdev)
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return -EINVAL;
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}
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clk_prepare_enable(svpriv->clk);
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/*
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* Configure all sources as fatal violations except LP section,
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* source #5 (typically used as an external tamper detect), and
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@ -263,6 +277,8 @@ static int snvs_secvio_probe(struct platform_device *pdev)
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dev_info(svdev, "violation handlers armed - %s state\n",
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snvs_ssm_state_name[hpstate]);
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clk_disable(svpriv->clk);
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return 0;
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}
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@ -55,6 +55,7 @@ struct snvs_secvio_drv_private {
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spinlock_t svlock ____cacheline_aligned;
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struct tasklet_struct irqtask[NR_CPUS];
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struct snvs_full __iomem *svregs; /* both HP and LP domains */
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struct clk *clk;
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int irq;
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u32 irqcause; /* stashed cause of violation interrupt */
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