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ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate

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[ Upstream commit 090c409457 ]

External clocks should be defined as zero-Hz clocks in the SoC .dtsi,
and overridden in the board .dts when present.

Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal
oscillator present on the APE6-EVM board.

Fixes: a76809a329 ("ARM: shmobile: r8a73a4: Common clock framework DT description")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Geert Uytterhoeven 2024-01-15 12:03:03 +01:00 committed by Sasha Levin
parent 9ade676d25
commit 6d4a320e16
2 changed files with 18 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts
View File

@ -209,6 +209,18 @@
status = "okay";
};
&extal1_clk {
clock-frequency = <26000000>;
};
&extal2_clk {
clock-frequency = <48000000>;
};
&extalr_clk {
clock-frequency = <32768>;
};
&pfc {
scifa0_pins: scifa0 {
groups = "scifa0_data";

9
arch/arm/boot/dts/renesas/r8a73a4.dtsi
View File

@ -450,17 +450,20 @@
extalr_clk: extalr {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
extal1_clk: extal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
extal2_clk: extal2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
fsiack_clk: fsiack {
compatible = "fixed-clock";