MIRRORS/linux-imx
1
0
Fork 0
mirror of https://github.com/nxp-imx/linux-imx.git synced 2026-01-27 12:35:36 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: dts: imx6qdl-kontron-samx6i: fix SPI0 chip selects

Browse Source 
There is a comment in the imx6q variant dtsi claiming that these
modules will have one more chip select than the imx6dl variant.
This is wrong. Ordinary GPIOs are used for chip selects and both
variants of the module share the very same PCB and both have this
GPIO routed to the SPI0_CS1# pin of the SMARC connector.

Fix it by moving the third chip select description to the common dtsi.

Fixes: 2125212785 ("ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Michael Walle 2024-06-17 11:13:33 +02:00 committed by Shawn Guo
parent 7324314624
commit 74e1c956a6
2 changed files with 4 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi
View File

@ -5,31 +5,8 @@
#include "imx6q.dtsi"
#include "imx6qdl-kontron-samx6i.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Kontron SMARC sAMX6i Quad/Dual";
compatible = "kontron,imx6q-samx6i", "fsl,imx6q";
};
/* Quad/Dual SoMs have 3 chip-select signals */
&ecspi4 {
cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>,
<&gpio3 29 GPIO_ACTIVE_LOW>,
<&gpio3 25 GPIO_ACTIVE_LOW>;
};
&pinctrl_ecspi4 {
fsl,pins = <
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
/* SPI4_IMX_CS2# - connected to internal flash */
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
/* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
/* SPI4_CS3# - connected to SMARC SPI0_CS1# */
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
>;
};

5
arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi
View File

@ -244,7 +244,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4>;
cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>,
<&gpio3 29 GPIO_ACTIVE_LOW>;
<&gpio3 29 GPIO_ACTIVE_LOW>,
<&gpio3 25 GPIO_ACTIVE_LOW>;
status = "okay";
/* default boot source: workaround #1 for errata ERR006282 */
@ -459,6 +460,8 @@
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
/* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
/* SPI4_CS3# - connected to SMARC SPI0_CS1# */
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
>;
};