MIRRORS/linux-imx
1
0
Fork 0
mirror of https://github.com/nxp-imx/linux-imx.git synced 2025-07-12 20:35:23 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

arm64: dts: qcom: sm8250: switch UFS QMP PHY to new style of bindings

Browse Source 
[ Upstream commit ba865bdcc6 ]

Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231205032552.1583336-8-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stable-dep-of: 154ed5ea32 ("arm64: dts: qcom: sm8250: add power-domain to UFS PHY")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2023-12-05 06:25:50 +03:00 committed by Greg Kroah-Hartman
parent 928691e768
commit cf2ca13549
1 changed files with 6 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@ -2169,7 +2169,7 @@
"jedec,ufs-2.0"; "jedec,ufs-2.0";
reg = <0 0x01d84000 0 0x3000>; reg = <0 0x01d84000 0 0x3000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufs_mem_phy_lanes>; phys = <&ufs_mem_phy>;
phy-names = "ufsphy"; phy-names = "ufsphy";
lanes-per-direction = <2>; lanes-per-direction = <2>;
#reset-cells = <1>; #reset-cells = <1>;
@ -2217,10 +2217,8 @@
ufs_mem_phy: phy@1d87000 { ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8250-qmp-ufs-phy"; compatible = "qcom,sm8250-qmp-ufs-phy";
reg = <0 0x01d87000 0 0x1c0>; reg = <0 0x01d87000 0 0x1000>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clock-names = "ref", clock-names = "ref",
"ref_aux"; "ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>, clocks = <&rpmhcc RPMH_CXO_CLK>,
@ -2228,16 +2226,10 @@
resets = <&ufs_mem_hc 0>; resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy"; reset-names = "ufsphy";
status = "disabled";
ufs_mem_phy_lanes: phy@1d87400 {
reg = <0 0x01d87400 0 0x16c>,
<0 0x01d87600 0 0x200>,
<0 0x01d87c00 0 0x200>,
<0 0x01d87800 0 0x16c>,
<0 0x01d87a00 0 0x200>;
#phy-cells = <0>; #phy-cells = <0>;
};
status = "disabled";
}; };
cryptobam: dma-controller@1dc4000 { cryptobam: dma-controller@1dc4000 {