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MLK-17674-2: CAAM SM : get base address from device tree
Remove hard coded value for base physical address. Use device tree to get this value. i.MX8 with seco is still not address since CAAM uses a private bus to access secure memory Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
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@ -305,6 +305,7 @@ static int caam_probe(struct platform_device *pdev)
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};
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struct device *dev;
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struct device_node *nprop, *np;
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struct resource res_regs;
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struct caam_ctrl __iomem *ctrl;
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struct caam_drv_private *ctrlpriv;
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u32 comp_params;
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@ -381,11 +382,25 @@ static int caam_probe(struct platform_device *pdev)
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goto disable_clocks;
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}
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ctrlpriv->sm_base = of_iomap(np, 0);
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/* Get CAAM SM registers base address from device tree */
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ret = of_address_to_resource(np, 0, &res_regs);
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if (ret) {
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dev_err(dev, "failed to retrieve registers base from device tree\n");
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ret = -ENODEV;
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goto disable_clocks;
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}
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ctrlpriv->sm_phy = res_regs.start;
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ctrlpriv->sm_base = devm_ioremap_resource(dev, &res_regs);
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if (IS_ERR(ctrlpriv->sm_base)) {
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ret = PTR_ERR(ctrlpriv->sm_base);
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goto disable_clocks;
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}
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if (!of_machine_is_compatible("fsl,imx8mq") &&
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!of_machine_is_compatible("fsl,imx8qm") &&
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!of_machine_is_compatible("fsl,imx8qxp")) {
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ctrlpriv->sm_size = 0x3fff;
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ctrlpriv->sm_size = resource_size(&res_regs);
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} else {
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ctrlpriv->sm_size = PG_SIZE_64K;
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}
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@ -92,6 +92,7 @@ struct caam_drv_private {
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struct caam_queue_if __iomem *qi; /* QI control region */
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struct caam_job_ring __iomem *jr[JOBR_MAX_COUNT]; /* JRs registers */
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dma_addr_t __iomem *sm_base; /* Secure memory storage base */
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phys_addr_t sm_phy; /* Secure memory storage physical */
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u32 sm_size;
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/*
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@ -1124,8 +1124,8 @@ int caam_sm_startup(struct platform_device *pdev)
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lpagedesc[page].pg_phys = (u8 *)0x20800000 +
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(smpriv->page_size * page);
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} else {
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/* FIXME: get base address from platform property... */
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lpagedesc[page].pg_phys = (u8 *)0x00100000 +
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lpagedesc[page].pg_phys =
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(u8 *) ctrlpriv->sm_phy +
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(smpriv->page_size * page);
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}
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lpagect++;
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