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net: stmmac: dwmac-loongson: Init ref and PTP clocks rate

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[ Upstream commit c70f316368 ]

Reference and PTP clocks rate of the Loongson GMAC devices is 125MHz.
(So is in the GNET devices which support is about to be added.) Set
the respective plat_stmmacenet_data field up in accordance with that
so to have the coalesce command and timestamping work correctly.

Fixes: 30bba69d7d ("stmmac: pci: Add dwmac support for Loongson")
Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn>
Signed-off-by: Yinggang Gu <guyinggang@loongson.cn>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Yanteng Si 2024-08-07 21:48:02 +08:00 committed by Greg Kroah-Hartman
parent 0a9445aa8e
commit f0525a641a
1 changed files with 3 additions and 0 deletions
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3
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
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@ -35,6 +35,9 @@ static int loongson_default_data(struct plat_stmmacenet_data *plat)
/* Disable RX queues routing by default */ /* Disable RX queues routing by default */
plat->rx_queues_cfg[0].pkt_route = 0x0; plat->rx_queues_cfg[0].pkt_route = 0x0;
plat->clk_ref_rate = 125000000;
plat->clk_ptp_rate = 125000000;
/* Default to phy auto-detection */ /* Default to phy auto-detection */
plat->phy_addr = -1; plat->phy_addr = -1;