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drm/amdgpu: Fix pci state save during mode-1 reset
[ Upstream commit74fa02c4a5
] Cache the PCI state before bus master is disabled. The saved state is later used for other cases like restoring config space after mode-2 reset. Fixes:5c03e5843e
("drm/amdgpu:add smu mode1/2 support for aldebaran") Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -4685,11 +4685,14 @@ int amdgpu_device_mode1_reset(struct amdgpu_device *adev)
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dev_info(adev->dev, "GPU mode1 reset\n");
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/* Cache the state before bus master disable. The saved config space
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* values are used in other cases like restore after mode-2 reset.
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*/
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amdgpu_device_cache_pci_state(adev->pdev);
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/* disable BM */
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pci_clear_master(adev->pdev);
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amdgpu_device_cache_pci_state(adev->pdev);
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if (amdgpu_dpm_is_mode1_reset_supported(adev)) {
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dev_info(adev->dev, "GPU smu mode1 reset\n");
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ret = amdgpu_dpm_mode1_reset(adev);
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