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clk: qcom: dispcc-sm8650: Update the GDSC flags

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[ Upstream commit 7de10ddbdb ]

Add missing POLL_CFG_GDSCR to the MDSS GDSC flags.

Fixes: 90114ca114 ("clk: qcom: add SM8550 DISPCC driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240717-dispcc-sm8550-fixes-v2-4-5c4a3128c40b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2024-07-17 13:04:31 +03:00 committed by Greg Kroah-Hartman
parent 65a25e42a4
commit ffb0ae195b
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/qcom/dispcc-sm8550.c
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@ -1611,7 +1611,7 @@ static struct gdsc mdss_gdsc = {
.name = "mdss_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = HW_CTRL | RETAIN_FF_ENABLE,
.flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE,
};
static struct gdsc mdss_int2_gdsc = {
@ -1620,7 +1620,7 @@ static struct gdsc mdss_int2_gdsc = {
.name = "mdss_int2_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = HW_CTRL | RETAIN_FF_ENABLE,
.flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE,
};
static struct clk_regmap *disp_cc_sm8550_clocks[] = {