Commit Graph

22 Commits

Author SHA1 Message Date
Vladimir Oltean
b31734ed04 net: phylink: add support for managed = "c73"
Phylink requires modifications to properly support the clause 73 autoneg
concepts for the following reason.

A MAC-side PCS (modeled as phylink_pcs) is, so far, considered to be a
PCS (aka top-most layer of a non-phylib PHY) which handles link modes
with optional C37 autoneg (BASE-X, SGMII, USXGMII). Those link modes are
encoded within a phylib-specific phy_interface_t data type, which is
either fixed or changes at runtime based on a phylib PHY's decision, or
based on phylink_choose_sfp_interface(). C37 autoneg changes some of the
parameters of the established phy_interface_t (speed, duplex, flow
control).

As opposed to that, C73 autoneg (for backplanes and SFP28 modules)
is not at the same level in the OSI layering, so that existing model may
or may not apply. In addition to negotiating speed, duplex, flow control,
it also provides a standard way of exchanging the phy_interface_t
selection with the link partner as well.

Actually we already have backplane link modes present in enum
ethtool_link_mode_bit_indices already (a data type exposed to UAPI, and
common for all drivers, whether or not they use phylib or phylink or do
their own PHY management). I would have wished for it not to be
necessary to encode the backplane link modes in phy_interface_t as well,
since this constitutes a duplication with the ethtool link modes.

But it seems that phy_interface_t has become baked into phylink, as a
legacy from phylib. For example, we may have phylib PHYs that use
firmware to configure the system interface for C73 AN/LT with a fixed
link mode (see PHY_INTERFACE_MODE_10GKR in aqr107_read_status()).
Thus, 10GBase-KR is both an ethtool link mode (visible to the remote
end), as well as a phy_interface_t, visible to an attached phylib PHY
(completely optional within phylink).

A second reason for duplicating the backplane link modes into
phy_interface_t is the need to present a sane API to MAC drivers when
they use a C73-capable PCS. Currently, for non-C73, that API is already
phy_interface_t centric (state->interface).

The problem with state->interface within mac_config() and pcs_config()
is that it isn't valid, and we don't have a good placeholder for its
initial value, either (C73 can advertise multiple link modes, and until
autoneg is resolved, none of them is active).

Choices for state->interface like PHY_INTERFACE_MODE_XGMII, XLGMII or
even PHY_INTERFACE_MODE_INTERNAL make sense when imagining the
phylink_pcs as a complete (non-phylib) backplane PHY, but they don't
make sense when taking into consideration that an Aquantia phylib PHY
might see this phy_interface_t value.

So, the proposal is to modify phylink to derive the state->interface
from the resolved C73 ethtool link mode, and to pass that to
mac_link_up() and pcs_link_up().

The initial state->interface will bear less importance. It can either be
PHY_INTERFACE_MODE_NA, or the backplane link mode that the phylink_pcs
is preconfigured for. If the former, phylink will compute and fill in
the phy_interface_t corresponding to the highest-priority supported link
mode, anyway. What is important is that MAC drivers know that they need
to ignore state->interface at mac_config() time, and for that, some
API differentiation is required.

Introduce managed = "c73", which is like managed = "in-band-status"
except for the differences highlighted above between C37 and C73
autoneg.

pcs_validate(), pcs_get_state(), pcs_config(), pcs_enable(), all of
these need to know if the link operates in C73 or not. But that info
isn't available, and modifying all function prototypes is extremely
noisy. So as a very dirty hack, modify struct phylink_pcs to carry
information from the phylink core to the PCS driver, instead of passing
that info as an argument to the phylink_pcs callbacks. Whether a link
uses C73 or not is not supposed to change at runtime, so cfg_link_an_mode
should be enough.

Actually, what is even worse is that mac_select_pcs() takes the
phy_interface_t as input, and as mentioned, that data type is an output
of the C73 autoneg. So we cannot select a phylink_pcs without changes to
the mac_select_pcs() mechanism, either. Again, we should pass the
cfg_link_an_mode as an argument, but to be less noisy, we opt for
passing it through struct phylink_config instead.

Link: https://lore.kernel.org/netdev/ZOXlpkbcAZ4okric@shell.armlinux.org.uk/
Link: https://lore.kernel.org/netdev/ZGIkGmyL8yL1q1zp@shell.armlinux.org.uk/
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2023-10-30 17:16:56 +08:00
Vladimir Oltean
8f4c822736 net: dsa: felix: introduce phy-mode = "10g-qxgmii" to replace "usxgmii"
The "USXGMII" mode that the Felix switch ports support on LS1028A is not
quite USXGMII, it is defined by the USXGMII multiport specification
document as 10G-QXGMII. It uses the same signaling as USXGMII, but it
multiplexes 4 ports over the link, resulting in a maximum speed of 2.5G
per port.

This change is needed in preparation for the lynx-10g driver on LS1028A,
which will make a more clear distinction between usxgmii (supported on
lane 0) and 10g-qxgmii (supported on lane 1). These protocols have their
configuration in different PCCR registers (PCCRB vs PCCR9).

We touch the entire kernel side: the phylib core, phylink, the Felix
switch driver, the Lynx PCS and the AQR412 driver. The existing
LS1028A-QDS device trees will continue to work with "usxgmii", and will
be updated to "10g-qxgmii" as a separate patch.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2023-10-30 17:16:55 +08:00
Gabor Juhos
83b5f0253b net: phy: Introduce PSGMII PHY interface mode
The PSGMII interface is similar to QSGMII. The main difference
is that the PSGMII interface combines five SGMII lines into a
single link while in QSGMII only four lines are combined.

Similarly to the QSGMII, this interface mode might also needs
special handling within the MAC driver.

It is commonly used by Qualcomm with their QCA807x PHY series and
modern WiSoC-s.

Add definitions for the PHY layer to allow to express this type
of connection between the MAC and PHY.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-14 08:12:53 +01:00
Randy Dunlap
a266ef69b8 Documentation: networking: correct spelling
Correct spelling problems for Documentation/networking/ as reported
by codespell.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-doc@vger.kernel.org
Cc: Jiri Pirko <jiri@nvidia.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Eric Dumazet <edumazet@google.com>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Paolo Abeni <pabeni@redhat.com>
Cc: netdev@vger.kernel.org
Link: https://lore.kernel.org/r/20230129231053.20863-5-rdunlap@infradead.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2023-01-31 13:00:47 +01:00
Casper Andersson
229a002759 docs: networking: phy: add missing space
Missing space between "pins'" and "strength"

Signed-off-by: Casper Andersson <casper.casan@gmail.com>
Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com>
Link: https://lore.kernel.org/r/20221004073242.304425-1-casper.casan@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-10-05 20:32:39 -07:00
Sean Anderson
05ad5d4581 net: phy: Add 1000BASE-KX interface mode
Add 1000BASE-KX interface mode. This 1G backplane ethernet as described in
clause 70. Clause 73 autonegotiation is mandatory, and only full duplex
operation is supported.

Although at the PMA level this interface mode is identical to
1000BASE-X, it uses a different form of in-band autonegation. This
justifies a separate interface mode, since the interface mode (along
with the MLO_AN_* autonegotiation mode) sets the type of autonegotiation
which will be used on a link. This results in more than just electrical
differences between the link modes.

With regard to 1000BASE-X, 1000BASE-KX holds a similar position to
SGMII: same signaling, but different autonegotiation. PCS drivers
(which typically handle in-band autonegotiation) may only support
1000BASE-X, and not 1000BASE-KX. Similarly, the phy mode is used to
configure serdes phys with phy_set_mode_ext. Due to the different
electrical standards (SFI or XFI vs Clause 70), they will likely want to
use different configuration. Adding a phy interface mode for
1000BASE-KX helps simplify configuration in these areas.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05 14:30:42 +01:00
Maxime Chevallier
5e61fe157a net: phy: Introduce QUSGMII PHY mode
The QUSGMII mode is a derivative of Cisco's USXGMII standard. This
standard is pretty similar to SGMII, but allows for faster speeds, and
has the build-in bits for Quad and Octa variants (like QSGMII).

The main difference with SGMII/QSGMII is that USXGMII/QUSGMII re-uses
the preamble to carry various information, named 'Extensions'.

As of today, the USXGMII standard only mentions the "PCH" extension,
which is used to convey timestamps, allowing in-band signaling of PTP
timestamps without having to modify the frame itself.

This commit adds support for that mode. When no extension is in use, it
behaves exactly like QSGMII, although it's not compatible with QSGMII.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22 13:46:26 +01:00
Jonathan Neuschäfer
9cc8ea99bf docs: networking: phy: Fix a typo
Write "to be operated" instead of "to be operate".

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20220610072809.352962-1-j.neuschaefer@gmx.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-13 23:12:44 -07:00
Russell King (Oracle)
b9241f5413 net: document SMII and correct phylink's new validation mechanism
SMII has not been documented in the kernel, but information on this PHY
interface mode has been recently found. Document it, and correct the
recently introduced phylink handling for this interface mode.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/E1mmfVl-0075nP-14@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-11-16 19:22:30 -08:00
Steen Hegelund
a56c286865 net: phy: Add 25G BASE-R interface mode
Add 25gbase-r phy interface mode

Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-06-12 13:08:57 -07:00
Jonathan Neuschäfer
bfdfe7fc1b docs: networking: phy: Improve placement of parenthesis
"either" is outside the parentheses, so the matching "or" should be too.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12 12:29:11 -08:00
Pavana Sharma
7331d1d462 net: phy: Add 5GBASER interface mode
Add 5GBASE-R phy interface mode

Signed-off-by: Pavana Sharma <pavana.sharma@digi.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16 14:15:12 -08:00
Heiner Kallweit
93e8990c24 net: phy: rename PHY_IGNORE_INTERRUPT to PHY_MAC_INTERRUPT
Some internal PHY's have their events like link change reported by the
MAC interrupt. We have PHY_IGNORE_INTERRUPT to deal with this scenario.
I'm not too happy with this name. We don't ignore interrupts, typically
there is no interrupt exposed at a PHY level. So let's rename it to
PHY_MAC_INTERRUPT. This is in line with phy_mac_interrupt(), which is
called from the MAC interrupt handler to handle PHY events.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-15 15:20:49 -08:00
Bjarni Jonasson
b1ae3587d1 net: phy: Add 100 base-x mode
Sparx-5 supports this mode and it is missing in the PHY core.

Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com>
Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-14 15:40:33 -08:00
Jonathan Neuschäfer
16eb0eb835 docs: networking: phy: s/2.5 times faster/2.5 times as fast/
2.5 times faster would be 3.5 Gbps (4.375 Gbaud after 8b/10b encoding).

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20201107220822.1291215-1-j.neuschaefer@gmx.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-09 17:28:06 -08:00
Jonathan Neuschäfer
52df1e564e docs: networking: phy: Rephrase paragraph for clarity
Let's make it a little easier to read.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-02-23 20:42:47 -08:00
Russell King
c114574ebf net: phy: add PHY_INTERFACE_MODE_10GBASER
Recent discussion has revealed that the use of PHY_INTERFACE_MODE_10GKR
is incorrect. Add a 10GBASE-R definition, document both the -R and -KR
versions, and the fact that 10GKR was used incorrectly.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-05 15:05:35 -08:00
Linus Torvalds
937d6eefc7 Here's the main documentation changes for 5.5:
- Various kerneldoc script enhancements.
 
  - More RST conversions; those are slowing down as we run out of things to
    convert, but we're a ways from done still.
 
  - Dan's "maintainer profile entry" work landed at last.  Now we just need
    to get maintainers to fill in the profiles...
 
  - A reworking of the parallel build setup to work better with a variety of
    systems (and to not take over huge systems entirely in particular).
 
  - The MAINTAINERS file is now converted to RST during the build.
    Hopefully nobody ever tries to print this thing, or they will need to
    load a lot of paper.
 
  - A script and documentation making it easy for maintainers to add Link:
    tags at commit time.
 
 Also included is the removal of a bunch of spurious CR characters.
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Merge tag 'docs-5.5a' of git://git.lwn.net/linux

Pull Documentation updates from Jonathan Corbet:
 "Here are the main documentation changes for 5.5:

   - Various kerneldoc script enhancements.

   - More RST conversions; those are slowing down as we run out of
     things to convert, but we're a ways from done still.

   - Dan's "maintainer profile entry" work landed at last. Now we just
     need to get maintainers to fill in the profiles...

   - A reworking of the parallel build setup to work better with a
     variety of systems (and to not take over huge systems entirely in
     particular).

   - The MAINTAINERS file is now converted to RST during the build.
     Hopefully nobody ever tries to print this thing, or they will need
     to load a lot of paper.

   - A script and documentation making it easy for maintainers to add
     Link: tags at commit time.

  Also included is the removal of a bunch of spurious CR characters"

* tag 'docs-5.5a' of git://git.lwn.net/linux: (91 commits)
  docs: remove a bunch of stray CRs
  docs: fix up the maintainer profile document
  libnvdimm, MAINTAINERS: Maintainer Entry Profile
  Maintainer Handbook: Maintainer Entry Profile
  MAINTAINERS: Reclaim the P: tag for Maintainer Entry Profile
  docs, parallelism: Rearrange how jobserver reservations are made
  docs, parallelism: Do not leak blocking mode to other readers
  docs, parallelism: Fix failure path and add comment
  Documentation: Remove bootmem_debug from kernel-parameters.txt
  Documentation: security: core.rst: fix warnings
  Documentation/process/howto/kokr: Update for 4.x -> 5.x versioning
  Documentation/translation: Use Korean for Korean translation title
  docs/memory-barriers.txt: Remove remaining references to mmiowb()
  docs/memory-barriers.txt/kokr: Update I/O section to be clearer about CPU vs thread
  docs/memory-barriers.txt/kokr: Fix style, spacing and grammar in I/O section
  Documentation/kokr: Kill all references to mmiowb()
  docs/memory-barriers.txt/kokr: Rewrite "KERNEL I/O BARRIER EFFECTS" section
  docs: Add initial documentation for devfreq
  Documentation: Document how to get links with git am
  docs: Add request_irq() documentation
  ...
2019-12-02 11:51:02 -08:00
Russell King
e3cf8b3668 net: phy: remove phy_ethtool_sset()
There are no users of phy_ethtool_sset() in the kernel anymore, and
as of commit 3c1bcc8614 ("net: ethernet: Convert phydev advertize
and supported from u32 to link mode"), the implementation is slightly
buggy - it doesn't correctly check the masked advertising mask as it
used to.

Remove it, and update the phy documentation to refer to its replacement
function.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-11-23 10:46:26 -08:00
Jonathan Neuschäfer
ea882f7576 docs: networking: phy: Improve phrasing
It's not about times (multiple occurences of an event) but about the
duration of a time interval.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-10-10 11:30:34 -06:00
Russell King
8c25c0cb5b doc: phy: document some PHY_INTERFACE_MODE_xxx settings
There seems to be some confusion surrounding three PHY interface modes,
specifically 1000BASE-X, 2500BASE-X and SGMII.  Add some documentation
to phylib detailing precisely what these interface modes refer to.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-23 11:35:06 -07:00
Heiner Kallweit
25fe02d00a Documentation: net: phy: switch documentation to rst format
Switch phylib documentation to rst format.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-26 09:16:55 -08:00