These msleep() were added during bringup. However, as msleep() will
slow down xpcs initialization and during high CPU utilization, it may
lead to polling timeouts. So, remove these unnecessary delays.
Fixes: f5d7b7a0ff ("LF-10639-4 net: pcs: xpcs: add mx95 serdes support")
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Wei Fang <wei.fang@nxp.com>
We don't currently know from the logs whether it is the local or the
remote link training which requests auto-negotiation restart.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
It has been useful during debugging to see the ethtool link mode masks,
as well as the base pages sent and received even when there is no common
link mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
mtip_start_irqpoll() already has a subordinate check embedded inside.
There is no reason for the same check at the call site.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Mostly for logging, it is best to preserve the first auto-negotiation
restart reason, when multiple ones are set.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The reason why mtip_reconfigure() did not work is because we need to
migrate settings from the old to the new AN/LT block.
mtip_get_mdiodev_for_link_mode() -> phy_set_mode_ext() resets it
and it loses state.
Because mtip_apply_serdes_protocol() runs earlier than
mtip_reconfigure(), the state is actually already lost by the time we
save it. But looking closer at mtip_apply_serdes_protocol(), it is
actually redundant to have this function, because phy_set_mode_ext() is
already called by mtip_get_mdiodev_for_link_mode(). So we just need to
call mtip_reconfigure() for each SerDes lane.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
In a very weird twist of events, the AN/LT block that is used on LX2160A
for 1000Base-KX is actually identical to the one used on all other
Layerscape SoCs, but different from the AN/LT blocks used for
10GBase-KR, 25GBase-KR and all other link modes within the same SoC.
This means that after mtip_reconfigure(), we need to update the register
map used to access our mdiodev.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Currently the link is held down by mtip_backplane_get_state() when C73
resolves to 1000Base-KX, because this mode does not require link
training, and the function is coded up to return false to that question.
Allow to link to come up immediately after auto-negotiation resolves
1000Base-KX, by instead responding "yes, all lanes are trained".
priv->link_mode is only valid when priv->link_mode_resolved is true,
hence the two checks. On the other hand, the priv->link_mode_resolved
check doesn't impact the existing logic, because link training comes
after the link mode was resolved (so it must be true in order for all
lanes to have been trained).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The documentation specifies that for the 1000Base-KX link mode, we need
to write to the IF_MODE register of the SGMII PCS, as visible in the
C45 address space for KX, and to force it to 1G.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The address on the internal MDIO bus through which the Lynx PCS is
accessible is actually variable, based on the SGMIIaCR1[MDEV_PORT]
SoC glue layer registers from the SerDes block.
Typically U-Boot configures these registers to good values which
Linux uses blindly (either hardcoded or through the device tree),
but sometimes U-Boot doesn't run.
Now that there exists an API to query the SerDes about the address of a
given protocol converter (the Ethernet PCS), let's use that to warn if
we're not running on a platform that has been prepared in the way that
we expect by previous boot stages.
It is beyond my purposes to dynamically change MDEV_PORT. That would in
fact be quite complicated to do, because for each MAC which goes to a
multi-port PCS like QSGMII, we'd need to know its exact mapping to a
port within that PCS.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Currently it is possible that the state of a failed link training
sequence lingers (is preserved) onto the next link training attempt.
That is not okay and we should reset the state so that we always start
from a consistent position.
This is not possible with the current API, because the backplane AN/LT
module actually never explicitly tells the SerDes PHY that a new
training sequence has begun, and we cannot infer that from C72_LT_DONE
means "done successfully". We need to introduce a command specific to
that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Some SerDes protocols like QSGMII or 10G-QXGMII are multi-port - that
is, they multiplex multiple protocol converters onto the same SerDes
lane (PHY).
The question "what is the address of this lane's protocol converter?" as
asked by PHY_STATUS_PCVT_ADDR is nonsensical in such a case, because
there are multiple converters, and it is not clear which one is being
querier.
So far we've only been using PHY_PCVT_ETHERNET_ANLT (which indeed is at
most one per lane) and not PHY_PCVT_ETHERNET_PCS where the problem truly
lies. But we have to add more API to query the protocol converter count,
and then query the addresses of individual protocol converters for the
currently configured PHY mode.
Fix the PHY API, Lynx SerDes drivers and MTIP backplane AN/LT consumer
all in one go.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Due to the fact that the xpcs_create_mdiodev_with_phy() function returns
&xpcs->pcs instead of xpcs, when xpcs_create() fails, it is not possible
to continue passing the error message upwards, resulting in the higher
layer mistakenly assuming that this function was successful, leading to
kernel panic.
Therefore, err_ptr is added to check if xpcs_create() returns an error.
Fixes: f5d7b7a0ff ("LF-10639-4 net: pcs: xpcs: add mx95 serdes support")
Reviewed-by: Wei Fang <wei.fang@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
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Merge tag 'v6.6.34' into lf-6.6.y
This is the 6.6.34 stable release
* tag 'v6.6.34': (2530 commits)
Linux 6.6.34
smp: Provide 'setup_max_cpus' definition on UP too
selftests: net: more strict check in net_helper
...
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Conflicts:
arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
drivers/net/ethernet/freescale/fec_ptp.c
drivers/pmdomain/imx/imx8mp-blk-ctrl.c
drivers/usb/dwc3/host.c
tools/perf/util/pmu.c
If the phy is power down, it need to re-lock the phy before configuring it.
Will check if the PHY is locked at the beginning of phy lock function to
avoid the unnecessary relocking.
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Wei Fang <wei.fang@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
[ Upstream commit f5151005d3 ]
In particular the xpcs_soft_reset() and xpcs_do_config() functions
currently return -1 if invalid auto-negotiation mode is specified. That
value might be then passed to the generic kernel subsystems which require
a standard kernel errno value. Even though the erroneous conditions are
very specific (memory corruption or buggy driver implementation) using a
hard-coded -1 literal doesn't seem correct anyway especially when it comes
to passing it higher to the network subsystem or printing to the system
log. Convert the hard-coded error values to -EINVAL then.
Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
The serdes and pcs in the mx95 chip are closely related.
Both serdes and pcs are accessed through the IMDIO bus.
PCS's clock is provided by serdes' clock. Before accessing the ID register
of PCS, need to lock the access permission by accessing the MAC_ADAPTER
register of serdes, and then check whether the PCS is initialized normally.
This is different from the initialization sequence in the original PCS driver.
Therefore, add xpcs_create_mdiodev_with_phy() function to initialize xpcs
with serdes.
Because the ID of mx95 PCS is the same as the default ID of XPCS,
the initialization function for pma/serdes cannot be added.
In mx95, use the PMA's ID to match xpcs_id.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Wei Fang <wei.fang@nxp.com>
cancel_delayed_work_sync() is the wrong API to use immediately after
schedule_delayed_work(), because it races with the scheduling of the
work item, and if it hasn't yet been scheduled, it won't be scheduled at
all, just canceled without ever running (resulting in a failure to
detect link loss).
What we want is flush_delayed_work(), which actually always waits for
mtip_irqpoll_work() to be called and finish its execution.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
If the phylink_pcs is in the MLO_AN_C73 mode, then the Lynx PCS makes
use of the AN/LT block to advertise the supported backplane link modes
using clause 73 autoneg.
Note that we could also be advertising BASE-CR link modes (for SFP28
modules) but we don't have a way of detecting the medium type, so we
just hardcode backplane (BASE-K) for now.
Note that we find out whether we operate in MLO_AN_C73 mode a bit late
(later than lynx_pcs_create()). So we need mtip_backplane_create() to
not actually do anything until we know that C73 is required, and delay
any configuration until the phylink state machine kicks in.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
For each networking SerDes lane on certain Layerscape SoCs, there is a
block, based on an IP core from MoreThanIP, which optionally handles
IEEE 802.3 clause 73 and clause 72, i.e. backplane auto-negotiation and
link training.
The hardware integration between the SerDes lane and this AN/LT block is
rather weak. For this reason, there is no automatic link training
performed in hardware, but rather, software needs to implement a custom,
SerDes-specific link training algorithm and use the AN/LT registers to
communicate it with the link partner. This driver is an inapt attempt to
do just that.
Since the MTIP AN/LT block may be, in premise, integrated in non-NXP
SoCs as well, the implementation is as generic as possible.
In fact, it is not a driver per se, but it is presented as library code
which can be instantiated from the lynx phylink_pcs support code.
Initial support is present only for the LX2160A SoC. Here, the register
map of the IP block was a bit mangled, and we don't have any PHY ID for
auto-detection. But, the location of the AN/LT block is detectable by
querying the SerDes for the ANLTnCR1[MDEV_PORT] fields.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
It is said that with PHY_MODE_ETHERNET, the MAC driver is in control of
the SerDes lane, while with PHY_MODE_ETHERNET_LINKMODE, the internal PHY
is (for backplane link modes).
With the design decision to model the internal backplane PHY as
phylink_pcs, integrated with the lynx pcs, now we have just the
PHY_MODE_ETHERNET handling left in MAC drivers. So there needs to be
some coordination between when does the MAC drive the SerDes phys,
and when does the PCS drive them.
If we take a step back, it becomes apparent that it is also possible to
move the SerDes phy processing for PHY_MODE_ETHERNET from the MAC driver
into the PCS driver, and then teach the PCS driver (in the future) to
handle PHY_MODE_ETHERNET_LINKMODE for backplanes, and all of that can be
transparent to the MAC.
Extend lynx_pcs_create_mdiodev() and lynx_pcs_create_fwnode() with two
extra arguments: "struct phy **phys, size_t num_phys" which represent
the SerDes lanes (on LX2 we also support multi-lane link modes, like
40G, 50G, 100G, and each lane has a SerDes PHY).
Populating phylink_config :: supported_interfaces can also be left down
to the PCS, thus we also introduce lynx_pcs_set_supported_interfaces().
The SerDes phys are optional inside the lynx pcs driver.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The "USXGMII" mode that the Felix switch ports support on LS1028A is not
quite USXGMII, it is defined by the USXGMII multiport specification
document as 10G-QXGMII. It uses the same signaling as USXGMII, but it
multiplexes 4 ports over the link, resulting in a maximum speed of 2.5G
per port.
This change is needed in preparation for the lynx-10g driver on LS1028A,
which will make a more clear distinction between usxgmii (supported on
lane 0) and 10g-qxgmii (supported on lane 1). These protocols have their
configuration in different PCCR registers (PCCRB vs PCCR9).
We touch the entire kernel side: the phylib core, phylink, the Felix
switch driver, the Lynx PCS and the AQR412 driver. The existing
LS1028A-QDS device trees will continue to work with "usxgmii", and will
be updated to "10g-qxgmii" as a separate patch.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Extend the Lynx PCS driver in order to be able to handle the
PHY_INTERFACE_MODE_25GBASER interface type.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Wangxun NICs support the connection with SFP to RJ45 module. In this case,
PCS need to be configured in SGMII mode.
According to chapter 6.11.1 "SGMII Auto-Negitiation" of DesignWare Cores
Ethernet PCS (version 3.20a) and custom design manual, do the following
configuration when the interface mode is SGMII.
1. program VR_MII_AN_CTRL bit(3) [TX_CONFIG] = 1b (PHY side SGMII)
2. program VR_MII_AN_CTRL bit(8) [MII_CTRL] = 1b (8-bit MII)
3. program VR_MII_DIG_CTRL1 bit(0) [PHY_MODE_CTRL] = 1b
Also CL37 AN in backplane configurations need to be enabled because of the
special hardware design. Another thing to note is that PMA needs to be
reconfigured before each CL37 AN configuration for SGMII, otherwise AN will
fail, although we don't know why.
On this device, CL37_ANSGM_STS (bit[4:1] of VR_MII_AN_INTR_STS) indicates
the status received from remote link during the auto-negotiation, and
self-clear after the auto-negotiation is complete.
Meanwhile, CL37_ANCMPLT_INTR will be set to 1, to indicate CL37 AN is
complete. So add another way to get the state for CL37 SGMII.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Enable CL37 AN complete interrupt for DW XPCS. It requires to clear the
bit(0) [CL37_ANCMPLT_INTR] of VR_MII_AN_INTR_STS after AN completed.
And there is a quirk for Wangxun devices to enable CL37 AN in backplane
configurations because of the special hardware design.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
According to chapter 6 of DesignWare Cores Ethernet PCS (version 3.20a)
and custom design manual, add a configuration flow for switching interface
mode.
If the interface changes, the following setting is required:
1. wait VR_XS_PCS_DIG_STS bit(4, 2) [PSEQ_STATE] = 100b (Power-Good)
2. write SR_XS_PCS_CTRL2 to select various PCS type
3. write SR_PMA_CTRL1 and/or SR_XS_PCS_CTRL1 for link speed
4. program PMA registers
5. write VR_XS_PCS_DIG_CTRL1 bit(15) [VR_RST] = 1b (Vendor-Specific
Soft Reset)
6. wait for VR_XS_PCS_DIG_CTRL1 bit(15) [VR_RST] to get cleared
Only 10GBASE-R/SGMII/1000BASE-X modes are planned for the current Wangxun
devices. And there is a quirk for Wangxun devices to switch mode although
the interface in phylink state has not changed, since PCS will change to
default 10GBASE-R when the ethernet driver(txgbe) do LAN reset.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since Wangxun 10Gb NICs require some special configuration on the IP of
Synopsys Designware XPCS, introduce dev_flag for different vendors. Read
OUI from device identifier registers, to detect Wangxun devices.
And xpcs_soft_reset() is skipped to avoid the reset of device identifier
registers.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When switching from 10GBase-R/5GBase-R/USXGMII to one of the interface
modes provided by mtk-pcs-lynxi we need to make sure to always perform
a full configuration of the PHYA.
Implement pcs_disable op which resets the stored interface mode to
PHY_INTERFACE_MODE_NA to trigger a full reconfiguration once the LynxI
PCS driver had previously been deselected in favor of another PCS
driver such as the to-be-added driver for the USXGMII PCS found in
MT7988.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/f23d1a60d2c9d2fb72e32dcb0eaa5f7e867a3d68.1692327891.git.daniel@makrotopia.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Cross-merge networking fixes after downstream PR.
Conflicts:
drivers/net/ethernet/sfc/tc.c
fa165e1949 ("sfc: don't unregister flow_indr if it was never registered")
3bf969e88a ("sfc: add MAE table machinery for conntrack table")
https://lore.kernel.org/all/20230818112159.7430e9b4@canb.auug.org.au/
No adjacent changes.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
lynx_pcs_link_up_sgmii() is supposed to update the PCS speed and duplex
for the non-inband operating modes, and prior to the blamed commit, it
did just that, but a mistake sneaked into the conversion and reversed
the condition.
It is easy for this to go undetected on platforms that also initialize
the PCS in the bootloader, because Linux doesn't reset it (although
maybe it should). The nature of the bug is that phylink will not touch
the IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK fields when it should, and
it will apparently keep working if the previous values set by the
bootloader were correct.
Fixes: c689a6528c ("net: pcs: lynx: update PCS driver to use neg_mode")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
The reference of pdev->dev is taken by of_find_device_by_node, so
it should be released when not need anymore.
Fixes: 7dc54d3b8d ("net: pcs: add Renesas MII converter driver")
Signed-off-by: Xiang Yang <xiangyang3@huawei.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Link: https://lore.kernel.org/r/20230724211905.805665-1-robh@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Update the Lynx PCS driver to use neg_mode rather than the mode
argument. This ensures that the link_up() method will always program
the speed and duplex when negotiation is disabled.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/E1qA8E4-00EaFf-Bf@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Update the Lynxi PCS driver to use neg_mode rather than the mode
argument. This ensures that the link_up() method will always program
the speed and duplex when negotiation is disabled.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/E1qA8Dz-00EaFY-5A@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Update xpcs to use neg_mode to configure whether inband negotiation
should be used. We need to update sja1105 as well as that directly
calls into the XPCS driver's config function.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/E1qA8Dt-00EaFS-W9@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Convert fman_dtsec, xilinx_axienet and pcs-lynx to pass the neg_mode
into phylink_mii_c22_pcs_config(). Where appropriate, drivers are
updated to have neg_mode passed into their pcs_config() and
pcs_link_up() functions. For other drivers, we just hoist the call
to phylink_pcs_neg_mode() to their pcs_config() method out of
phylink_mii_c22_pcs_config().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/E1qA8Do-00EaFM-Ra@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Check that the fwnode is marked as available prior to trying to lookup
the PCS device, and return -ENODEV if unavailable. Document the return
codes from lynx_pcs_create_fwnode().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Change lynx_pcs_create() to return an error-pointer on failure to
allocate memory, rather than returning NULL. This allows the removal
of the conversion in lynx_pcs_create_fwnode() and
lynx_pcs_create_mdiodev().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
We no longer need to export lynx_pcs_create() for drivers to use as we
now have all the functionality we need in the two new creation helpers.
Remove the export and prototype, and make it static.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Add a helper to create a lynx PCS from a fwnode handle.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
lynx_get_mdio_device() is no longer necessary, let's remove it so the
lynx PCS code is always managing the lifetime of the mdiodev.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Add basic support for XPCS using 10GBASE-R interface. This mode will
be extended to use interrupt, so set pcs.poll false. And avoid soft
reset so that the device using this mode is in the default configuration.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
There are now no callers of xpcs_create(), so let's remove it from
public view to discourage future direct usage.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that we can easily create a mdio-device that represents a
memory-mapped device that exposes an MDIO-like register layout, we don't
need the Altera TSE PCS anymore, since we can use the Lynx PCS instead.
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add lynx_pcs_create_mdiodev() to simplify the creation of the mdio
device associated with lynx PCS. In order to allow lynx_pcs_destroy()
to clean this up, we need to arrange for lynx_pcs_create() to take a
refcount on the mdiodev, and lynx_pcs_destroy() to put it.
Adding the refcounting to lynx_pcs_create()..lynx_pcs_destroy() will
be transparent to existing users of these interfaces.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Add xpcs_create_mdiodev() to simplify the creation of the mdio device
associated with the XPCS. In order to allow xpcs_destroy() to clean
this up, we need to arrange for xpcs_create() to take a refcount on
the mdiodev, and xpcs_destroy() to put it.
Adding the refcounting to xpcs_create()..xpcs_destroy() will be
transparent to existing users of these interfaces.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Avoid reading the STAT1 registers more than once while getting the PCS
state, as this register contains latching-low bits that are lost after
the first read.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Use phylink_resolve_c73() to resolve the clause 73 autonegotiation
result.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
xpcs was indicating symmetric pause should be enabled regardless of
the advertisements by either party. Fix this to use
linkmode_resolve_pause() now that we're no longer obliterating the
link partner's advertisement by logically anding it with our own.
This is transitional, the function will be entirely replaced with
phylink_resolve_c73() in the following patch.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
lp_advertising is supposed to reflect the link partner's advertisement
unmodified by the local advertisement, but xpcs bitwise ands it with
the local advertisement prior to calculating the resolution of the
negotiation.
Fix this by moving the bitwise and to xpcs_resolve_lpa_c73() so it can
place the results in a temporary bitmap before passing that to
ixpcs_get_max_usxgmii_speed().
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
