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lf-6.6.y
3400 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Stephen Boyd
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032bcf783e |
Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next
- Add Versa3 clk generator to support 48KHz playback/record with audio codec on RZ/G2L SMARC EVK - Introduce kstrdup_and_replace() and use it * clk-versa: clk: vc7: Use i2c_get_match_data() instead of device_get_match_data() clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() clk: versaclock3: Switch to use i2c_driver's probe callback clk: Add support for versa3 clock driver dt-bindings: clock: Add Renesas versa3 clock generator bindings * clk-strdup: clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace() clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace() driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace() lib/string_helpers: Add kstrdup_and_replace() helper * clk-amlogic: (22 commits) dt-bindings: soc: amlogic: document System Control registers dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema clk: meson: axg-audio: move bindings include to main driver clk: meson: meson8b: move bindings include to main driver clk: meson: a1: move bindings include to main driver clk: meson: eeclk: move bindings include to main driver clk: meson: aoclk: move bindings include to main driver dt-bindings: clk: axg-audio-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids dt-bindings: clk: meson8b-clkc: expose all clock ids dt-bindings: clk: g12a-aoclkc: expose all clock ids dt-bindings: clk: g12a-clks: expose all clock ids dt-bindings: clk: axg-clkc: expose all clock ids dt-bindings: clk: gxbb-clkc: expose all clock ids clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS ... * clk-allwinner: clk: sunxi-ng: nkm: Prefer current parent rate clk: sunxi-ng: a64: select closest rate for pll-video0 clk: sunxi-ng: div: Support finding closest rate clk: sunxi-ng: mux: Support finding closest rate clk: sunxi-ng: nkm: Support finding closest rate clk: sunxi-ng: nm: Support finding closest rate clk: sunxi-ng: Add helper function to find closest rate clk: sunxi-ng: Add feature to find closest rate clk: sunxi-ng: a64: allow pll-mipi to set parent's rate clk: sunxi-ng: nkm: consider alternative parent rates when determining rate clk: sunxi-ng: nkm: Use correct parameter name for parent HW clk: sunxi-ng: Modify mismatched function name clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource() * clk-rockchip: clk: rockchip: rv1126: Add PD_VO clock tree clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz clk: rockchip: rk3568: Add PLL rate for 101MHz |
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Stephen Boyd
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d10ebc7c64 |
Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next
- Remove OXNAS clk driver * clk-bindings: dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml dt-bindings: clock: xlnx,versal-clk: drop select:false dt-bindings: clock: versal: Add versal-net compatible string dt-bindings: clock: ast2600: Add I3C and MAC reset definitions dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding * clk-starfive: reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support clk: starfive: Simplify .determine_rate() clk: starfive: Add StarFive JH7110 Video-Output clock driver clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver clk: starfive: Add StarFive JH7110 System-Top-Group clock driver clk: starfive: jh7110-sys: Add PLL clocks source from DTS clk: starfive: Add StarFive JH7110 PLL clock driver dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs dt-bindings: soc: starfive: Add StarFive syscon module dt-bindings: clock: Add StarFive JH7110 PLL clock generator * clk-rm: dt-bindings: clk: oxnas: remove obsolete bindings clk: oxnas: remove obsolete clock driver * clk-renesas: clk: renesas: rcar-gen3: Add ADG clocks clk: renesas: r8a77965: Add 3DGE and ZG support clk: renesas: r8a7796: Add 3DGE and ZG support clk: renesas: r8a7795: Add 3DGE and ZG support clk: renesas: emev2: Remove obsolete clkdev registration clk: renesas: r9a07g043: Add MTU3a clock and reset entry clk: renesas: rzg2l: Simplify .determine_rate() clk: renesas: r9a09g011: Add CSI related clocks clk: renesas: r8a774b1: Add 3DGE and ZG support clk: renesas: r8a774e1: Add 3DGE and ZG support clk: renesas: r8a774a1: Add 3DGE and ZG support clk: renesas: rcar-gen3: Add support for ZG clock * clk-cleanup: clk: mvebu: Convert to devm_platform_ioremap_resource() clk: nuvoton: Convert to devm_platform_ioremap_resource() clk: socfpga: agilex: Convert to devm_platform_ioremap_resource() clk: ti: Use devm_platform_get_and_ioremap_resource() clk: mediatek: Convert to devm_platform_ioremap_resource() clk: hsdk-pll: Convert to devm_platform_ioremap_resource() clk: gemini: Convert to devm_platform_ioremap_resource() clk: fsl-sai: Convert to devm_platform_ioremap_resource() clk: bm1880: Convert to devm_platform_ioremap_resource() clk: axm5516: Convert to devm_platform_ioremap_resource() clk: actions: Convert to devm_platform_ioremap_resource() clk: cdce925: Remove redundant of_match_ptr() drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init() clk: Explicitly include correct DT includes |
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Greg Kroah-Hartman
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704e2c6107 |
interconnect changes for 6.6
This pull request contains the interconnect changes for the 6.6-rc1 merge window which is a mix of core and driver changes with the following highlights: Core changes: - New generic test client driver that allows issuing bandwidth requests between endpoints via debugfs. - Annotate all structs with flexible array members with the __counted_by attribute. - Introduce new icc_bw_lock for cases where we need to serialize bandwidth aggregation and update to decouple that from paths that require memory allocation. Driver changes: - Move the Qualcomm SMD RPM bus-clocks from CCF to interconnect framework where they actually belong. This brings power management improvements and reduces the overhead and layering. These changes are in immutable branch that is being pulled also into the qcom tree. - Fixes for QUP nodes on SM8250. - Enable sync_state and keepalive for QCM2290. - Enable sync_state for SM8450. - Improve enable_mask-based BCMs handling and fix some bugs. - Add compatible string for the OSM-L3 on SDM670. - Add compatible strings for SC7180, SM8250 and SM6350 bandwidth monitors. - Expand and retire the DEFINE_QNODE and DEFINE_QBCM macros, which have become ugly beasts with many different arguments. Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJk5xuLAAoJEIDQzArG2BZjnN4QALIjeLAhT+sonUbdwoSRmE4M fsE99iZnNXq4+CYOR38NOcpa/ZKA+a6as4a8pqfYw7+8yaV/BqaDJTt1lOPTeGwz 38wdvy9R9H/KoJxad7SDFYDSkMpvMmcTQ33a4fyyyHdnNpgaEYqauncctnywD69U UywOR7YsA+T/0sugCqq1r1CgWK2S+JbUjxEgahnY840lCPMNRHrU+aJ9Uvw8fLcB iqNzEld/HB5lneqNDVWZWugxzX4bpsm2Ib0M1VZtNfh8bjZNaeIsMjAdDnmIKQQo qkRz3kHCrEzSKHsfX1X0umT4EpJ+UiltBGVWDTxodh9Pmw47D0UZGOipj6pwwulO /Jso/T0tJMSy4c05DMOegyothv6vpsillG5ZmzVpun8uiduBxp6KWkfEii+O6AXY EOaWQK/GYKJ9aKyGeOdZPq8aTxfmIOM85Bt/5LwZruUL1d5D4DTXvs5yJFBERDif sS2yK4GGtHLqllRttPC7pjYu6CWrCO5v3yvsezDdZfK/hd0QZMTr7DB4NcDi6ohl Au4HL84wa69MBh1sXm/hxbz3eGIh/XD8eRBheil+eAdkbx7+IoIHg1il49oPCmXH UKFBE2Gki1zFZ+0yGjJC031idaHDeNvGmoXd9+RkjHtCqMmkaofIOD3Pe3zIGrX4 mj6QCcrZe5flt4eqKyTG =MeG9 -----END PGP SIGNATURE----- Merge tag 'icc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.6 This pull request contains the interconnect changes for the 6.6-rc1 merge window which is a mix of core and driver changes with the following highlights: Core changes: - New generic test client driver that allows issuing bandwidth requests between endpoints via debugfs. - Annotate all structs with flexible array members with the __counted_by attribute. - Introduce new icc_bw_lock for cases where we need to serialize bandwidth aggregation and update to decouple that from paths that require memory allocation. Driver changes: - Move the Qualcomm SMD RPM bus-clocks from CCF to interconnect framework where they actually belong. This brings power management improvements and reduces the overhead and layering. These changes are in immutable branch that is being pulled also into the qcom tree. - Fixes for QUP nodes on SM8250. - Enable sync_state and keepalive for QCM2290. - Enable sync_state for SM8450. - Improve enable_mask-based BCMs handling and fix some bugs. - Add compatible string for the OSM-L3 on SDM670. - Add compatible strings for SC7180, SM8250 and SM6350 bandwidth monitors. - Expand and retire the DEFINE_QNODE and DEFINE_QBCM macros, which have become ugly beasts with many different arguments. Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (64 commits) interconnect: Add debugfs test client interconnect: Reintroduce icc_get() debugfs: Add write support to debugfs_create_str() interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM interconnect: qcom: sm8350: Retire DEFINE_QBCM interconnect: qcom: sm8250: Retire DEFINE_QBCM interconnect: qcom: sm8150: Retire DEFINE_QBCM interconnect: qcom: sm6350: Retire DEFINE_QBCM interconnect: qcom: sdx65: Retire DEFINE_QBCM interconnect: qcom: sdx55: Retire DEFINE_QBCM interconnect: qcom: sdm845: Retire DEFINE_QBCM interconnect: qcom: sdm670: Retire DEFINE_QBCM interconnect: qcom: sc7180: Retire DEFINE_QBCM interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE interconnect: qcom: sm8350: Retire DEFINE_QNODE interconnect: qcom: sm8250: Retire DEFINE_QNODE interconnect: qcom: sm8150: Retire DEFINE_QNODE interconnect: qcom: sm6350: Retire DEFINE_QNODE interconnect: qcom: sdx65: Retire DEFINE_QNODE interconnect: qcom: sdx55: Retire DEFINE_QNODE ... |
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Krzysztof Kozlowski
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440b075bd2 |
dt-bindings: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Correct also the format // -> .* in few Allwinner binding headers as pointed out by checkpatch: WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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Duje Mihanović
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3b99cd274e |
clk: pxa910: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-4-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Duje Mihanović
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87f06247e0 |
clk: pxa1928: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-3-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Duje Mihanović
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51fa6aa5c2 |
clk: pxa168: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-2-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Duje Mihanović
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46c13513a4 |
clk: mmp2: Move number of clocks to driver source
The number of clocks should not be in the dt binding as it is not used by the respective device tree and thus needlessly bloats the ABI. Move this number of clocks into the driver source. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/r/20230812-mmp-nr-clks-v2-1-f9271bd7eaa5@skole.hr Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Arnd Bergmann
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c708140e96 |
SoCFPGA DTS updates for v6.6
- Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions - Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet - Add initial support for Agilex5 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmTg5+8ACgkQGZQEC4Gj KPRA7Q/8C6ugL9LlR5JEUruaAugaRnYL2BgotdwhMuCbU7d3oj+pFBzHR8PR/MCI CZXnLehpmwOkGz0K0QLey6nQuGZS18DK19DxJkL46hr69Rqpu8XHb2yPjiBtbh/o 0ZwpxuRTKz1QbP9hprw/RIHSbZ/AWaI2O/90xicC0p1qWXmxSz0Kv6YOoQ61o/yO On91yS3R+75o1NoHD+FoKiPuwwTfaHc7TrS/UIshPKAuk6yo/Cd3Is5EdYL+5xEz kXDRkt2X3g7il/Jm9AOFJvA4Q1VLD9Ke4C9o9ePvj167GklaLnJ9JT8Qw7PGXaoE wolse2+bJA4a9acPbkYmYSSyyKtZnIgV5oTXFgeWQ0eo0qmoTNqgx6eMIOyRltxs 3OTTvNyw9+ZOhW4YRv/lJWwDL3uMlKsMV/2JOSPua5V4kXrPi/A+HhIZGDll1Naf y+HYNoJiSrDAiNYwWglz4f4LR+xU3wc3cS4uLrAU+aCE+NHYAj/Jqn8/EC26NDbQ wVsPfQMQN9j0wCrMzZZf4LUEYM6C90ZeqUFqwB6mqctfAbT/fQyLdyKL8Gu/QrG0 lhp2J4vb2UJ9eQ1zBoBtb6flcQegHP/ybmRM4Q5ep3LvVOHhilZT5mO8mj36q84g 3Co2RqQ8oknTgmxTF93jguAW+JPtmfvwA66x+CetC0fSmSWN2HI= =OfJk -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkFA0ACgkQYKtH/8kJ UiejLBAAnafzyrMqZnO6nc6hvK/7ONSN2QZqaYoZ0Ho6fSvz5KxqVqPjUq4EshEZ HB9kZ42YvJQZYyi8Pvd/7BIQe3WvwLZ6tW4NALoiMsfpL127wzfwJlDj5yOiltLu aZtwhRvRV7jHKlh06wh8eax3vd4P3ozR5DUufcCJp59xI8MTS2UYI6enrIoA2h06 uC0xWhuEvseHdzYQbC2hAZlZA1Z/7BBYCJO5iKq5cdW0zHpy0h7h2k3ba2M2BsZM JtaIIyrjjF70nmydNY9UfHt0iU3u5InbZ7GdJEc9kkGsbB4fLiSUdn8ScPXShXaY W4qhsLQ9DhyDlkb+xmzkt2FRH9gh98xe2Ej4CmZM/4X3Xc/g+kquGZ4kHllNHJK5 AWodtDcrio3V7eCmiGerSBdvChr6pB31qVpuaCaiuCr+OpPZGdj/Z2c0qjCDo9h6 Pn8sH8jVgye3AQ30NmSrpJz12tN/H86BeiW59eFeJ3jRXi8qx7oMyyuLVNDzo+sF 6EkydHcSNrl0HF2gKQRSFMLvYfaYUZFBA/iSycrn24UjKc86DWd3aGbcofQSbJOV WeZAODlghXX9/R6yVKf4Vt/O6m3Lb2xreCilkIKJD5wpdQAu8hz7NXJAMtNJY1ed MKASPnHm1jP6Is/6acr5pDYFpbG3HOsyOxpzNQYRVHEFElMxQSk= =mFST -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt SoCFPGA DTS updates for v6.6 - Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions - Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet - Add initial support for Agilex5 * tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA dt-bindings: clock: add Intel Agilex5 clock manager dt-bindings: reset: add reset IDs for Agilex5 dt-bindings: intel: Add Intel Agilex5 compatible arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb" arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions arm64: dts: agilex/stratix10: Updated QSPI Flash layout for UBIFS arm64: dts: agilex/stratix10/n5x: fix dtbs_check for rstmgr arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node arm64: dts: socfpga: stratix10: fix dtbs_check warning for usbphy arm64: dts: socfpga: agilex/stratix10: fix dtbs_check warnings for sram Link: https://lore.kernel.org/r/20230819161418.931258-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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6522fbd48a |
Qualcomm ARM64 DeviceTree updates for v6.6
Initial support for the SM4450 platform and the QRD device thereon is added. The IPQ5018 platform is introduced, and the RDP432-C2 board thereon. A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based LEDs and buttons. On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added. On MSM8916, the D3 camera mezzanine is improved and refactored out to its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with charger, while Samsung Galaxy J5 and E5 gains touchscreen support. A few fixes for MSM8939 are introduced, and initial support for Samsung Galaxy A7 is add. Support for scaling the cache bus fabric is introduced on MSM8996. A missing interrupt for the USB2 controller is added. The touchscreen vio supply on Xiaomi Mi 5 is corrected, and a few other cleanups are introduces across other devices. The display controller is introduced for MSM8998, a few clock fixes are introduced and missing power domains are added for the multimedia subsystem iommu. Reserved memory-regions and reserved GPIO lists are updated for the QDU/QRU1000 IDPs. USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is enabled for the RB2. PCIe and Ethernet support is introduced on SA8775P, and enabled for the Ride board. On SC7180 the PSCI integration is refactored, to allow supporting devices with the Qualcomm firmware. BWMON is introduced, alongside the CPUfreq-based bus voting. A number of fixes are added for SC8180X, on the Primus and Lenovo Flex 5G devices pmic_glink is introduced and wired up, to provide support for external display. Missing SCM interconnect is added to SC8280XP, and the PDC is marked as wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is corrected and a few regulators are renamed to align with schematics. The Lenovo Thinkpad X13s gains camera activity LED and a set of previously reserved GPIOs are released. The SA8540P Ride platform gains RTC support. For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced and wired up as wakeup-parent of the TLMM. On SDM845 the UFS controller gains interconnect path description, power-domain information is added to GCC and minimum frequency of the UFS ICE is corrected. On RB3 continuous splash memory region is described, and the camera subsystem is enabled. On the Lenovo Yoga C630 a missing power supply for the display panel is added, and the debug UART is introduced. SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75 PMIC is described and added to the IDP. GPU description is added to SM6115, and together with display enabled on the Lenovo Tab P11. On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU is added, and the PDC is registered as wakeup-parent of TLMM. L3 cache scaling is introduced on SM6375. The DSI PHY compatible and an interrupt for I2C7 are corrected for SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected. On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node gains interconnect paths, SMMU is marked as DMA coherent and dynamic power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line names are updated. On SM8350 missing cluster sleep states and LMH interrupts are added, the CPU compatibles are corrected and APR and LPASS pinctrl support is introduced. The HDK gains uSD card support and PMK8350 is added. For SM8450 support for RNG and RPMh stats are added, the ICE handling is extracted from the UFS node and the display subsystem gains a missing interconnect path. Thermal description is improved for the HDK. On SM8550 MTP and QRD the pmic_glink is introduced, to provide DisplayPort output. A missing regulator supply is also added. A few platforms that happens to share the RPMH power-domain resource identifier constants are migrated to new generic defines. ADC channel names are generalized on various PMICs. A variety of devices gain chassis-type, and the GIC_SPI constant is replacing the 0 across a few different platforms. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmTgOtYVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fr20P/jDKWelSMYqeVFfa49XGXyvRwWmf TaSb8IlD9cqQ3ScFYwmJGf2gVqt7zBfGU2EoxkMbpFeGjyZZYpw86Y3fvU1A5oxy TQ++kBQAvuSGEUqdGE7Xv6lIUmKPyVmcayRpI6IgGI5iaU1y5bI6xmh3bjhL//NQ mcsH11SLPPvDyZ608Etvw1rNtPImSI8nOucaBSlmnkxT1NuzIjPhNG+rNwgBSBHU O8sKi80hYrVw78sR3sXH+cBCCMhkFg377maCo9ZE14TFdAT3Ggn2uXX01PXCvn1z cO/wFAZ5vOe4KU1+maWkvOsEOCqjghdFUoVK7e9xtMpeuhoXjAuFf1L26d02mOK3 I48/apsj8ak/kmC89eo1RrOWniytI+YGPZwd5wYIOh0Q2oS8+IpC0nZhm9V86IIU DoWxbdf0TZ++e3D232AftFqKutbL9utJanq9l34zmI50F7QK4BSbBRKT81pRTrml y4tR7bukrGYKVRq3Kpf5vyWwPEpYIfZ7o9k6J56IcaLoaMvctW/vcnf8R0Qr5gJb 3vHUEBsozERKd2NcFw9g1Ay86DbAxC+3wyfHHMWgolA7fYCNVSXN6R6hKXb6d503 6ORnP4U6NjxpibIXC3jj+zmvbUM/GhSgrw3yErPb83n9P9pJ5Aw2+6J+Xmt75U5z 9hyHUWkbhyNQqBVA =uK0C -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkEYEACgkQYKtH/8kJ Uie31xAAvhedx3cixHT570K/qxw8tTM06btXNhEek+/oMiW5eCcGKCRW5ixcpPog 9sLGI4xt5aMVdJshIYWovCDpCQWCoSYiqFx9N2/2zF+DrXYjeKNCpU6oVcPh1MG7 Xm5Fy2s99BipT6z6ha5kqeirdgjH+po8Jtkw54AfROzJa2oTD6GBvsPtxxW3CYgJ lDoHTvU59gwl1Dk60FIkc2slyA57VqqRuVLAmurgO2nGOFU9FODb/lNuMIh8AeKt +scXrEVozQPDeefSCbKTqROBvIuYyMbXmFHLW+VmM9EgXnOcV2IEVOSZCiMYi9Ic RWpfOHVAn9xM/zFhHh23onJPUrISwcJv05A1PU92WFNWh7uoly67KD712gPStwmd /rKI25DPk3Z7nc7LwzO5VqovOpU9Q0t+/NDOLiRn1A8/hljqVMhq8eTo9AY9sBJN EW5AZw1KUzrXH+9RQsNKDAJckpfgDaI8sB+ueXOZMHHhhKaugMILp/PgpN6isQZu G7ZkJadpQBliJ3pvsHpK6JlXcJoB4TafIx7pJPDCHbAFOnMhCmEUPW7TX36n0uQ3 4d/ghMENBmDWkmZGlFLtl7SfKNmuT/HQhcG75QZxqPiw/uhRGepNaswqtkpMMeFD Vl+spE5wosXSG8Ra2W/UJfNfEKYL1TKevPwJXZWmT9WUehMSG+U= =zUL1 -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 DeviceTree updates for v6.6 Initial support for the SM4450 platform and the QRD device thereon is added. The IPQ5018 platform is introduced, and the RDP432-C2 board thereon. A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based LEDs and buttons. On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added. On MSM8916, the D3 camera mezzanine is improved and refactored out to its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with charger, while Samsung Galaxy J5 and E5 gains touchscreen support. A few fixes for MSM8939 are introduced, and initial support for Samsung Galaxy A7 is add. Support for scaling the cache bus fabric is introduced on MSM8996. A missing interrupt for the USB2 controller is added. The touchscreen vio supply on Xiaomi Mi 5 is corrected, and a few other cleanups are introduces across other devices. The display controller is introduced for MSM8998, a few clock fixes are introduced and missing power domains are added for the multimedia subsystem iommu. Reserved memory-regions and reserved GPIO lists are updated for the QDU/QRU1000 IDPs. USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is enabled for the RB2. PCIe and Ethernet support is introduced on SA8775P, and enabled for the Ride board. On SC7180 the PSCI integration is refactored, to allow supporting devices with the Qualcomm firmware. BWMON is introduced, alongside the CPUfreq-based bus voting. A number of fixes are added for SC8180X, on the Primus and Lenovo Flex 5G devices pmic_glink is introduced and wired up, to provide support for external display. Missing SCM interconnect is added to SC8280XP, and the PDC is marked as wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is corrected and a few regulators are renamed to align with schematics. The Lenovo Thinkpad X13s gains camera activity LED and a set of previously reserved GPIOs are released. The SA8540P Ride platform gains RTC support. For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced and wired up as wakeup-parent of the TLMM. On SDM845 the UFS controller gains interconnect path description, power-domain information is added to GCC and minimum frequency of the UFS ICE is corrected. On RB3 continuous splash memory region is described, and the camera subsystem is enabled. On the Lenovo Yoga C630 a missing power supply for the display panel is added, and the debug UART is introduced. SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75 PMIC is described and added to the IDP. GPU description is added to SM6115, and together with display enabled on the Lenovo Tab P11. On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU is added, and the PDC is registered as wakeup-parent of TLMM. L3 cache scaling is introduced on SM6375. The DSI PHY compatible and an interrupt for I2C7 are corrected for SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected. On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node gains interconnect paths, SMMU is marked as DMA coherent and dynamic power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line names are updated. On SM8350 missing cluster sleep states and LMH interrupts are added, the CPU compatibles are corrected and APR and LPASS pinctrl support is introduced. The HDK gains uSD card support and PMK8350 is added. For SM8450 support for RNG and RPMh stats are added, the ICE handling is extracted from the UFS node and the display subsystem gains a missing interconnect path. Thermal description is improved for the HDK. On SM8550 MTP and QRD the pmic_glink is introduced, to provide DisplayPort output. A missing regulator supply is also added. A few platforms that happens to share the RPMH power-domain resource identifier constants are migrated to new generic defines. ADC channel names are generalized on various PMICs. A variety of devices gain chassis-type, and the GIC_SPI constant is replacing the 0 across a few different platforms. * tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (215 commits) arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC arm64: dts: qcom: msm8916-samsung-e5: Add touchscreen arm64: dts: qcom: sc7180: Split up TF-A related PSCI configuration arm64: dts: qcom: sc8280xp-x13s: Add camera activity LED arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pins arm64: dts: qcom: msm8998: Add DPU1 nodes arm64: dts: qcom: msm8996: Fix dsi1 interrupts arm64: dts: qcom: sdx75-idp: Add regulator nodes arm64: dts: qcom: sdx75: Add rpmhpd node arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75 arm64: dts: qcom: Add pmx75 PMIC dtsi arm64: dts: qcom: Add pm7550ba PMIC dtsi arm64: dts: qcom: Add pinctrl gpio support for pm7250b arm64: dts: qcom: sdx75: Add spmi node arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMU ... Link: https://lore.kernel.org/r/20230819034551.2537866-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
aa2951a8fa |
STM32 DT for v6.6, round 1
Highlights:
----------
- MCU:
- Add CAN support on stm32f746.
- Add touchscreen support (edt-ft5306) on stm32f746-disco.
- Add support to Rocktech RK043FN48H display on stm32f746-disco
board.
- Add gpio-ranges for stm32f7 to fix boot issue.
- MPU:
- STM32MP13:
- Remove shmem for scmi-optee to match with OP-TEE configuration.
- Enable OP-TEE asynchronous notification by using PPI#15.
- Expose and use SCMI regulators on stm32mp135f-dk.
- STMP32MP15:
- Remove shmem for scmi-optee to match with OPTEE configuration
- Deduplicate DSI node to fix #address-cells/#size-cells issue on
boards using it.
- ST:
- Fix dts check warnings on stm32mp15-scmi boards.
- DH:
- Add missing detach mailbox for DHCOM and DHCOR SoM.
- Odyssey:
- Add missing detach mailbox for Odyssey SoM.
- OCTAVO:
- Add Linux Automation Test Automation Controller (LXA TAC) based
on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
DSA-capable ETH switch (2 ports), dual CAN...
It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
on STM32MP157.
- PROTONIC:
- Add Power over Data Line (PoDL) Power Source Equipment (PSE)
regulator nodes on PRTT1C board. It allows power delivery and
data transmission over a single twisted pair.
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Merge tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.6, round 1
Highlights:
----------
- MCU:
- Add CAN support on stm32f746.
- Add touchscreen support (edt-ft5306) on stm32f746-disco.
- Add support to Rocktech RK043FN48H display on stm32f746-disco
board.
- Add gpio-ranges for stm32f7 to fix boot issue.
- MPU:
- STM32MP13:
- Remove shmem for scmi-optee to match with OP-TEE configuration.
- Enable OP-TEE asynchronous notification by using PPI#15.
- Expose and use SCMI regulators on stm32mp135f-dk.
- STMP32MP15:
- Remove shmem for scmi-optee to match with OPTEE configuration
- Deduplicate DSI node to fix #address-cells/#size-cells issue on
boards using it.
- ST:
- Fix dts check warnings on stm32mp15-scmi boards.
- DH:
- Add missing detach mailbox for DHCOM and DHCOR SoM.
- Odyssey:
- Add missing detach mailbox for Odyssey SoM.
- OCTAVO:
- Add Linux Automation Test Automation Controller (LXA TAC) based
on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
DSA-capable ETH switch (2 ports), dual CAN...
It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
on STM32MP157.
- PROTONIC:
- Add Power over Data Line (PoDL) Power Source Equipment (PSE)
regulator nodes on PRTT1C board. It allows power delivery and
data transmission over a single twisted pair.
* tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (29 commits)
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
ARM: dts: st: Add gpio-ranges for stm32f769-pinctrl
ARM: dts: st: Add gpio-ranges for stm32f746-pinctrl
ARM: dts: st: stm32mp157c-emstamp: correct regulator-active-discharge
ARM: dts: st: stm32mp157c-emstamp: drop incorrect vref_ddr property
ARM: dts: stm32: fix dts check warnings on stm32mp15-scmi
ARM: dts: stm32: Add missing detach mailbox for DHCOR SoM
ARM: dts: stm32: Add missing detach mailbox for DHCOM SoM
ARM: dts: stm32: Add missing detach mailbox for Odyssey SoM
ARM: dts: stm32: Add missing detach mailbox for emtrion emSBC-Argon
ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes
ARM: dts: stm32: add touchscreen on stm32f746-disco board
ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
ARM: dts: stm32: re-add CAN support on stm32f746
...
Link: https://lore.kernel.org/r/c0524a16-ab27-0cb5-8e7b-c12f7bde7e0d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
9eb33ddedd |
Qualcomm driver updates for v6.6
Compatible and clock handling in the Qualcomm SCM driver is cleaned up, together with a couple stylistic cleanups and transition to mark exported symbols GPL only. An abstraction for the RPM subsystem is introduced, to make align the structure of the SMD and GLINK nodes thereof with the structure when a remoteproc is involved. This is done to facilitate associating additional entities with the RPM subsystem. The qmp_send() API is modified to not expose hardware requirements onto the client drivers, and then further extended to allow command formatting directly in the API, to facilitate this typical use case. In the Qualcomm Command DB driver, NUL characters previously included in identifiers are dropped from the debugfs, to facilitate scripting. The thresholds of the BWMON driver are simplified to avoid hard coded starting values. The OCMEM driver is updated with some cleanups and fixes, and addition of MSM8226 support. PMIC_GLINK gains support for retimer switches, safe mode is selected when the cable is disconnected from altmode and the same is enabled for SM8550. An off-by-one string length check is corrected in the QMI encoder decoder library. The RPMh tracepoints are extended to include the state of the request, to provide needed context in the traced events. The series from Ulf creating a genpd framework is integrated, to facilitate the other changes to the cpr, rpmpd and rpmhpd driver. SDX75 support is added to the rpmhpd driver, and the rpmpd driver is extended with the same sync_state logic found in the rpmhpd driver. The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019 platform is dropped. Clock handling in the GSBI driver is cleaned up with the use of devm_clk_get_enabled(). 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An abstraction for the RPM subsystem is introduced, to make align the structure of the SMD and GLINK nodes thereof with the structure when a remoteproc is involved. This is done to facilitate associating additional entities with the RPM subsystem. The qmp_send() API is modified to not expose hardware requirements onto the client drivers, and then further extended to allow command formatting directly in the API, to facilitate this typical use case. In the Qualcomm Command DB driver, NUL characters previously included in identifiers are dropped from the debugfs, to facilitate scripting. The thresholds of the BWMON driver are simplified to avoid hard coded starting values. The OCMEM driver is updated with some cleanups and fixes, and addition of MSM8226 support. PMIC_GLINK gains support for retimer switches, safe mode is selected when the cable is disconnected from altmode and the same is enabled for SM8550. An off-by-one string length check is corrected in the QMI encoder decoder library. The RPMh tracepoints are extended to include the state of the request, to provide needed context in the traced events. The series from Ulf creating a genpd framework is integrated, to facilitate the other changes to the cpr, rpmpd and rpmhpd driver. SDX75 support is added to the rpmhpd driver, and the rpmpd driver is extended with the same sync_state logic found in the rpmhpd driver. The socinfo driver gains knowledge about SM4450 and SM7125, the IPQ5019 platform is dropped. Clock handling in the GSBI driver is cleaned up with the use of devm_clk_get_enabled(). The list of VMIDs defined for the SCM assign memory interface is extended. * tag 'qcom-drivers-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (52 commits) soc: qcom: aoss: Tidy up qmp_send() callers soc: qcom: aoss: Format string in qmp_send() soc: qcom: aoss: Move length requirements from caller dt-bindings: firmware: qcom: scm: Updating VMID list dt-bindings: qcom: Update RPMHPD entries for some SoCs soc: qcom: qmi_encdec: Restrict string length in decode soc: qcom: smem: Fix incompatible types in comparison soc: qcom: ocmem: add missing clk_disable_unprepare() in ocmem_dev_probe() soc: qcom: socinfo: Add SoC ID for SM7125 dt-bindings: arm: qcom,ids: Add SoC ID for SM7125 dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID soc: qcom: socinfo: drop the IPQ5019 SoC ID soc: qcom: socinfo: add SM4450 ID dt-bindings: arm: qcom,ids: add SoC ID for SM4450 soc: qcom: pmic_glink: enable altmode for SM8550 soc: qcom: pmic_glink_altmode: add retimer-switch support soc: qcom: pmic_glink_altmode: handle safe mode when disconnect soc: qcom: rpmhpd: Add SDX75 power domains dt-bindings: power: qcom,rpmpd: Add compatible for sdx75 genpd: Makefile: build imx ... Link: https://lore.kernel.org/r/20230818023338.2484467-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Etienne Carriere
|
fe95052fc7 |
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
Adds SCMI regulator identifiers for STM32MP13x family. Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
||
|
Robert Marko
|
268edfe96a |
dt-bindings: clock: qcom: ipq4019: add missing networking resets
Add bindings for the missing networking resets found in IPQ4019 GCC. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230814104119.96858-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Krzysztof Kozlowski
|
b3f9581aff |
dt-bindings: clock: samsung: remove define with number of clocks
Number of clocks supported by Linux drivers might vary - sometimes we add new clocks, not exposed previously. Therefore these numbers of clocks should not be in the bindings, as that prevents changing them. Remove it entirely from the bindings, once Linux drivers stopped using them. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20230808082738.122804-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Arnd Bergmann
|
99355a235a |
TI K3 device tree updates for v6.6
New Boards:
- TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
- TI's AM62P5 Starter Kit (SK)
New features:
AM625:
- Support for Display (parallel only) - hdmi+audio support for
AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
for verdin.
- MCU MCAN support and enable of Toradex Verdin
- Toradex Verdin Dahlia audio support
AM62A7:
- MCU MCAN support
- Enable USB Dual Role Device(DRD) support for AM62A7
Starter Kit(SK).
AM64:
- TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
- Main domain CPSW9G and correponding gateway/ethernet
switch expansion - GESI board.
J721S2/AM68:
- New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
- Main domain CPSW2G and correponding gateway/ethernet
switch expansion - GESI board.
J784S4/AM69:
- Boot phase tag marking in device tree
- UFS support
Cleanups and non-urgent fixes:
- Cosmetic style fixups around "=" and "{" whitespace usage.
- Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
bindings
- Serdes header file include/dt-bindings/mux/ti-serdes.h is now
deprecated, use k3-serdes.h in soc dtsi folder.
- All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
board level.
- Fixups for AM62: Crypto powerdomains are conditional to better
represent control of the crypto engines by security controller.
- Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
- Fixups for j721s2/am68: pimux offsets for OSPI.
- Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
ranges for wkup/main gpios
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Merge tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.6
New Boards:
- TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
- TI's AM62P5 Starter Kit (SK)
New features:
AM625:
- Support for Display (parallel only) - hdmi+audio support for
AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
for verdin.
- MCU MCAN support and enable of Toradex Verdin
- Toradex Verdin Dahlia audio support
AM62A7:
- MCU MCAN support
- Enable USB Dual Role Device(DRD) support for AM62A7
Starter Kit(SK).
AM64:
- TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
- Main domain CPSW9G and correponding gateway/ethernet
switch expansion - GESI board.
J721S2/AM68:
- New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
- Main domain CPSW2G and correponding gateway/ethernet
switch expansion - GESI board.
J784S4/AM69:
- Boot phase tag marking in device tree
- UFS support
Cleanups and non-urgent fixes:
- Cosmetic style fixups around "=" and "{" whitespace usage.
- Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
bindings
- Serdes header file include/dt-bindings/mux/ti-serdes.h is now
deprecated, use k3-serdes.h in soc dtsi folder.
- All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
board level.
- Fixups for AM62: Crypto powerdomains are conditional to better
represent control of the crypto engines by security controller.
- Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
- Fixups for j721s2/am68: pimux offsets for OSPI.
- Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
ranges for wkup/main gpios
* tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (68 commits)
arm64: dts: ti: verdin-am62: Add DSI display support
arm64: dts: ti: Add support for the AM62P5 Starter Kit
arm64: dts: ti: Introduce AM62P5 family of SoCs
dt-bindings: arm: ti: Add bindings for AM62P5 SoCs
arm64: dts: ti: k3-am69-sk: Add phase tags marking
arm64: dts: ti: k3-j784s4-evm: Add phase tags marking
arm64: dts: ti: k3-j784s4: Add phase tags marking
arm64: dts: ti: k3-am625-beagleplay: Add HDMI support
arm64: dts: ti: am62x-sk: Add overlay for HDMI audio
arm64: dts: ti: k3-am62x-sk-common: Add HDMI support
arm64: dts: ti: k3-am62-main: Add node for DSS
arm64: dts: ti: k3-am62x-sk-common: Update main-i2c1 frequency
arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
arm64: dts: ti: k3-j784s4: Enable C7x DSP nodes at the board level
arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level
arm64: dts: ti: k3-*: fix fss node dtbs check warnings
arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
...
Link: https://lore.kernel.org/r/20230814160651.frxohyshd2evp2k4@expenses
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Marco Felsch
|
35ec2abb54 |
dt-bindings: clocks: imx8mp: make sai4 a dummy clock
The hardware don't have a SAI4 instance so remove the define. Use a
comment to keep it as reference and to avoid confusion.
Fixes:
|
||
|
Shengjiu Wang
|
a70cd8cdf7 |
dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support
Add the clock dt-binding file for Audio Clock Mux. which is the IP for i.MX8QM, i.MX8QXP, i.MX8DXL. Add the clockid for clocks in header file. The Audio Clock Mux is binded with all the audio IP and audio clocks in the subsystem, so need to list the power domain of related clocks and IPs. Each clock and IP has a power domain, so there are so many power domains. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/1690260984-25744-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
||
|
Otto Pflüger
|
593576a369 |
dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
Add the missing #define for GPLL0_SLEEP_CLK_SRC, the parent clock of GPLL0_EARLY. Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230802170317.205112-2-otto.pflueger@abscue.de Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Imran Shaik
|
df873243b2 |
dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
Add support for GCC_GPLL1_OUT_EVEN and GCC_DDRSS_ECPRI_GSI_CLK clock bindings for QDU1000 and QRU1000 SoCs. While at it, update the maintainers list. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230803105741.2292309-2-quic_imrashai@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Bjorn Andersson
|
9328ecb29d |
Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into arm64-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants for use in the MSM8998 DeviceTree source. |
||
|
Bjorn Andersson
|
9d1f3f343b |
Merge branch '20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org' into clk-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants through a topic branch to make them available to the DeviceTree source tree as well. |
||
|
Konrad Dybcio
|
238e192bed |
dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs
GPLL0 has two separate outputs to both GPUSS and MMSS: one that's 2-divided and one that runs at the same rate as the GPLL0 itself. Add the missing ones to the binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Gokul krishna Krishnakumar
|
f9eac7e029 |
dt-bindings: firmware: qcom: scm: Updating VMID list
Adding the full list of VMID's, which are used by different clients to pass to the secure world. Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230403204455.6758-1-quic_gokukris@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Bjorn Andersson
|
c02a547da3 |
Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into arm64-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines. |
||
|
Bjorn Andersson
|
2f6be35d7c |
Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into clk-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines. |
||
|
Sricharan Ramabadhran
|
f62d184ef7 |
dt-bindings: clock: Add IPQ5018 clock and reset
This patch adds support for the global clock controller found on the IPQ5018 based devices. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Neil Armstrong
|
40fb677285 |
dt-bindings: clk: axg-audio-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every axg-audio-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-14-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
09d65c0267 |
dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every A1 pll ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-13-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
||
|
Neil Armstrong
|
57049a1cfc |
dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every A1 peripherals ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-12-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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|
Neil Armstrong
|
165a194195 |
dt-bindings: clk: meson8b-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every meson8b-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-11-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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|
Neil Armstrong
|
6655744d9a |
dt-bindings: clk: g12a-aoclkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every g12a-aoclkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-10-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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|
Neil Armstrong
|
b1262497a2 |
dt-bindings: clk: g12a-clks: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every g12a-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-9-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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|
Neil Armstrong
|
8fdbdc7918 |
dt-bindings: clk: axg-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every axg-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-8-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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|
Neil Armstrong
|
9ce8555278 |
dt-bindings: clk: gxbb-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every gxbb-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-7-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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|
Niravkumar L Rabara
|
d5f0942b50 |
dt-bindings: clock: add Intel Agilex5 clock manager
Add clock ID definitions for Intel Agilex5 SoCFPGA. The registers in Agilex5 handling the clock is named as clock manager. Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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|
Niravkumar L Rabara
|
2a29fe831f |
dt-bindings: reset: add reset IDs for Agilex5
Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use altr,rst-mgr-s10.h as common header file similar S10 & Agilex. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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|
Huqiang Qin
|
0e8ec0226e |
dt-bindings: interrupt-controller: Add header file for Amlogic Meson-G12A SoCs
Add a new dt-binding header that details the interrupt number of the GPIO. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230724060108.1403662-2-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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|
Chengci.Xu
|
d5cda142d6 |
dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU
Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor
translation table format.
In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video
output), the other is for vpp(video processing pipe). They connects
with different smi-larbs, then some setting(larbid_remap) is different.
Differentiate them with the compatible string.
Something like this:
IOMMU(VDO) IOMMU(VPP)
| |
SMI_COMMON_VDO SMI_COMMON_VPP
--------------- ----------------
| | ... | | ...
larb0 larb2 ... larb1 larb3 ...
We also have an IOMMU that is for infra master like PCIe.
And infra master don't have the larb and ports.
Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
|
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|
David Wronek
|
b1b52717be |
dt-bindings: arm: qcom,ids: Add SoC ID for SM7125
Add the SoC ID for Qualcomm SM7125. Signed-off-by: David Wronek <davidwronek@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230723190725.1619193-3-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Kathiravan T
|
cb160cd7b1 |
dt-bindings: arm: qcom,ids: drop the IPQ5019 SoC ID
IPQ5019 SoC is never productized. So lets drop it. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230724083745.1015321-3-quic_kathirav@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Tengfei Fan
|
4d641d2faf |
dt-bindings: arm: qcom,ids: add SoC ID for SM4450
Add the ID for the Qualcomm SM4450 SoC. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230731080043.38552-6-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Dmitry Baryshkov
|
9f08d33496 |
dt-bindings: clock: drop qcom,lcc-mdm9615 header file
The header file for qcom,lcc-mdm9615 and qcom,lcc-msm8960 is the same (as well as the drivers). Drop the qcom,lcc-mdm9615.h in favour of qcom,lcc-msm8960.h Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230512211727.3445575-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Xianwei Zhao
|
83b03d6293 |
dt-bindings: power: add Amlogic C3 power domains
Add devicetree binding document and related header file for Amlogic C3 secure power domains. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230707003710.2667989-3-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> |
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|
Jayesh Choudhary
|
5438d75fb9 |
dt-bindings: ti-serdes-mux: Deprecate header with constants
The constants to define the idle state of SERDES MUX were defined in
bindings header. They are used only in DTS and driver uses the dt property
to set the idle state making it unsuitable for bindings.
The constants are moved to header next to DTS ("arch/arm64/boot/dts/ti/")
and all the references to bindings header are removed.
So add a warning to mark this bindings header as deprecated.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/20230721125732.122421-3-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
|
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|
Chancel Liu
|
2fe182dd27 |
dt-bindings: clock: imx93: Add PDM IPG clk
Add PDM IPG clk. Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230628061724.2056520-1-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> |
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|
Huqiang Qin
|
e55ef16b84 |
dt-bindings: pinctrl: Add compatibles for Amlogic C3 SoCs
Add a new compatible name for Amlogic C3 pin controller, and add a new dt-binding header file which document the detail pin names. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230714122441.3098337-2-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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|
Bjorn Andersson
|
ca32bd384e |
Merge branch '1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com' into arm64-for-6.6
Merge the new generic RPMHPD defines from a topic branch, to alow them being used in DeviceTree source, and the driver. |
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|
Rohit Agarwal
|
7f31667d29 |
dt-bindings: power: qcom,rpmhpd: Add Generic RPMh PD indexes
Add Generic RPMh Power Domain indexes that can be used for all the Qualcomm SoC henceforth. The power domain indexes of these bindings are based on compatibility with current targets like SM8[2345]50 targets. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Dmitry Baryshkov
|
b7297d4566 |
dt-bindings: iio: adc: qcom,spmi-adc7: use predefined channel ids
Each of qcom,spmi-adc7-pm*.h headers define a set of ADC channels that can be used for monitoring on thie particular chip. Switch them to use channel IDs defined in the dt-bindings/iio/qcom,spmi-vadc.h header instead of specifying the numeric IDs. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230707123027.1510723-2-dmitry.baryshkov@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> |
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|
Dylan Hung
|
bbb8eb3cb0 |
dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
Add reset definitions of AST2600 I3C and MAC controllers. In the case of the I3C reset, since there is no reset-line hardware available for `ASPEED_RESET_I3C_DMA`, a new macro `ASPEED_RESET_I3C` with the same ID is introduced to provide a more accurate representation of the hardware. The old macro `ASPEED_RESET_I3C_DMA` is kept to provide backward compatibility. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Link: https://lore.kernel.org/r/20230718062616.2822339-1-dylan_hung@aspeedtech.com Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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|
Xingyu Wu
|
a097a5ec14 |
dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
Add bindings for the Video-Output clock and reset generator (VOUTCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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|
Xingyu Wu
|
9b3938c0b8 |
dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
Add bindings for the Image-Signal-Process clock and reset generator (ISPCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Xingyu Wu
|
14b14a57e6 |
dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
Add bindings for the System-Top-Group clock and reset generator (STGCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
||
|
Xingyu Wu
|
bd348ca24d |
dt-bindings: clock: Add StarFive JH7110 PLL clock generator
Add bindings for the PLL clock generator on the JH7110 RISC-V SoC. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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|
Georgi Djakov
|
10cb3abb99 |
Merge branch 'icc-sm8250-qup' into icc-next
SM8250 (like SM8150 but unlike all other QUP-equipped SoCs) doesn't provide a qup-core path. Adjust the bindings and drivers as necessary, and then describe the icc paths in the device tree. This makes it possible for interconnect sync_state succeed so long as you don't use UFS. * icc-sm8250-qup dt-bindings: interconnect: qcom,rpmh: Add SM8250 QUP virt dt-bindings: interconnect: qcom,sm8250: Add QUP virt interconnect: qcom: sm8250: Fix QUP0 nodes Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-0-9ba0a9460be2@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Konrad Dybcio
|
ddd6c5b9ee |
dt-bindings: interconnect: qcom,sm8250: Add QUP virt
Add the required defines for QUP_virt nodes. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-2-9ba0a9460be2@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
||
|
Bjorn Andersson
|
ad4e807f5f |
Merge branch '20230526-topic-smd_icc-v7-0-09c78c175546@linaro.org' into clk-for-6.6
This series reshuffles things around, moving the management of SMD RPM bus clocks to the interconnect framework where they belong. This helps us solve a couple of issues: 1. We can work towards unused clk cleanup of RPMCC without worrying about it killing some NoC bus, resulting in the SoC dying. Deasserting actually unused RPM clocks (among other things) will let us achieve "true SoC-wide power collapse states", also known as VDD_LOW and VDD_MIN. 2. We no longer have to keep tons of quirky bus clock ifs in the icc driver. You either have a RPM clock and call "rpm set rate" or you have a single non-RPM clock (like AHB_CLK_SRC) or you don't have any. 3. There's less overhead - instead of going through layers and layers of the CCF, ratesetting comes down to calling max() and sending a single RPM message. ICC is very very dynamic so that's a big plus. The clocks still need to be vaguely described in the clk-smd-rpm driver, as it gives them an initial kickoff, before actually telling RPM to enable DVFS scaling. After RPM receives that command, all clocks that have not been assigned a rate are considered unused and are shut down in hardware, leading to the same issue as described in point 1. We can consider marking them __initconst in the future, but this series is very fat even without that.. Apart from that, it squashes a couple of bugs that really need fixing.. The series is merged through a topic branch to manage the dependencies between interconnect, Qualcomm clocks and Qualcomm SoC. |
||
|
Konrad Dybcio
|
7296bd3f00 |
dt-bindings: interconnect: Add Qcom RPM ICC bindings
The SMD RPM interconnect driver requires different icc tags to the RPMh driver. Add bindings to reflect that. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Link: https://lore.kernel.org/r/20230526-topic-smd_icc-v7-1-09c78c175546@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Bjorn Andersson
|
b1260cee1c |
Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' into arm64-for-6.6
Merge a set of new SC8280XP GCC GDSC constants from a topic branch, in order to allow them being used in DeviceTree source. |
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|
Bjorn Andersson
|
5605164aa8 |
Merge branch '20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org' into clk-for-6.6
Merge a set of new SC8280XP GCC GDSC constants through a topic branch, to allow them being introduce into the DeviceTree source as well. |
||
|
Konrad Dybcio
|
9eba4db02a |
dt-bindings: clock: qcom,gcc-sc8280xp: Add missing GDSCs
There are 10 more GDSCs that we've not been caring about, and by extension
(and perhaps even more importantly), not putting to sleep. Add them.
Fixes:
|
||
|
Varadarajan Narayanan
|
85c0d23009 |
dt-bindings: clock: Add USB related clocks for IPQ9574
Add the clocks needed for enabling USB in IPQ9574 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com [bjorn: Split from driver patch, to allow merging into dts tree] Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Linus Torvalds
|
b869e9f499 |
Another set of clk driver updates and fixes for the merge window. The
driver updates needed more time to bake in linux-next.
Updates:
- Support for more clk controllers in Qualcomm SoCs such as SM8350,
SM8450, SDX75, SC8280XP, and IPQ9574
- Runtime PM enablement of some more Qualcomm clk controllers
- Various fixes to Qualcomm clk driver data to use correct clk_ops
and to check halt bits properly
- AT91 updates to modernize with clk_parent_data structures
Fixes:
- Remove "syscon" from dt binding fix for ti,j721e-system-controller
- Fix determine rate in the Tegra driver that got wrecked by the
refactorting of muxes this merge window
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull more clk updates from Stephen Boyd:
"Another set of clk driver updates and fixes for the merge window. The
driver updates needed more time to bake in linux-next.
Updates:
- Support for more clk controllers in Qualcomm SoCs such as SM8350,
SM8450, SDX75, SC8280XP, and IPQ9574
- Runtime PM enablement of some more Qualcomm clk controllers
- Various fixes to Qualcomm clk driver data to use correct clk_ops
and to check halt bits properly
- AT91 updates to modernize with clk_parent_data structures
Fixes:
- Remove 'syscon' from dt binding fix for ti,j721e-system-controller
- Fix determine rate in the Tegra driver that got wrecked by the
refactorting of muxes this merge window"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (69 commits)
clk: tegra: Avoid calling an uninitialized function
dt-bindings: mfd: ti,j721e-system-controller: Remove syscon from example
clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
clk: at91: sama7g5: switch to parent_hw and parent_data
clk: at91: sckc: switch to parent_data/parent_hw
clk: at91: clk-sam9x60-pll: add support for parent_hw
clk: at91: clk-utmi: add support for parent_hw
clk: at91: clk-system: add support for parent_hw
clk: at91: clk-programmable: add support for parent_hw
clk: at91: clk-peripheral: add support for parent_hw
clk: at91: clk-master: add support for parent_hw
clk: at91: clk-generated: add support for parent_hw
clk: at91: clk-main: add support for parent_data/parent_hw
clk: qcom: gcc-sc8280xp: Add runtime PM
clk: qcom: gpucc-sc8280xp: Add runtime PM
clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
clk: qcom: gpucc-sm6375: Enable runtime pm
dt-bindings: clock: sm6375-gpucc: Add VDD_GX
clk: qcom: gcc-sm6115: Add missing PLL config properties
clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
...
|
||
|
Linus Torvalds
|
44aeec836d |
Char/Misc and other driver subsystem updates for 6.5-rc1
Here is the big set of char/misc and other driver subsystem updates for
6.5-rc1.
Lots of different, tiny, stuff in here, from a range of smaller driver
subsystems, including pulls from some substems directly:
- IIO driver updates and additions
- W1 driver updates and fixes (and a new maintainer!)
- FPGA driver updates and fixes
- Counter driver updates
- Extcon driver updates
- Interconnect driver updates
- Coresight driver updates
- mfd tree tag merge needed for other updates
on top of that, lots of small driver updates as patches, including:
- static const updates for class structures
- nvmem driver updates
- pcmcia driver fix
- lots of other small driver updates and fixes
All of these have been in linux-next for a while with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull Char/Misc updates from Greg KH:
"Here is the big set of char/misc and other driver subsystem updates
for 6.5-rc1.
Lots of different, tiny, stuff in here, from a range of smaller driver
subsystems, including pulls from some substems directly:
- IIO driver updates and additions
- W1 driver updates and fixes (and a new maintainer!)
- FPGA driver updates and fixes
- Counter driver updates
- Extcon driver updates
- Interconnect driver updates
- Coresight driver updates
- mfd tree tag merge needed for other updates on top of that, lots of
small driver updates as patches, including:
- static const updates for class structures
- nvmem driver updates
- pcmcia driver fix
- lots of other small driver updates and fixes
All of these have been in linux-next for a while with no reported
problems"
* tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (243 commits)
bsr: fix build problem with bsr_class static cleanup
comedi: make all 'class' structures const
char: xillybus: make xillybus_class a static const structure
xilinx_hwicap: make icap_class a static const structure
virtio_console: make port class a static const structure
ppdev: make ppdev_class a static const structure
char: misc: make misc_class a static const structure
/dev/mem: make mem_class a static const structure
char: lp: make lp_class a static const structure
dsp56k: make dsp56k_class a static const structure
bsr: make bsr_class a static const structure
oradax: make 'cl' a static const structure
hwtracing: hisi_ptt: Fix potential sleep in atomic context
hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU
hwtracing: hisi_ptt: Export available filters through sysfs
hwtracing: hisi_ptt: Add support for dynamically updating the filter list
hwtracing: hisi_ptt: Factor out filter allocation and release operation
samples: pfsm: add CC_CAN_LINK dependency
misc: fastrpc: check return value of devm_kasprintf()
coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable()
...
|
||
|
Linus Torvalds
|
c156d4af43 |
- New Drivers
- Add support for Intel Cherry Trail Whiskey Cove PMIC LEDs
- Add support for Awinic AW20036/AW20054/AW20072 LEDs
- New Device Support
- Add support for PMI632 LPG to QCom LPG
- Add support for PMI8998 to QCom Flash
- Add support for MT6331, WLEDs and MT6332 to Mediatek MT6323 PMIC
- New Functionality
- Implement the LP55xx Charge Pump
- Add support for suspend / resume to Intel Cherry Trail Whiskey Cove PMIC
- Add support for breathing mode to Intel Cherry Trail Whiskey Cove PMIC
- Enable per-pin resolution Pinctrl in LEDs GPIO
- Fix-ups
- Allow thread to sleep by switching from spinlock to mutex
- Add lots of Device Tree bindings / support
- Adapt relationships / dependencies driven by Kconfig
- Switch I2C drivers from .probe_new() to .probe()
- Remove superfluous / duplicate code
- Replace strlcpy() with strscpy() for efficiency and overflow prevention
- Staticify various functions
- Trivial: Fixing coding style
- Simplify / reduce code
- Bug Fixes
- Prevent NETDEV_LED_MODE_LINKUP from being cleared on rename
- Repair race between led_set_brightness(LED_{OFF,FULL})
- Fix Oops relating to sleeping in critical sections
- Clear LED_INIT_DEFAULT_TRIGGER flag when clearing the current trigger
- Do not leak resources in error handling paths
- Fix unsigned comparison which can never be negative
- Provide missing NULL terminating entries in tables
- Fix misnaming issues
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Merge tag 'leds-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
Pull LED updates from Lee Jones:
"New Drivers:
- Add support for Intel Cherry Trail Whiskey Cove PMIC LEDs
- Add support for Awinic AW20036/AW20054/AW20072 LEDs
New Device Support:
- Add support for PMI632 LPG to QCom LPG
- Add support for PMI8998 to QCom Flash
- Add support for MT6331, WLEDs and MT6332 to Mediatek MT6323 PMIC
New Functionality:
- Implement the LP55xx Charge Pump
- Add support for suspend / resume to Intel Cherry Trail Whiskey Cove PMIC
- Add support for breathing mode to Intel Cherry Trail Whiskey Cove PMIC
- Enable per-pin resolution Pinctrl in LEDs GPIO
Fix-ups:
- Allow thread to sleep by switching from spinlock to mutex
- Add lots of Device Tree bindings / support
- Adapt relationships / dependencies driven by Kconfig
- Switch I2C drivers from .probe_new() to .probe()
- Remove superfluous / duplicate code
- Replace strlcpy() with strscpy() for efficiency and overflow prevention
- Staticify various functions
- Trivial: Fixing coding style
- Simplify / reduce code
Bug Fixes:
- Prevent NETDEV_LED_MODE_LINKUP from being cleared on rename
- Repair race between led_set_brightness(LED_{OFF,FULL})
- Fix Oops relating to sleeping in critical sections
- Clear LED_INIT_DEFAULT_TRIGGER flag when clearing the current trigger
- Do not leak resources in error handling paths
- Fix unsigned comparison which can never be negative
- Provide missing NULL terminating entries in tables
- Fix misnaming issues"
* tag 'leds-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (53 commits)
leds: leds-mt6323: Adjust return/parameter types in wled get/set callbacks
leds: sgm3140: Add richtek,rt5033-led compatible
dt-bindings: leds: sgm3140: Document richtek,rt5033 compatible
dt-bindings: backlight: kinetic,ktz8866: Add missing type for "current-num-sinks"
dt-bindings: leds: Drop unneeded quotes
leds: Fix config reference for AW200xx driver
leds: leds-mt6323: Add support for WLEDs and MT6332
leds: leds-mt6323: Add support for MT6331 leds
leds: leds-mt6323: Open code and drop MT6323_CAL_HW_DUTY macro
leds: leds-mt6323: Drop MT6323_ prefix from macros and defines
leds: leds-mt6323: Specify registers and specs in platform data
dt-bindings: leds: leds-mt6323: Document mt6332 compatible
dt-bindings: leds: leds-mt6323: Document mt6331 compatible
leds: simatic-ipc-leds-gpio: Introduce more Kconfig switches
leds: simatic-ipc-leds-gpio: Split up into multiple drivers
leds: simatic-ipc-leds-gpio: Move two extra gpio pins into another table
leds: simatic-ipc-leds-gpio: Add terminating entries to gpio tables
leds: flash: leds-qcom-flash: Fix an unsigned comparison which can never be negative
leds: cht-wcove: Remove unneeded semicolon
leds: cht-wcove: Fix an unsigned comparison which can never be negative
...
|
||
|
Linus Torvalds
|
b8ec70ab66 |
- New Drivers
- Add support for TI TPS6594/TPS6593/LP8764 PMICs
- Add support for Samsung RT5033 Battery Charger
- Add support for Analog Devices MAX77540 and MAX77541 PMICs
- New Device Support
- Add support for SPI to Rockchip RK808 (and friends)
- Add support for AXP192 PMIC to X-Powers AXP20X
- Add support for AXP313a PMIC to X-Powers AXP20X
- Add support for RK806 to Rockchip RK8XX
- Removed Device Support
- Removed MFD support for Richtek RT5033 Battery
- Fix-ups
- Remove superfluous code
- Switch I2C drivers from .probe_new() to .probe()
- Convert over to managed resources (devm_*(), etc)
- Use dev_err_probe() for returning errors from .probe()
- Add lots of Device Tree bindings / support
- Improve cache efficiency by switching to Maple
- Use own exported namespaces (NS)
- Include missing and remove superfluous headers
- Start using / convert to the new shutdown sys-off API
- Trivial: variable / define renaming
- Make use of of_property_read_reg() when requesting DT 'reg's
- Bug Fixes
- Fix chip revision readout due to incorrect data masking
- Amend incorrect register and mask values used for charger state
- Hide unused functionality at compile time
- Fix resource leaks following error handling routines
- Return correct error values and fix error handling in general
- Repair incorrect device names - used for device matching
- Remedy broken module auto-loading
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Merge tag 'mfd-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Drivers:
- Add support for TI TPS6594/TPS6593/LP8764 PMICs
- Add support for Samsung RT5033 Battery Charger
- Add support for Analog Devices MAX77540 and MAX77541 PMICs
New Device Support:
- Add support for SPI to Rockchip RK808 (and friends)
- Add support for AXP192 PMIC to X-Powers AXP20X
- Add support for AXP313a PMIC to X-Powers AXP20X
- Add support for RK806 to Rockchip RK8XX
Removed Device Support:
- Removed MFD support for Richtek RT5033 Battery
Fix-ups:
- Remove superfluous code
- Switch I2C drivers from .probe_new() to .probe()
- Convert over to managed resources (devm_*(), etc)
- Use dev_err_probe() for returning errors from .probe()
- Add lots of Device Tree bindings / support
- Improve cache efficiency by switching to Maple
- Use own exported namespaces (NS)
- Include missing and remove superfluous headers
- Start using / convert to the new shutdown sys-off API
- Trivial: variable / define renaming
- Make use of of_property_read_reg() when requesting DT 'reg's
Bug Fixes:
- Fix chip revision readout due to incorrect data masking
- Amend incorrect register and mask values used for charger state
- Hide unused functionality at compile time
- Fix resource leaks following error handling routines
- Return correct error values and fix error handling in general
- Repair incorrect device names - used for device matching
- Remedy broken module auto-loading"
* tag 'mfd-next-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (51 commits)
dt-bindings: mfd: max77541: Add ADI MAX77541/MAX77540
iio: adc: max77541: Add ADI MAX77541 ADC Support
regulator: max77541: Add ADI MAX77541/MAX77540 Regulator Support
dt-bindings: regulator: max77541: Add ADI MAX77541/MAX77540 Regulator
mfd: Switch two more drivers back to use struct i2c_driver::probe
dt-bindings: mfd: samsung,s5m8767: Simplify excluding properties
mfd: stmpe: Only disable the regulators if they are enabled
mfd: max77541: Add ADI MAX77541/MAX77540 PMIC Support
dt-bindings: mfd: gateworks-gsc: Remove unnecessary fan-controller nodes
mfd: core: Use of_property_read_reg() to parse "reg"
mfd: stmfx: Nullify stmfx->vdd in case of error
mfd: stmfx: Fix error path in stmfx_chip_init
mfd: intel-lpss: Add missing check for platform_get_resource
mfd: stpmic1: Add PMIC poweroff via sys-off handler
mfd: stpmic1: Fixup main control register and bits naming
dt-bindings: mfd: qcom,tcsr: Add the compatible for IPQ8074
mfd: tps65219: Add support for soft shutdown via sys-off API
mfd: pm8008: Drop bogus i2c module alias
mfd: pm8008: Fix module autoloading
mfd: tps65219: Add GPIO cell instance
...
|
||
|
Linus Torvalds
|
28968f384b |
Pin control changes for the v6.5 kernel cycle:
No core changes this time. New drivers: - Tegra234 support. - Qualcomm IPQ5018 support. - Intel Meteor Lake-S support. - Qualcomm SDX75 subdriver. - Qualcomm SPMI-based PM8953 support. Improvements: - Fix up support for GPIO3 on the AXP209. - Push-pull drive configuration support for the AT91 PIO4. - Fix misc non-urgent bugs in the AMD driver. - Misc non-urgent improved error handling. - Misc janitorial and minor improvements. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmSdNYkACgkQQRCzN7AZ XXN/Cw/+KLRYq3iBC4u8OkII9aDdCxyR+0QV/zz/ZeiEN54tICrymSSE3SG3jw13 MMxAlZ3Yi/H1VelCrq+/2wLB8ydL+QnrQbs47JaIftdqfybgyyvHd354jtRktqQ2 NS1Nxbog1uljwjj835XXx5CV0JSTXhFQXAGc3a06ZV/JdoixazsHWrlRn9vGY3VX umb/cIaNBeQ4p9QBusV7hiz/KFfC90YyJvEfNlmXxahcd25011Hq+dLFj4jsWbud 4eEMag+zoxdSdORBU789Kjxejx1maGTyuGzWuQ/rkDgcG00pZf454ShLlbUsPdui TaU6gKC8/EBAp5rgtf1tGXF42sJEKpKsDmzzdYojLq3PH/H03r3qqB7VLqmXlehn mq5eP0DXgcdcsp/dkVa3jrWTvGPRcGfF996L3X2odl8YhoHrd6qbhYLjknZW8Eph QOcyHdtJfjZjJQnM9FfljAD5GSKfyIAhc5PX9yAkkN8mQlw8px4Z9Cqn/F0B57o7 K8FWSkgeM5chZ5Xy+C7TYw6yLsG2WuYahKd+mmUMVrEfAJg+ZUQRpXdoPDLNBkYQ PkL/MoNUpwsaFMu8ATgpIcUAQsfF57Yv8t1OOLg/GLupGqOtCgHb5dvbWstiFcN4 r4Wew7i2cadXJnL8WBpqdpbye1rsVh0I/ANoN6o2AbEz1yfe7Eo= =MMUo -----END PGP SIGNATURE----- Merge tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - Tegra234 support - Qualcomm IPQ5018 support - Intel Meteor Lake-S support - Qualcomm SDX75 subdriver - Qualcomm SPMI-based PM8953 support Improvements: - Fix up support for GPIO3 on the AXP209 - Push-pull drive configuration support for the AT91 PIO4 - Fix misc non-urgent bugs in the AMD driver - Misc non-urgent improved error handling - Misc janitorial and minor improvements" * tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: cherryview: Drop goto label pinctrl: baytrail: invert if condition pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook pinctrl: tegra: avoid duplicate field initializers dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function pinctrl: mlxbf3: remove broken Kconfig 'select' pinctrl: spear: Remove unused of_gpio.h inclusion pinctrl: lantiq: Remove unused of_gpio.h inclusion pinctrl: at91-pio4: check return value of devm_kasprintf() pinctrl: microchip-sgpio: check return value of devm_kasprintf() pinctrl: freescale: Fix a memory out of bounds when num_configs is 1 pinctrl: intel: refine ->irq_set_type() hook pinctrl: intel: refine ->set_mux() hook pinctrl: baytrail: Use str_hi_lo() helper lib/string_choices: Add str_high_low() helper lib/string_helpers: Split out string_choices.h lib/string_helpers: Add missing header files to MAINTAINERS database pinctrl: npcm7xx: Add missing check for ioremap pinctrl:sunplus: Add check for kmalloc ... |
||
|
Linus Torvalds
|
e4c8d01865 |
ARM: SoC drivers for 6.5
Nothing surprising in the SoC specific drivers, with the usual updates:
* Added or improved SoC driver support for Tegra234, Exynos4121, RK3588,
as well as multiple Mediatek and Qualcomm chips
* SCMI firmware gains support for multiple SMC/HVC transport and version
3.2 of the protocol
* Cleanups amd minor changes for the reset controller, memory controller,
firmware and sram drivers
* Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
amlogic and renesas SoC specific drivers
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Merge tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Nothing surprising in the SoC specific drivers, with the usual
updates:
- Added or improved SoC driver support for Tegra234, Exynos4121,
RK3588, as well as multiple Mediatek and Qualcomm chips
- SCMI firmware gains support for multiple SMC/HVC transport and
version 3.2 of the protocol
- Cleanups amd minor changes for the reset controller, memory
controller, firmware and sram drivers
- Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
amlogic and renesas SoC specific drivers"
* tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (118 commits)
dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding
MAINTAINERS: add PHY-related files to Amlogic SoC file list
drivers: meson: secure-pwrc: always enable DMA domain
tee: optee: Use kmemdup() to replace kmalloc + memcpy
soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
dt-bindings: sram: qcom,imem: document qdu1000
soc: qcom: icc-bwmon: Fix MSM8998 count unit
dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
soc: qcom: socinfo: Add Soc ID for IPQ5300
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
soc: qcom: Fix a IS_ERR() vs NULL bug in probe
soc: qcom: socinfo: Add support for new fields in revision 19
soc: qcom: socinfo: Add support for new fields in revision 18
dt-bindings: firmware: scm: Add compatible for SDX75
soc: qcom: mdt_loader: Fix split image detection
dt-bindings: memory-controllers: drop unneeded quotes
soc: rockchip: dtpm: use C99 array init syntax
firmware: tegra: bpmp: Add support for DRAM MRQ GSCs
soc/tegra: pmc: Use devm_clk_notifier_register()
soc/tegra: pmc: Simplify debugfs initialization
...
|
||
|
Linus Torvalds
|
a9025a5f16 |
ARM: New SoC support for 6.5
There are two new SoC families this time, and both appear fairly similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core Cortex-A35 based chips for the low-power industrial embedded market, and they mark the first 64-bit product in a widely used family of 32-bit Arm MCUs and SoCs. The way into the kernel is completely different here: The team at ST has a long history of working upstream with their STM32MP1 and other SoCs, and they produced a complete port to arm64 together with the initial announcement. Nuvoton also has multiple SoC product lines with current or previous upstream support, but those are maintained by third parties and are unrelated. The patch series from Nuvoton's Jacky Huang had to go through many revisisions to get to this point and is still missing a few drivers including the serial port for the moment. The branch contains the devicetree files as well as all the code changes, in order to have something that can be tested standalone. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmScqtkACgkQYKtH/8kJ Uifqyg//XgvZBxb/2GILYcThVgLoo1fYA9tG5M0LERY/aPiUwrCwIl5swGQXK4vK E3UBLsQURer4yEBRq7iB6RGbwa4Opjdy3yTkj6WSgEMPh6e6jGvmm+dJ7HuWeviS 8oeyo3Xar6tIF+A8xlBloHA4J6690FYB40McQzh8sWG5SE+id56S71NGnNW0kQTn wsul9BZcGVoyMYNBi/uXtOVUPy7jF3UBC3HJF9UOT7q77bCLjVc/aHmmnZ3zmbYA 2oX3X5hVJakFba6vnz+rjNlzuAoGXJPDdsKFxBysdsksac/TxqRIQGNe75DZZVgz ESTpt1QqjmCFw32HEzi8Ne22FOpzlBqUxBMznHPenpz1/om2ezs3q7ffuPqKvMaq PANuK++JKJaBChVMzJbn84Sr1fvO4ecGJpKZTFC6t6SqHQNQFJT6rfMHx01Xw2wW LjKfEBCR6zEXN0+FaaujgJ4y/9pH1VHPynrZJG9WEwPUEZb2kJ/2RMXjNpzOWKiB pWYV1oW2TqFKYKhFm/pjkbi6Rq76UwEi8fWWoGMkmeV3KZ/0GFauQhItu6mX3s7W uGnUQyrBzWzUoashYFuNtXKHYdwuWgOmG660BXHkyxwvqV96ICGEJ+97zGIBDj81 F8zLxEjPbsEZqGGSosAyk9oYC6eh7eK2V7xx+CUYLTuKZw13zNo= =zaVi -----END PGP SIGNATURE----- Merge tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull new ARM SoC support from Arnd Bergmann: "There are two new SoC families this time, and both appear fairly similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core Cortex-A35 based chips for the low-power industrial embedded market, and they mark the first 64-bit product in a widely used family of 32-bit Arm MCUs and SoCs. The way into the kernel is completely different here: The team at ST has a long history of working upstream with their STM32MP1 and other SoCs, and they produced a complete port to arm64 together with the initial announcement. Nuvoton also has multiple SoC product lines with current or previous upstream support, but those are maintained by third parties and are unrelated. The patch series from Nuvoton's Jacky Huang had to go through many revisisions to get to this point and is still missing a few drivers including the serial port for the moment. The branch contains the devicetree files as well as all the code changes, in order to have something that can be tested standalone" * tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) clk: nuvoton: Use clk_parent_data instead of string for parent clock clk: nuvoton: Update all constant hex values to lowercase clk: nuvoton: Add clk-ma35d1.h for driver extern functions remoteproc: stm32: use correct format strings on 64-bit MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE arm64: defconfig: enable ARCH_STM32 and STM32 serial driver arm64: dts: st: add stm32mp257f-ev1 board support dt-bindings: stm32: document stm32mp257f-ev1 board arm64: dts: st: introduce stm32mp25 pinctrl files arm64: dts: st: introduce stm32mp25 SoCs family arm64: introduce STM32 family on Armv8 architecture dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon pinctrl: stm32: add stm32mp257 pinctrl support dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages Documentation/process: add soc maintainer handbook reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35 reset: Add Nuvoton ma35d1 reset driver support clk: nuvoton: Add clock driver for ma35d1 clock controller arm64: dts: nuvoton: Add initial ma35d1 device tree dt-bindings: serial: Document ma35d1 uart controller ... |
||
|
Linus Torvalds
|
6c1561fb90 |
ARM: SoC devicetree updates for 6.5
The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for each
SoC vendor, following the same scheme that is used on arm64, mips and
riscv. This has been discussed for many years, but so far we never did
this as there was a plan to move the files out of the kernel entirely,
which has never happened.
The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.
There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along
with their device drivers.
* The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the time.
* Amlogic C3 is a Cortex-A35 based smart IP camera chip
* Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.
* Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.
* Qualcomm SDX75 is the latest generation modem chip that is used
as a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
* Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie
C910 core, a step up from all previously added rv64 chips.
All of the above come with reference board implementations, those included
there are 39 new board files, but only five more 32-bit this time, probably
a new low:
* Marantec Maveo board based on dhcor imx6ull module
* Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
* Epson Moverio BT-200 AR glasses based on TI OMAP4
* PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
* ICnova ADB4006 board based on Allwinner A20
On the 64-bit side, there are also fewer addded machines than
we had in the recent releases:
* Three boards based on NXP i.MX8: Emtop SoM & Baseboard,
NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice
gw7905-2x device.
* NVIDIA IGX Orin and Jetson Orin Nano boards, both based on
tegra234
* Qualcomm gains support for 6 reference boards on various members
of their IPQ networking SoC series, as well as the Sony Xperia M4
Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board
on top of the various reference platforms for their new chips.
* Rockchips support for several newer boards: Indiedroid Nova (rk3588),
Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C
Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S
(rk3568)
* TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin
family with AM62 COM, carrier and dev boards
Other changes to existing boards contain the usual minor improvements
along with
* continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names
* support for devicetree overlays on at91, bcm283x
* significant additions to existing SoC support on mediatek, qualcomm,
ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1
As usual, a lot more detail is available in the individual merge
commits.
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Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for
each SoC vendor, following the same scheme that is used on arm64, mips
and riscv. This has been discussed for many years, but so far we never
did this as there was a plan to move the files out of the kernel
entirely, which has never happened.
The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.
There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along with
their device drivers.
- The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the
time.
- Amlogic C3 is a Cortex-A35 based smart IP camera chip
- Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.
- Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.
- Qualcomm SDX75 is the latest generation modem chip that is used as
a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
- Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
Xuantie C910 core, a step up from all previously added rv64 chips.
All of the above come with reference board implementations, those
included there are 39 new board files, but only five more 32-bit this
time, probably a new low:
- Marantec Maveo board based on dhcor imx6ull module
- Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
- Epson Moverio BT-200 AR glasses based on TI OMAP4
- PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
- ICnova ADB4006 board based on Allwinner A20
On the 64-bit side, there are also fewer addded machines than we had
in the recent releases:
- Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.
- NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234
- Qualcomm gains support for 6 reference boards on various members of
their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
of the various reference platforms for their new chips.
- Rockchips support for several newer boards: Indiedroid Nova
(rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
Fastrhino R66S/R68S (rk3568)
- TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
Verdin family with AM62 COM, carrier and dev boards
Other changes to existing boards contain the usual minor improvements
along with
- continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names
- support for devicetree overlays on at91, bcm283x
- significant additions to existing SoC support on mediatek,
qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
STM32MP1
As usual, a lot more detail is available in the individual merge
commits"
* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
ARM: mvebu: fix unit address on armada-390-db flash
ARM: dts: Move .dts files to vendor sub-directories
kbuild: Support flat DTBs install
ARM: dts: Add .dts files missing from the build
ARM: dts: allwinner: Use quoted #include
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
arm: dts: Enable device-tree overlay support for AT91 boards
arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
ARM: dts: at91: use generic name for shutdown controller
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
...
|
||
|
Linus Torvalds
|
f8824e151f |
sound updates for 6.5-rc1
Lots of changes as usual, but the only significant stuff in ALSA core
part is the MIDI 2.0 support, while ASoC core kept receiving the code
refactoring. The majority of changes are seen rather in device
drivers, and quite a few new drivers can be found there.
Here we go, some highlights:
ALSA and ASoC Core:
- Support of MIDI 2.0 devices: rawmidi and sequencer API have been
extended for the support of the new UMP (Universal MIDI Packet)
protocol, USB audio driver got the USB MIDI 2.0 interface support
- Continued refactoring around ASoC DAI links and the ordering of
trigger callbacks
- PCM ABI extension for better drain support
ASoC Drivers:
- Conversions of many drivers to use maple tree based caches
- Everlasting improvement works on ASoC Intel drivers
- Compressed audio support for Qualcomm
- Support for AMD SoundWire, Analog Devices SSM3515, Google Chameleon,
Ingenic X1000, Intel systems with various CODECs, Loongson
platforms, Maxim MAX98388, Mediatek MT8188, Nuvoton NAU8825C, NXP
platforms with NAU8822, Qualcomm WSA884x, StarFive JH7110, Texas
Instruments TAS2781
HD-audio:
- Quirks for HP and ASUS machines
- CS35L41 HD-audio codec fixes
- Loongson HD-audio support
Misc:
- A new virtual PCM test driver for kselftests
- Continued refactoring and improvements on the legacy emu10k1 driver
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Merge tag 'sound-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"Lots of changes as usual, but the only significant stuff in ALSA core
part is the MIDI 2.0 support, while ASoC core kept receiving the code
refactoring. The majority of changes are seen rather in device
drivers, and quite a few new drivers can be found there.
Here we go, some highlights:
ALSA and ASoC Core:
- Support of MIDI 2.0 devices: rawmidi and sequencer API have been
extended for the support of the new UMP (Universal MIDI Packet)
protocol, USB audio driver got the USB MIDI 2.0 interface support
- Continued refactoring around ASoC DAI links and the ordering of
trigger callbacks
- PCM ABI extension for better drain support
ASoC Drivers:
- Conversions of many drivers to use maple tree based caches
- Everlasting improvement works on ASoC Intel drivers
- Compressed audio support for Qualcomm
- Support for AMD SoundWire, Analog Devices SSM3515, Google
Chameleon, Ingenic X1000, Intel systems with various CODECs,
Loongson platforms, Maxim MAX98388, Mediatek MT8188, Nuvoton
NAU8825C, NXP platforms with NAU8822, Qualcomm WSA884x, StarFive
JH7110, Texas Instruments TAS2781
HD-audio:
- Quirks for HP and ASUS machines
- CS35L41 HD-audio codec fixes
- Loongson HD-audio support
Misc:
- A new virtual PCM test driver for kselftests
- Continued refactoring and improvements on the legacy emu10k1
driver"
* tag 'sound-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (556 commits)
ALSA: hda/realtek: Enable mute/micmute LEDs and limit mic boost on EliteBook
ASoC: hdmi-codec: fix channel info for compressed formats
ALSA: pcm: fix ELD constraints for (E)AC3, DTS(-HD) and MLP formats
ASoC: core: Always store of_node when getting DAI link component
ASoC: tas2781: Fix error code in tas2781_load_calibration()
ASoC: amd: update pm_runtime enable sequence
ALSA: ump: Export MIDI1 / UMP conversion helpers
ASoC: tas2781: fix Kconfig dependencies
ASoC: amd: acp: remove acp poweroff function
ASoC: amd: acp: clear pdm dma interrupt mask
ASoC: codecs: max98090: Allow dsp_a mode
ASoC: qcom: common: add default jack dapm pins
ASoC: loongson: fix address space confusion
ASoC: dt-bindings: microchip,sama7g5-pdmc: Simplify "microchip,mic-pos" constraints
ASoC: tegra: Remove stale comments in AHUB
ASoC: tegra: Use normal system sleep for ASRC
ALSA: hda/realtek: Add quirks for ROG ALLY CS35l41 audio
ASoC: fsl-asoc-card: Allow passing the number of slots in use
ASoC: codecs: wsa884x: Add WSA884x family of speakers
ASoC: dt-bindings: qcom,wsa8840: Add WSA884x family of speakers
...
|
||
|
Linus Torvalds
|
ff7ddcf0db |
This batch of clk driver updates for the merge window contains almost no new
SoC support. Instead there's a treewide patch series from Maxime that makes
clk_ops::determine_rate mandatory for muxes. Beyond that core framework change
we have the usual pile of clk driver updates such as migrating i2c drivers to
use .probe() again or YAMLfication of clk DT bindings so we can validate DTBs.
Overall the SoCs that got the most updates this time around in terms of
diffstat are the Amlogic and Mediatek drivers because they added new SoC
support or fixed up various drivers to have proper data.
In general things look kinda quiet. I suspect the core framework change may
still shake out some problems after the merge window, mostly because not
everyone tests linux-next where that series has been for some number of weeks.
I saw that there's at least one pending fix for Tegra that needs to be wrapped
up into a proper patch. I'll try to catch those bits before the window closes
so that -rc1 is bootable. More details below.
Core:
- Make clk_ops::determine_rate mandatory for muxes
New Drivers:
- Add amlogic a1 SoC family PLL and peripheral clock controller support
Updates:
- Handle allocation failures from kasprintf() and friends
- Migrate platform clk drivers to .remove_new()
- Migrate i2c clk drivers to .probe() instead of .probe_new()
- Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
- Add infra_ao reset support for Mediatek MT8188 SoCs
- Align driver_data to i2c_device_id tables in some i2c clk drivers
- Use device_get_match_data() in vc5 clk driver
- New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip FPGA clock
drivers
- Use of_property_read_bool() to read "microchip,pic32mzda-sosc" boolean DT
property in clk-pic32mzda
- Convert AT91 clock dt-bindings to YAML
- Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
- Keep i.MX UART clocks enabled during kernel boot if earlycon is set
- Drop imx_unregister_clocks() as there are no users anymore
- Switch to _safe iterator on imx_clk_scu_unregister() to avoid use after free
- Add determine_rate op to the imx8m composite clock
- Use device managed API for iomap and kzalloc for i.MXRT1050, i.MX8MN,
i.MX8MP and i.MX93 clock controller drivers
- Add missing interrupt DT property for the i.MX8M clock controller
- Re-add support for Exynos4212 clock controller because we are
re-introducing the SoC in the mainline
- Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve some
objtool warnings
- Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
- Convert the Renesas clock drivers to readl_poll_timeout_atomic()
- Add PWM clock on Renesas R-Car V3U
- Fix PLL5 on Renesas RZ/G2L and RZ/V2L
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This batch of clk driver updates contains almost no new SoC support.
Instead there's a treewide patch series from Maxime that makes
clk_ops::determine_rate mandatory for muxes.
Beyond that core framework change we have the usual pile of clk driver
updates such as migrating i2c drivers to use .probe() again or
YAMLfication of clk DT bindings so we can validate DTBs.
Overall the SoCs that got the most updates this time around in terms
of diffstat are the Amlogic and Mediatek drivers because they added
new SoC support or fixed up various drivers to have proper data.
In general things look kinda quiet. I suspect the core framework
change may still shake out some problems after the merge window,
mostly because not everyone tests linux-next where that series has
been for some number of weeks. I saw that there's at least one pending
fix for Tegra that needs to be wrapped up into a proper patch. I'll
try to catch those bits before the window closes so that -rc1 is
bootable. More details below.
Core:
- Make clk_ops::determine_rate mandatory for muxes
New Drivers:
- Add amlogic a1 SoC family PLL and peripheral clock controller support
Updates:
- Handle allocation failures from kasprintf() and friends
- Migrate platform clk drivers to .remove_new()
- Migrate i2c clk drivers to .probe() instead of .probe_new()
- Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
- Add infra_ao reset support for Mediatek MT8188 SoCs
- Align driver_data to i2c_device_id tables in some i2c clk drivers
- Use device_get_match_data() in vc5 clk driver
- New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip
FPGA clock drivers
- Use of_property_read_bool() to read "microchip,pic32mzda-sosc"
boolean DT property in clk-pic32mzda
- Convert AT91 clock dt-bindings to YAML
- Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
- Keep i.MX UART clocks enabled during kernel boot if earlycon is set
- Drop imx_unregister_clocks() as there are no users anymore
- Switch to _safe iterator on imx_clk_scu_unregister() to avoid use
after free
- Add determine_rate op to the imx8m composite clock
- Use device managed API for iomap and kzalloc for i.MXRT1050,
i.MX8MN, i.MX8MP and i.MX93 clock controller drivers
- Add missing interrupt DT property for the i.MX8M clock controller
- Re-add support for Exynos4212 clock controller because we are
re-introducing the SoC in the mainline
- Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve
some objtool warnings
- Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
- Convert the Renesas clock drivers to readl_poll_timeout_atomic()
- Add PWM clock on Renesas R-Car V3U
- Fix PLL5 on Renesas RZ/G2L and RZ/V2L"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (149 commits)
clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
clk: Fix memory leak in devm_clk_notifier_register()
clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
MAINTAINERS: Add Marvell mvebu clock drivers
clk: clocking-wizard: check return value of devm_kasprintf()
clk: ti: clkctrl: check return value of kasprintf()
clk: keystone: sci-clk: check return value of kasprintf()
clk: si5341: free unused memory on probe failure
clk: si5341: check return value of {devm_}kasprintf()
clk: si5341: return error if one synth clock registration fails
clk: cdce925: check return value of kasprintf()
clk: vc5: check memory returned by kasprintf()
clk: mediatek: clk-mt8173-apmixedsys: Fix iomap not released issue
clk: mediatek: clk-mt8173-apmixedsys: Fix return value for of_iomap() error
clk: mediatek: clk-mtk: Grab iomem pointer for divider clocks
clk: keystone: syscon-clk: Add support for audio refclk
dt-bindings: clock: Add binding documentation for TI Audio REFCLK
dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
clk: keystone: syscon-clk: Allow the clock node to not be of type syscon
...
|
||
|
Stephen Boyd
|
82e58e69d7 |
Merge branches 'clk-qcom' and 'clk-microchip' into clk-next
* clk-qcom: (63 commits) clk: qcom: gcc-sc8280xp: Add runtime PM clk: qcom: gpucc-sc8280xp: Add runtime PM clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags clk: qcom: gpucc-sm6375: Enable runtime pm dt-bindings: clock: sm6375-gpucc: Add VDD_GX clk: qcom: gcc-sm6115: Add missing PLL config properties clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi) clk: qcom: gcc-ipq6018: remove duplicate initializers clk: qcom: gcc-ipq9574: Enable crypto clocks dt-bindings: clock: Add crypto clock and reset definitions clk: qcom: Add lpass audio clock controller driver for SC8280XP clk: qcom: Add lpass clock controller driver for SC8280XP dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP dt-bindings: clock: qcom,mmcc: define clocks/clock-names for MSM8226 clk: qcom: gpucc-sm8550: Add support for graphics clock controller clk: qcom: Add support for SM8450 GPUCC clk: qcom: gcc-sm8450: Enable hw_clk_ctrl clk: qcom: rcg2: Make hw_clk_ctrl toggleable dt-bindings: clock: qcom: Add SM8550 graphics clock controller ... * clk-microchip: clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id clk: at91: sama7g5: switch to parent_hw and parent_data clk: at91: sckc: switch to parent_data/parent_hw clk: at91: clk-sam9x60-pll: add support for parent_hw clk: at91: clk-utmi: add support for parent_hw clk: at91: clk-system: add support for parent_hw clk: at91: clk-programmable: add support for parent_hw clk: at91: clk-peripheral: add support for parent_hw clk: at91: clk-master: add support for parent_hw clk: at91: clk-generated: add support for parent_hw clk: at91: clk-main: add support for parent_data/parent_hw |
||
|
Bjorn Andersson
|
e5d10d1d1a |
Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into clk-for-6.5
Merge the missing SC8280XP LPASS DeviceTree changes, which where brought in through a topic branch in order to be shared with the DeviceTree source files, but not merged into the clock tree until now. |
||
|
Stephen Boyd
|
b9a40506a2 |
Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings', 'clk-ti' and 'clk-kasprintf' into clk-next
- Handle allocation failures from kasprintf() and friends
* clk-imx:
clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe()
clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe
clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe
dt-bindings: clock: imx8m: Add missing interrupt property
clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probe
clk: imx: composite-8m: Add imx8m_divider_determine_rate
clk: imx: scu: use _safe list iterator to avoid a use after free
clk: imx: drop imx_unregister_clocks
clk: imx6ul: retain early UART clocks during kernel init
clk: imx: imx6sx: Remove CLK_SET_RATE_PARENT from the LDB clocks
* clk-microchip:
dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
clk: microchip: Use of_property_read_bool() for boolean properties
clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE
* clk-cleanup:
clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
clk: Fix memory leak in devm_clk_notifier_register()
clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
MAINTAINERS: Add Marvell mvebu clock drivers
clk: mvebu: Use of_address_to_resource()
clk: tegra: tegra124-emc: Fix potential memory leak
clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider()
clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks()
clk: sifive: Use devm_platform_ioremap_resource()
* clk-bindings:
dt-bindings: clock: drop unneeded quotes and use absolute /schemas path
dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC
* clk-ti:
clk: keystone: syscon-clk: Add support for audio refclk
dt-bindings: clock: Add binding documentation for TI Audio REFCLK
dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
clk: keystone: syscon-clk: Allow the clock node to not be of type syscon
* clk-kasprintf:
clk: clocking-wizard: check return value of devm_kasprintf()
clk: ti: clkctrl: check return value of kasprintf()
clk: keystone: sci-clk: check return value of kasprintf()
clk: si5341: free unused memory on probe failure
clk: si5341: check return value of {devm_}kasprintf()
clk: si5341: return error if one synth clock registration fails
clk: cdce925: check return value of kasprintf()
clk: vc5: check memory returned by kasprintf()
|
||
|
Stephen Boyd
|
6e11940ab3 |
Merge branches 'clk-renesas', 'clk-determine-rate', 'clk-allwinner', 'clk-samsung' and 'clk-amlogic' into clk-next
- Make clk_ops::determine_rate mandatory for muxes * clk-renesas: clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic() clk: renesas: mstp: Convert to readl_poll_timeout_atomic() clk: renesas: cpg-mssr: Convert to readl_poll_timeout_atomic() iopoll: Do not use timekeeping in read_poll_timeout_atomic() iopoll: Call cpu_relax() in busy loops clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write clk: renesas: r8a779a0: Add PWM clock * clk-determine-rate: (71 commits) clk: sprd: composite: Simplify determine_rate implementation ASoC: tlv320aic32x4: pll: Remove impossible condition in clk_aic32x4_pll_determine_rate() clk: Fix best_parent_rate after moving code into a separate function clk: Forbid to register a mux without determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate clk: tegra: super: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5341: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate ... * clk-allwinner: clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux * clk-samsung: clk: samsung: add CONFIG_OF dependency clk: samsung: Re-add support for Exynos4212 CPU clock clk: samsung: Add Exynos4212 compatible to CLKOUT driver dt-bindings: clock: samsung,exynos: add Exynos4212 clock compatible * clk-amlogic: MAINTAINERS: repair pattern in ARM/Amlogic Meson SoC CLOCK FRAMEWORK clk: meson: pll: remove unneeded semicolon clk: meson: a1: Staticize rtc clk clk: meson: a1: add Amlogic A1 Peripherals clock controller driver clk: meson: a1: add Amlogic A1 PLL clock controller driver clk: meson: introduce new pll power-on sequence for A1 SoC family clk: meson: make pll rst bit as optional dt-bindings: clock: meson: add A1 Peripherals clock controller bindings dt-bindings: clock: meson: add A1 PLL clock controller bindings |
||
|
Arnd Bergmann
|
37d1fc51dd |
More Qualcomm driver updates for v6.5
The detection of split/non-split firmware files in the MDT loader is corrected. The Geni driver is updated to not enable unused interrupts, in some configurations. The count unit for MSM8998 in BWMON is corrected. RPM master stats driver is corrected to check for the right return value of devm_ioremap(). Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to the list of platforms. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLPJsVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fc9AQAMvf/8aE2FyhH3LE9n1otbRa82Lv 5MjvAM9N6PUJgMSuA71lZm6Bh3h/3SpbGjuRGkfGi4ZpkjZiI37ButZQq8YKVcOi hDPjGiF8oiO1wk+JEwrC29jgpL+37T7/7jSynO2cYfu+uKXt3MhF9kmDeIiydjyf hpN6IhGuyLm+dx38x9Vzsq4ew4uFNos+zP0ZInScSJV8UQ5sJjUCjQ4FDu1bHoFn wQXa0Bd5ObYJilh71on9eJO7dQYLapv5omHI0lM04cYpYGfPpSTmXQwnbpmL7xqF dyLiE+eq6jpi5yWIVpEFFwonty7Ixuq4yuMwMafYVGIriQ8a8J56HvfvZQ2FSb7D 1F/Rx74qkx1LEenNOBM5rUFyIGc93Up19DzFPNBX/WjJW0+7yBlXNUsg/bI2a/xV Z+jURxcUWKa/ugiqjMZRXQ7VXC2uhrjD8xn22+w8eyziRoPPecq5KITizHv3CkOT G7AhI69nFn8zhXHJ3cp4ci4AWzOCW4HXnTE9H8XMDFcu6hxylJDovrqCtt0nWqg+ QPKSqVtUF7BX/UMhhE5XdxqkxG//MyMN2W4dowxv+u35+6DCydyEm3XFuD85ETnt YJx4iC5n8IGfb5jfOIyLK0JHQNU9ijPSd9rssLRebh96m4H0Op9gHlxDHyXghaRS umZA+uKoxQQZhEXn =KYPl -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTWk8ACgkQYKtH/8kJ Uicu3hAAgerZS9Wdt+w+2cUhnkWWayByRwUmTvowFUR8vsbWLJVf1UwYQFiHVXhn BsPSSGWSRm3vyUZjZyv3GegoWLsxH3LD8s7QngjPpF75HI+2ekD8J+tLNRiNqPll /cZ1iQFVoTtfYUzAFpgBrYlFYV9P7B/6ghjEhuMc0HWLN4xFJ+13HL5NdCtvbDyn zTrBSDlz3j94+PoS6n/y+9r8nLNZyp5Li5FUEoXf7uABI9dUqWokoSDV1hRA7zeF MewEEcH7p5AZiL54L7cfLAlKwPQrUNYjerNxeljrwcp621wECniB030JmYKslSzS ccfracaf7EBqRuu4SYH47VeLadikpBxrjP39CJFAlKQhB2X3uUNrSYjLyTLDkRRA X/SN4sbm0ipToa6FlGJ68D3Ca+MHs541U6fhMgQuJ+S4D0pBjbmKUmQfs76L2Eu4 0ZDyYCQuJFmvd/P6ZKjX6hmkxDJ4OItop+K6doedAFf0/tAp6APry05aF56mbhDW tsBJ0ABlFNY73wMhSu7HMm2rB7mDl3LnVfv67HrWAzaB+c23rkUDki67a1Gtr3lV mG05JMSG2nETBRPv+II3pG/q7GzJwlqzHNxy3mwtBRILlzLjEl5fK+HgZRtGN8zr 7620aNOKR3lA7XGih1/ztlbpVqgH0c6Ahnm3pCHoQJJjMrK8oWI= =YKVY -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers More Qualcomm driver updates for v6.5 The detection of split/non-split firmware files in the MDT loader is corrected. The Geni driver is updated to not enable unused interrupts, in some configurations. The count unit for MSM8998 in BWMON is corrected. RPM master stats driver is corrected to check for the right return value of devm_ioremap(). Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to the list of platforms. * tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer dt-bindings: sram: qcom,imem: document qdu1000 soc: qcom: icc-bwmon: Fix MSM8998 count unit dt-bindings: soc: qcom,rpmh-rsc: Require power-domains soc: qcom: socinfo: Add Soc ID for IPQ5300 dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300 soc: qcom: Fix a IS_ERR() vs NULL bug in probe soc: qcom: socinfo: Add support for new fields in revision 19 soc: qcom: socinfo: Add support for new fields in revision 18 dt-bindings: firmware: scm: Add compatible for SDX75 soc: qcom: mdt_loader: Fix split image detection Link: https://lore.kernel.org/r/20230615163104.1461905-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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a08000d5e0 |
Qualcomm driver updates for v6.5
Konrad Dybcio is promoted, from reviewer, to co-maintainer. The mdt_loader gets a fix to the detection of split binaries, where the previous logic sometimes concluded that the first segments was not split, in a split image. The unconditional calling of scm_pas_mem_setup() turns out to cause a regression and is reverted. The altmode subfunction of pmic_glink is enabled for SM8450. A new driver for exposing power statistics from the RPM, for debugging purposes, is introduced. OCMEM gets a debug prints of the hardware version, QMI helpers are transitioned to alloc_ordered_workqueue() and an error message in ramp_controller is improved. An API is introduced to the SMEM driver to allow other drivers to query the SoC id, rather than open-coding the parsing of the relevant SMEM item. This is then used to clean up the Qualcomm NVMEM-based cpufreq driver. Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFHJsVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FrtoQAMUN2gF5ZP3rlSEkQbKNMDhNHXVw S8AexPk6Qw8BcEBOD4YPqrmfrMvNP7Bqh3QkfS/7m5vx0o8bUOw+Xz+C4+9LSUD7 /qW29GlQllwMuRNOdH3J/nYXwpV5WJyiSF/jXy0/GRbz+D/XYSNDC57z/lXTcKKq dYJrKxms6EF4AgHe88V0bmk6/V4xfa5p6xW3pCG7GLqNHOvhZ16oUmoPiZGVpQMk go/HsoIB00HktKflTLOUXJWD6qVOVNCaQQEarx+zY1txfmvpVGL+PO6Eaxt00Sa4 pHRvB0CIZPNvdDWELfsfRx6DbPBJRGBlneag04BI918fx4X+jn4uP+1jzw9am03U M78k0LGBY23Psy6KhoMu5MM4Cntt3kTQ0SwHl/xayzTrAhK2xdmd1bo67ArRl+HX OZrZ7Se3Cm16CAWqsW42so6MJeDllc8d/ahN/e2NwsNy1lhosK06jRJEdh3N238D ouL56HoxrweYB0kbK4TkPLewrLZC7DYnr0KMVsPhsSraeJBaBPOVZDhuNSUXXMtf WdyCRMMxKU3OweLcJiKuGFzNqr2963341Y6NlD+tf1Uy5IEnbIp4jFi9BsJBNVZt NucOXJYm5OJeAHp8BcMFbnL8uA1NqEYQXwezodPSIGqHzxBtGf6f0hALsIpiUQnA GLDp99yVujEN2dsE =9Fv4 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVmkACgkQYKtH/8kJ Uid08g//b5kJZnsiWA43LrkblMSEdZoeijrn+x2NU95YQ4s/oz2RnUtgNCGDhM84 Fi60PzU5L1JVj6GVeL51J5jlBGKzGqe4FfPTN4aPlSV4Z0B3cuevgWmHnw4Mh/zj t/1b5QVVZxbKKxb8MP+U2iAvyxVwIhIA4zehh0+XGagV3qquURO7QLtLUg42Yx51 HFLADq2JI8trm+CjjCNBv9mq7EipC/g0nbsCs98nxl/sPC7PqtNxL6BXCuz3a8BX JvA1LVRP2JYkQfb6SMnTFiqkT6LdB7bt6oXZdnwnsNTI1nhFqbMJRMsToWb3HEvv 9lprraDpaufbzvB1b+x8Aar4OmbbWaY2ZpNJqqzCM5eVW2Zs/p5J+ZfOYVigtQYO qIQvENv+eKETu4nVvdlf72FPAVe+GXnVAcl3LEwhMUxYcRMha4JT0i8mndnCzpT+ tZLdkBMp/t7rZPIa7D+07Xmorefw9e9rwynQg2C2yw3AV5v7j09dPJDFITFcF6Yl 7ADtoy7zHTTv6/0n04RfPC9jPMoi8RbPoVNMVAWW7t7S0984o3gqWXJPLWJdTzA/ ODOupqmvSpZld1rUklKKH/dY/Ha7iUTSci7rZrXSafXR8LBEn2FO6ehZqUvk7T/u qM3rs5wacHP2OcNDtwHHJoyfHXpxaQ2JqVOcUNkcdcwhN9dbdxA= =4/0b -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.5 Konrad Dybcio is promoted, from reviewer, to co-maintainer. The mdt_loader gets a fix to the detection of split binaries, where the previous logic sometimes concluded that the first segments was not split, in a split image. The unconditional calling of scm_pas_mem_setup() turns out to cause a regression and is reverted. The altmode subfunction of pmic_glink is enabled for SM8450. A new driver for exposing power statistics from the RPM, for debugging purposes, is introduced. OCMEM gets a debug prints of the hardware version, QMI helpers are transitioned to alloc_ordered_workqueue() and an error message in ramp_controller is improved. An API is introduced to the SMEM driver to allow other drivers to query the SoC id, rather than open-coding the parsing of the relevant SMEM item. This is then used to clean up the Qualcomm NVMEM-based cpufreq driver. Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302. * tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits) soc: qcom: ocmem: Add OCMEM hardware version print cpufreq: qcom-nvmem: use helper to get SMEM SoC ID cpufreq: qcom-nvmem: use SoC ID-s from bindings soc: qcom: smem: introduce qcom_smem_get_soc_id() soc: qcom: smem: Switch to EXPORT_SYMBOL_GPL() soc: qcom: socinfo: move SMEM item struct and defines to a header soc: qcom: mdt_loader: Fix unconditional call to scm_pas_mem_setup MAINTAINERS: Add Konrad Dybcio as linux-arm-msm co-maintainer dt-bindings: sram: qcom,imem: Document MSM8226 soc: qcom: socinfo: Add Soc ID for IPQ5312 and IPQ5302 dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302 soc: qcom: socinfo: Add IDs for IPQ5018 family dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family soc: qcom: Introduce RPM master stats driver dt-bindings: soc: qcom: Add RPM Master stats soc: qcom: qmi: Use alloc_ordered_workqueue() to create ordered workqueues soc: qcom: ramp_controller: Improve error message for failure in .remove() dt-bindings: soc: qcom: smd-rpm: allow MSM8226 over SMD soc: qcom: rpmpd: use correct __le32 type dt-bindings: soc: qcom: eud: Fix compatible string in the example ... Link: https://lore.kernel.org/r/20230611010044.2481875-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Greg Kroah-Hartman
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92852219a3 |
interconnect changes for 6.5
This pull request contains the interconnect changes for the 6.5-rc1 merge window which is a mix of core and driver changes with the following highlights: - Support for configuring QoS on the Qualcomm's RPM-based platforms, that required special handling of some interface (non-scaling) clocks. - Support for clock-based interconnect providers for cases when clock corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth scaling on MSM8996 platforms. One patch is touching a file in the clock subsystem that has been acked by the maintainer. Core changes: interconnect: add clk-based icc provider support interconnect: icc-clk: fix modular build interconnect: drop unused icc_get() interface Driver changes: interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks interconnect: qcom: rpm: Drop unused parameters interconnect: qcom: rpm: Set QoS registers only once interconnect: qcom: rpm: Handle interface clocks interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore interconnect: qcom: msm8996: Promote to core_initcall interconnect: qcom: rpm: allocate enough data in probe() dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJkkyQsAAoJEIDQzArG2BZj7GQQAMLrW2sZcxJhq5Fe2wKV4W5M ItIE7xME1Vk9PvuulZIJ57tZIKfOTJpXwwbh6qWJOejYGePrmgtT89iS0fadO81f yCKv2O2hD+Xukv+gFzyuX3AYEfur7myaCTfmRx93xVDYUz0d95Kj4BlYA84xkjXU i+wte+nX/nw9W78s+Y9BHcs389a3HTre0WR1c0eOboPmt8D0U9cBOdiZMHkSUc+4 /8RDUYRdsTBR0AblpPExm2JjoSRKUGEw7N8ZFZhOXaejCjmGoeVXeTdnHO+tjXaq HQ9290C9Pz0BZWdKXaFFfjc4Wqu3RYjdXJmHNo74a4sFHE+H/j33eRSgC24qMWg5 5hRsH8+gv0ZhoyLv6Ucd2MRQQvvUYCLNNeTlQ2/RkOFuqewLKqpXCiihbuKUpOi0 CLeWKTDjNlIM5murJURXX88+xjZ1UvpuBXe/U+i9jrhjSQ6IjnAppoDw7anrrxTE ldLGFPzJoWL8VO1H0povS08/kd25+fgkjL/3pZHagSMLjDWNOXA+xDLkRYGBCNi7 rZpLT/4nBFTcrcYEsJ2EPAqHYK19kD76NVrz+Fj2gzF9Ych3q+2MSkLb132Qkyzf qLn3SqWJQoPAhy0kQbOt3XBnYon8QjVEpcZIWf9J3Qr2au4SdHi7hr3ki86a5Pfz ne03bJDC237hO6q4jY0b =Smk9 -----END PGP SIGNATURE----- Merge tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.5 This pull request contains the interconnect changes for the 6.5-rc1 merge window which is a mix of core and driver changes with the following highlights: - Support for configuring QoS on the Qualcomm's RPM-based platforms, that required special handling of some interface (non-scaling) clocks. - Support for clock-based interconnect providers for cases when clock corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth scaling on MSM8996 platforms. One patch is touching a file in the clock subsystem that has been acked by the maintainer. Core changes: interconnect: add clk-based icc provider support interconnect: icc-clk: fix modular build interconnect: drop unused icc_get() interface Driver changes: interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks interconnect: qcom: rpm: Drop unused parameters interconnect: qcom: rpm: Set QoS registers only once interconnect: qcom: rpm: Handle interface clocks interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore interconnect: qcom: msm8996: Promote to core_initcall interconnect: qcom: rpm: allocate enough data in probe() dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes interconnect: icc-clk: fix modular build clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq interconnect: drop unused icc_get() interface interconnect: qcom: rpm: allocate enough data in probe() interconnect: qcom: msm8996: Promote to core_initcall interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks interconnect: qcom: rpm: Handle interface clocks interconnect: add clk-based icc provider support dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF interconnect: qcom: rpm: Set QoS registers only once interconnect: qcom: rpm: Drop unused parameters interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks |
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Arnd Bergmann
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055fdcac93 |
More Qualcomm ARM64 DTS changes for v6.5
This introduces support for the Qualcomm SDX75 platform, with the IDP reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the RDP454 is introduced. On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added. For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added to the CPU cluster power-domain to flush sleep & wake votes as the cluster goes down. On IPQ5332 additional reserved-memory regions to improve post mortem debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the RDP474 is added. On IPQ8074 critical thermal trip points are defined. As with IPQ5332 additional reserved-memory regions are used to improve post mortem debugging. Thermal sensors (tsens) are added and zones defined. The crypto engine is added, and support for the RDP454 board is added. Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and the purpose of msm8939-pm8916 is documented. MSM8939 has regulator definitions cleaned up, following to the previous effort on MSM8916. CPU Bus Fabric scaling support is added to MSM8996 Pro. On QCM2290 CPU idle states are added. For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC support. IMEM and PIL information regions are defined for improved post mortem debugging. The Qualcomm Robotics RB2 kit gets its on-board buttons described. A few fixes are introduced for the newly merged SC8180X, in particluar the DisplayPort blocks are moved to the MMCX power domain to avoid power being reduced prematurely during boot. The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s, and resets for the soundwire controllers are added. The OUI is specified for ethernet phys on SA8540P Ride platform, to avoid reset issues. Charger description is added to the PMI8998 PMIC and enabled across OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1. On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU clock controller and IOMMU definitions. The Fairphone FP4 gains Bluetooth support. SM8150 is transitioned to use 2 interconnect-cells, and the USB interconnect path is described to ensure buses are adequately voted for. The same changes are done for SM8250, and the resolution of the static framebuffer on Sony Xperia 1 II and 5 II are corrected. The USB bus paths are also added to SM8350, SM8450 and SM8550. On SM8550 DisplayPort nodes are added, as is the PWM controller for driving the notification LED and the RTC is enabled. For the MTP and QRD boards, the soundcard and audio codecs are defined. A Tegra change, related to LP855X binding changes, was accidentally picked up and dropped again later. A number of DeviceTree fixes identified through validation was introduced as well. Additionally a few nodes got their default status changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu node). -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLOjsVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FlyUP/0PZFIRutqnwwr/daOZAhDgw6pQW jseUFIUb9yKan8KJZcHOf38xxqfj/bllQQNIQeM8qw03e7LJf/Mcteg3FYNgxD9m vAWdQby2ZBcAYy3Qxjc3H+cb2fPV8yEJZ4JX/yOuLPfx9zE8HMoT8M9JBHZlZc8T 0fzgVxqRz1wt5Qjzv+BsWg4GUiTARtRbYxDVzdFZFDF6f7Xcpdsq+HaImJdYisXh m/2lQ34rDBTVOMN6Og5U7lGjfCyk6hn3k0OoSpObLRBNV34JH6ViDVhmNbFWKNNS QGFDAEa+jjQDrEo2cUHiHfnlKzcQpheLoco7MNkzDwy/8Rd3/k3ndj/+oCpgGea5 VFTb0LygJPQnHfggzpxc+v2pBfoocEUvKrI+sluXeNnLua+jvlLz6Z8Wm6mVaBZv hzw4NqaXHRtzqgjo/37t7Hwns+uyd+rg/gjh8xfdu65/kVZiTstK1BGVCoKMs1LD J0UcQGaevfBH9+EYNcKly5qjEMhsUxwn4i7oyjerdQ7Wt4nwzPqfs7zv513Ns5bO eLG49FsCZjzvAn4AC3R1POPVrP2RBg/zeBzL/34gkgBLr/TR1k1zyPWxovb6Tuq9 8R3T4XBA1kwh1c7R5av1033dyvW4N8y6vp9z+kExuPz4qQ+SsWKoXAeM2budkTQ/ c3oBU6U+BH9oCvSV =Fga/ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEgoACgkQYKtH/8kJ UifYRg//Uu6CMkGFJCfMVNS8Z0lykAW3FtEupzi+lWVP+2i+QsR8FXTZ3EumyBA6 QoRX1FtEKtRdJatMUgWlCbv8newKiII9fwKrV/EK7u/CTC79zX9ak3DonxXu7Z2i a6dzH5GVnHfVe7BTQdJuOylxKneMNNECmnkYYUWry1LES1zLhUZy67GsdbDSCxpF evzT8ly6NLSSJOJKXlcmwzcGMXhi7HrCdvsZhPdJZ1cN8c/tfrj+S8kmHxs5Qw3B TOjFi14w2CA/duvwQLV+0KIuHc/Vn8oYI0NnD96aahlZA+QFMk1hsdeETtXL6guf S4FKB+PNVtFnMCMq25xsTOaqEKjse8+xBgTN9TAvB67TJUQ3J2zibn1jjaGjtej7 w2ry8FC/pgSFbs9KftAL7mDFCICo7qyOhpfuuG+s+ti1m7h5Fon2a+UKc0T0m80w qR1YXohi6rzXTlcV92m2CRZIvSBPf1UQAnFqyjZBIvePpD8/TqYs2M+IIM0dmaBC Xs+n+3ORIte7hws5BodXaWwsi0NTFm8rQaeK94Cj100kWMxrKZS5JIIdZ/Dy0rRk LXWKj1W4h6rrwM34r5oeyc0k9pYoc7coDItEqu8VyKz7pj9rjcG8B+lqdp6QjNK+ +gNnVF4UmEbRpG6EZm9uC9IshiIQp/8DhO/lRZMb37v1YEB6/mg= =ThxV -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm ARM64 DTS changes for v6.5 This introduces support for the Qualcomm SDX75 platform, with the IDP reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the RDP454 is introduced. On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added. For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added to the CPU cluster power-domain to flush sleep & wake votes as the cluster goes down. On IPQ5332 additional reserved-memory regions to improve post mortem debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the RDP474 is added. On IPQ8074 critical thermal trip points are defined. As with IPQ5332 additional reserved-memory regions are used to improve post mortem debugging. Thermal sensors (tsens) are added and zones defined. The crypto engine is added, and support for the RDP454 board is added. Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and the purpose of msm8939-pm8916 is documented. MSM8939 has regulator definitions cleaned up, following to the previous effort on MSM8916. CPU Bus Fabric scaling support is added to MSM8996 Pro. On QCM2290 CPU idle states are added. For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC support. IMEM and PIL information regions are defined for improved post mortem debugging. The Qualcomm Robotics RB2 kit gets its on-board buttons described. A few fixes are introduced for the newly merged SC8180X, in particluar the DisplayPort blocks are moved to the MMCX power domain to avoid power being reduced prematurely during boot. The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s, and resets for the soundwire controllers are added. The OUI is specified for ethernet phys on SA8540P Ride platform, to avoid reset issues. Charger description is added to the PMI8998 PMIC and enabled across OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1. On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU clock controller and IOMMU definitions. The Fairphone FP4 gains Bluetooth support. SM8150 is transitioned to use 2 interconnect-cells, and the USB interconnect path is described to ensure buses are adequately voted for. The same changes are done for SM8250, and the resolution of the static framebuffer on Sony Xperia 1 II and 5 II are corrected. The USB bus paths are also added to SM8350, SM8450 and SM8550. On SM8550 DisplayPort nodes are added, as is the PWM controller for driving the notification LED and the RTC is enabled. For the MTP and QRD boards, the soundcard and audio codecs are defined. A Tegra change, related to LP855X binding changes, was accidentally picked up and dropped again later. A number of DeviceTree fixes identified through validation was introduced as well. Additionally a few nodes got their default status changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu node). * tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits) Revert "arm64: dts: adapt to LP855X bindings changes" arm64: dts: qcom: sc8280xp: Enable GPU related nodes arm64: dts: qcom: sc8280xp: Add GPU related nodes arm64: dts: qcom: msm8939-pm8916: Mark always-on regulators arm64: dts: qcom: msm8939: Define regulator constraints next to usage arm64: dts: qcom: msm8939-pm8916: Clarify purpose arm64: dts: qcom: msm8939: Fix regulator constraints arm64: dts: qcom: msm8939-sony-tulip: Allow disabling pm8916_l6 arm64: dts: qcom: msm8939-sony-tulip: Fix l10-l12 regulator voltages arm64: dts: qcom: msm8939: Disable lpass_codec by default arm64: dts: qcom: msm8939-pm8916: Add missing pm8916_codec supplies arm64: dts: qcom: qrb4210-rb2: Enable on-board buttons arm64: dts: qcom: msm8916: Drop msm8916-pins.dtsi arm64: dts: qcom: msm8916/39: Rename wcnss pinctrl arm64: dts: qcom: msm8916/39: Cleanup audio pinctrl arm64: dts: qcom: apq8016-sbc: Drop unneeded MCLK pinctrl arm64: dts: qcom: msm8916/39: Consolidate SDC pinctrl arm64: dts: qcom: msm8916/39: Fix SD card detect pinctrl arm64: dts: qcom: msm8996: rename labels for HDMI nodes arm64: dts: qcom: sm8250: rename labels for DSI nodes ... Link: https://lore.kernel.org/r/20230615162043.1461624-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
60c2f542a7 |
Qualcomm ARM64 DeviceTree updates for v6.5
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574 are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is added. Support for Acer Apire 1, built on the Snapdragon 7c platform is introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating support for SC8180X and the Lenovo Flex 5G, and the Primus reference device, has been added. On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described above the RDP442 board on the prior. Download mode support and various reserved-memory regions are also introduced on IPQ6018. IPQ8074 gains another SPI controller. On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog, qfprom, SMEM and RPM are introduced. As are support for four new board, mentioned above. MSM8916 gains a range of structural improvements, to better suite the various boards supported. Regulator constraints are corrected and their states are adjusted to match reality (e.g. always-on regulators marked as always-on). BQ Aquaris X5 gains support for front flash LED. As mentioned above, MSM8939 support is introduced with support for boards from Sony and Square. MSM8953 gains DMA support in I2C masters. MSM8996-based Sony Xperia boards gains description of their RGB notification LED. On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU, AOSS, watchdog and missing low-speed controllers are added. On the Ride platform UFS, USB and an i2c bus are enabled. iommu properties are added to QSPI on both SC7180 and SC7280. LPASS clocks are adjusted and MDP node cleaned up slightly, on SC7180. As mentioned above, support for Acer Aspire 1 is introduced. Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the Primus reference device has been merged. On SC8280XP ethernet is added and enabled on the automotive ride platform. An SDC controller is introduced and enabled on the SC8280XP CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB SuperSpeed phy is added to the Type-C graph, to enable support for orientation switching. Fairphone 3 gains support for its notification LED. On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains support for flash LED and the RB3 (DB845c) board gains support for bonded/dual DSI-mode, to allow 4k output. On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY are introduced. As mentioned above Fxtec Pro1X is introduced. On the QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display, CAN-bus and GPIO LEDs are introduced, fixed regulators are described and the SD-card description is corrected. Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5 gains SD-card support, camera regulators and GPIO line names sorted out. SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5 II gains support for hardware video accelerator. Crypto engine is introduced for SM8350 as well. The HDK gets the USB Type-C graph described for Superspeed orientation switching and DisplayPort output. On SM8450 video clock controller and crypto engine are added, missing opp levels are introduced and the USB Type-C graph is defined for orientation switching and altmode. SM8550 gains GPU and video clock controllers and missing opp levels are added. The WCD9385 audio codec is added for the SM8550 MTP and on the QRD PCIe, USB, audio display and flash LED are added. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFGfkVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FeKoP/RFCA0hnqP0TGgzQq7TV1//WbVuZ 5fxpWhSKYeb6e+oOJZdu/Xi7VwSWesZwQQkMRaEOXUpMGhtWBfLQEHc6FQiAzGkv h3GrOLQ1qqmfYEqDxYv4CgKjpO+w5Zx2uNOZkbRDRumT0EQ45T0hypYmRefBPq8s bOxNmRgY6goNZalZBb0HWvdZtfYB1tlrjVn5+rpEZb031KGhCSOH8SWx8wUdUHrj 7EYR4EeQQsJZETiinU3F8l69eNUBwAi8TAW350A3nJj+FPZqwVhIhQKCR/bCZqXC U9vwcaqgYKi8rY5FR+bwJsiX4hY8W9bjq7pzrJyNvXsLtIeJ3jRnbF8z4SvNitOF UMOkQ9f6WrToRNSrwFhLB/ipV/TbnnE/MNzIxCwQ5W1BRYn7Tri1Ws61I/Kl1/ML eOWl6CSWzNW5lfkHumdOzydd4T43ECqqgNLEBTCpNRo7d/4XN/TCUK4tWJqb+4ou 1aOG6/ujy6uhlocd0mZ1xPMDBrFNCrC4/BRj2hCmbuBE3Qs/AHHrF5LLMTkZBKHd Mip2gUKwqi2p4l0/KJxSSj0snrifUqU5V1QCchwcMFmt62mrfRU2u7Xoy9s7vlyP pbQEF/Pu91Yr5nUiBQEU77L5a9tTm0eI1iFl8GwBzZP7R46ahnAu3BQc/MXaPax/ Z9hrTrB9y610Iuzy =OvdD -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSD3wACgkQYKtH/8kJ UidMjQ//YH19+b3UZ3O4r3sIoGTNB1rajNHCX72wwzQAdaHSMOTOUdkXradtstyp EPNyChMERvBGq2i16B0mEk9IiQ4y4CVwR9l3FZcaasV25RhfcGX3K1Wqxuepc1Hu OELo8W9Ih7rSg7paNj6YfJq1ka+AldZWPvtQG000czq59ZnUn7JvEeW7hd5BOdCJ O5RloIxHhLIOSyyc+sK0d3hXLjcZ8Od0Pnu/QYMzslmtc7YLaRgs0F5pxwz51k/P Uc+eOscCGcSHilmW7IE/IlevElg0GssyRn/BZ5121tMMKEYjEeR0EUy7I8zPaG45 osKJQ5R7NBd2h185ZXprskd9drvQ8uwv8kxRs5GFF+cK+3PE3TtoipmBycEQROcH 7WkQg7ffiPXT7Na+yTWqUXwnwzr/nhir7HTVx7VgBqmdUIzJKdqAbVLw/PTm0B6M QXUZfIS8gZFLePYwzkYqhYcTgtT6ZfEY5aN2/vpI0xyZsU0Z6nbFzPxlI+4rlDXm eZ7nD42RzifEqJUm7yKwGPkyY1U8rbwh4kNdaxZPk4ouB1puEYbF+Neo95MKlpRY ODEz0u6oVvJ2Ddg/RxFDtwB3hUXupc2qZcE92Smq4Two9wjgTkuSb3A3+8CEjXqH VFhBY65NxnwVEaabxE4wK9+wnLUnswza988BkkY7YrI+G8EZJL4= =jxMR -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 DeviceTree updates for v6.5 This introduces the RDP442 and RDP433 reference devices on IPQ5332 and IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574 are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is added. Support for Acer Apire 1, built on the Snapdragon 7c platform is introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating support for SC8180X and the Lenovo Flex 5G, and the Primus reference device, has been added. On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described above the RDP442 board on the prior. Download mode support and various reserved-memory regions are also introduced on IPQ6018. IPQ8074 gains another SPI controller. On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog, qfprom, SMEM and RPM are introduced. As are support for four new board, mentioned above. MSM8916 gains a range of structural improvements, to better suite the various boards supported. Regulator constraints are corrected and their states are adjusted to match reality (e.g. always-on regulators marked as always-on). BQ Aquaris X5 gains support for front flash LED. As mentioned above, MSM8939 support is introduced with support for boards from Sony and Square. MSM8953 gains DMA support in I2C masters. MSM8996-based Sony Xperia boards gains description of their RGB notification LED. On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU, AOSS, watchdog and missing low-speed controllers are added. On the Ride platform UFS, USB and an i2c bus are enabled. iommu properties are added to QSPI on both SC7180 and SC7280. LPASS clocks are adjusted and MDP node cleaned up slightly, on SC7180. As mentioned above, support for Acer Aspire 1 is introduced. Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the Primus reference device has been merged. On SC8280XP ethernet is added and enabled on the automotive ride platform. An SDC controller is introduced and enabled on the SC8280XP CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB SuperSpeed phy is added to the Type-C graph, to enable support for orientation switching. Fairphone 3 gains support for its notification LED. On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains support for flash LED and the RB3 (DB845c) board gains support for bonded/dual DSI-mode, to allow 4k output. On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY are introduced. As mentioned above Fxtec Pro1X is introduced. On the QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display, CAN-bus and GPIO LEDs are introduced, fixed regulators are described and the SD-card description is corrected. Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5 gains SD-card support, camera regulators and GPIO line names sorted out. SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5 II gains support for hardware video accelerator. Crypto engine is introduced for SM8350 as well. The HDK gets the USB Type-C graph described for Superspeed orientation switching and DisplayPort output. On SM8450 video clock controller and crypto engine are added, missing opp levels are introduced and the USB Type-C graph is defined for orientation switching and altmode. SM8550 gains GPU and video clock controllers and missing opp levels are added. The WCD9385 audio codec is added for the SM8550 MTP and on the QRD PCIe, USB, audio display and flash LED are added. * tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (195 commits) arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G arm64: dts: qcom: sc8180x: Introduce Primus arm64: dts: qcom: sc8180x: Add pmics arm64: dts: qcom: sc8180x: Add display and gpu nodes arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes arm64: dts: qcom: sc8180x: Add PCIe instances arm64: dts: qcom: sc8180x: Add QUPs arm64: dts: qcom: sc8180x: Add thermal zones arm64: dts: qcom: sc8180x: Add interconnects and lmh arm64: dts: qcom: Introduce the SC8180x platform arm64: dts: qcom: msm8916: Move aliases to boards arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec arm64: dts: qcom: msm8916/39: Clean up MDSS labels arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm arm64: dts: qcom: qrb4210-rb2: Enable USB node arm64: dts: qcom: sm6115: Add USB SS qmp phy node arm64: dts: qcom: ipq5332: add support for the RDP442 variant dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family ... Link: https://lore.kernel.org/r/20230611004944.2481596-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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a9c7f8d0cf |
arm64: tegra: Device tree changes for v6.5-rc1
This introduces support for the IGX Orin and Jetson Orin Nano devices and enables various additional features on the Jetson AGX Orin and Jetson Orin NX. This also enables some basic thermal support to prevent the devices from overheating. Support for the GPU on the Google Pixel C is enabled and various minor issues are fixed and cleaned up. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDSOsTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zobIYEACmgNyMW0vHcRRQcLo9RTqfOB0Pncy3 BmZBU4MeebkxFsVFDMfWUyHrkptBporGkUyAWJw2RBORvrCbLj1OhW1y8V0GRl4s SIke/oC1834PKk5a6jmaauOYfFiHCyXzrwGnWFIYzIX+7Xn9tDsXjcJQWn1ngmJr xrKxp/Mp/3dsgZDaJEPhHAn9rWuGDrBMLhVK0uTAjh9Rx7cy7KE3qMVzBzp2R3Mg VK8vay6F2pJ3LkdozNX/Q56j77mfX7GFRPITulWblRLVRstW7g0qwrZd/jcQS74h 2wpbJ5FdS/0pX9LBN2tgUuDtGxwXHvUl0/D4P7QyuOLpmK9CMt+mM8N7JwjErJn1 A7A6BF6F18r+pQaqzfUaZcayrVqfwgDrFgIOOBNpvcvsCc1W6vnf0LSQOkCORY+K YNnCZvA81R4j0MuC8Q4j9hsdp2K0Ykdk32usAnSAM4E/pZhlwPcAFJm+EZ6Swd2Z eshCHVPXbIr3GJsUGhzm3bscjpD5sad500eWQrBGWRSioBEwCF+I+IXd5+v/7Xc+ vp3NUyj4bJCCmV5OmnuaAZQMVpC3x7pXaQHCakZ9gLbGoUhf9qcS+lFWPM82tYXA kLn42PS9YjLCyigKdGYBiwXv3t2qQ7pm3U5WnMUY9vx6snPCa7MKIiTBQ3H9b0z3 9tYmXmZBus1+Gg== =HPjl -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDWcACgkQYKtH/8kJ UicmYg//bu3NoTNoQrez14Q0giWmFwRAT4YOXGUVGDY8Uac+lcc077x5Z/y3b6Ho vmczi94COl6c14WA0wSHbl+lINAV8LkQimJPMm7kpsYObGCHfwEM3k33fz5aJW8Q 0e1MI0r5e/9pcFpuw58sqNjNnRN1aJLgVfJshSUUtA1QrcOlT1E1dm7kzpi66Rvz A61l8YLWMdwvfDxLz/jWi8r9LxcPtWchLPTiNw11CwLUvWspRQXTfERwpkFbLiu1 tBFAg6vfMWTqt08e3VhW+SeVwUq0eVuOUvS0oUI+rvIfDL1c9xUAVN+PstC8XlbB 3kv6RoB/e3OqeRKsxEzozgz/biV201wbGmkqLo2WtUN1a8PdqKbeMSRv3yvDhU5e dxeCFsMk9lPw2R0QjDPYIB6P9EEWHKwhj7n+NIKtNTd+aE91eD1QlrHsC8ZLUIuA 6cJxAhwwdjXHGt6o7eT6nHMrJw1uBVqXc9zgAdDHCWtTc3kAUmD10dhrxV8EK6Ia f7UVonOQh6Y1OXeEN5iRXPOCaCF6XdNU/B/VB3FhE+tiWy6lm04seTz1s19vnNtk DIIE4oOfl5jef+pZM97ARCRZzmqG3Tu7W7GHalQFfj0oaQ5MVusmYVuoIznydbe9 ul+W8LyRXRWa0isZDaSQCAp1pPHMSnhDaa6HfK1Tnsx2G9XCDOo= =jIxj -----END PGP SIGNATURE----- Merge tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt arm64: tegra: Device tree changes for v6.5-rc1 This introduces support for the IGX Orin and Jetson Orin Nano devices and enables various additional features on the Jetson AGX Orin and Jetson Orin NX. This also enables some basic thermal support to prevent the devices from overheating. Support for the GPU on the Google Pixel C is enabled and various minor issues are fixed and cleaned up. * tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Enable thermal support on Jetson Orin Nano arm64: tegra: Enable thermal support on Jetson Orin NX arm64: tegra: Enable thermal support on Jetson AGX Orin arm64: tegra: Add Tegra234 thermal support arm64: tegra: Add a few blank lines for better readability arm64: tegra: Sort properties more logically arm64: tegra: Enable GPU on Smaug arm64: tegra: Add GPU power rail regulator on Smaug arm64: tegra: Update USB phy-name for Jetson Orin NX arm64: tegra: Enable USB device for Jetson AGX Orin arm64: tegra: Add Tegra234 pin controllers arm64: tegra: Support Jetson Orin Nano Developer Kit arm64: tegra: Add missing cache properties on Tegra210 arm64: tegra: Fix PCIe regulator for Orin Jetson AGX arm64: tegra: Add CPU OPP tables and interconnects property arm64: tegra: Add support for IGX Orin Link: https://lore.kernel.org/r/20230609193620.2275240-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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868a11b602 |
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
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Merge tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/newsoc
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
* tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (44 commits)
MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
arm64: dts: st: add stm32mp257f-ev1 board support
dt-bindings: stm32: document stm32mp257f-ev1 board
arm64: dts: st: introduce stm32mp25 pinctrl files
arm64: dts: st: introduce stm32mp25 SoCs family
arm64: introduce STM32 family on Armv8 architecture
dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
pinctrl: stm32: add stm32mp257 pinctrl support
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
...
Link: https://lore.kernel.org/r/080fc303-45c1-6cc0-4c5e-694e730896a6@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Dario Binacchi
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8f3ef556f8 |
dt-bindings: mfd: stm32f7: Add binding definition for CAN3
Add binding definition for CAN3 peripheral. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com Signed-off-by: Lee Jones <lee@kernel.org> |
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Patrick Delaunay
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94ec3d8b20 |
dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC
Minor cosmetic change, aligned with files in U-Boot: - change obsolete SPDX id : GPL-2.0+ and use the same license GPL-2.0-only for the 2 files - use correct mail address gabriel.fernandez@foss.st.com - remove extra space Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20230510184305.v2.1.I417093ddcea282be479f10a37147d1935a9050b7@changeid Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Bjorn Andersson
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004823da9b |
Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into clk-for-6.5
Merge the DeviceTree binding updates for IPQ9574 GCC adding clocks and resets related to Crypto Engine, through a topic branch in order to make them available in the DeviceTree source tree as well. |
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Bjorn Andersson
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e5d57e7c94 |
Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into arm64-for-6.5
Merge IPQ9574 Crypto Engine-related DeviceTree bindings, to gain the additional clock defines needed to add the related nodes. |
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Anusha Rao
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35e237b3d5 |
dt-bindings: clock: Add crypto clock and reset definitions
Add crypto clock and reset ID definitions for ipq9574. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526161129.1454-2-quic_anusha@quicinc.com |
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Kathiravan T
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b56715957b |
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
Add the SoC ID for IPQ5300, which belong to the family of IPQ5332 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230605080531.3879-2-quic_kathirav@quicinc.com |
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Bjorn Andersson
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0832b1c9d0 |
Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into arm64-for-6.5
Merge the SC8280XP LPASSCC DeviceTree bindings in order to get access to the newly added reset defines. |
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Srinivas Kandagatla
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83da70da40 |
dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org |
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Srinivas Kandagatla
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bfc43a9c0c |
dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230608125315.11454-2-srinivas.kandagatla@linaro.org |
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Bjorn Andersson
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68017e6b1b |
Merge branch '20230512122347.1219-3-quic_tdas@quicinc.com' into arm64-for-6.5
Merge the SDX75 GCC DeviceTree binding, in order to get access to the clock defines in the DeviceTree source. |
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Runyang Chen
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2cf4ec5344 |
dt-bindings: reset: mt8188: add thermal reset control bit
To support reset of infra_ao, add the index of infra_ao reset of thermal for MT8188. Signed-off-by: Runyang Chen <runyang.chen@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230525075011.7032-2-runyang.chen@mediatek.com Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Thierry Reding
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09d990782a |
arm64: tegra: Add Tegra234 thermal support
Add device tree node for the BPMP thermal node on Tegra234 and add thermal zone definitions. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Nishanth Menon
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32a2e6ab2c |
dt-bindings: pinctrl: Drop k3
For convenience (less code duplication), the pin controller pin
configuration register values were defined in the bindings header.
These are not some IDs or other abstraction layer but raw numbers used
in the registers.
These constants do not fit the purpose of bindings. They do not
provide any abstraction, any hardware and driver independent ID. In
fact, the Linux pinctrl-single driver actually do not use the bindings
header at all.
Commit
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Alexandre Torgue
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a45645472f |
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
Add support for st,stm32mp257-pinctrl and st,stm32mp257-z-pinctrl. Add packages AI, AK and AL (values : 0x100, 0x400 and 0x800) Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> |
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Prathamesh Shete
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12382ad051 |
dt-bindings: gpio: Remove FSI domain ports on Tegra234
Ports S, T, U and V are in a separate controller that is part of the FSI
domain. Remove their definitions from the MAIN controller definitions to
get rid of the confusion.
This technically breaks ABI compatibility with old device trees. However
it doesn't cause issues in practice. The GPIO pins impacted by this are
used for non-critical functionality.
Fixes:
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Jacky Huang
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476650a64b |
dt-bindings: reset: nuvoton: Document ma35d1 reset control
Add the dt-bindings header for Nuvoton ma35d1, that gets shared between the reset controller and reset references in the dts. Add documentation to describe nuvoton ma35d1 reset driver. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |