* pm/next: (53 commits)
LF-10339-1 Revert "soc: imx: imx8m-blk-ctrl: set LCDIF panic read hurry level"
LF-9095: gpc: fwnode: Make imx pgc power domain also set the fwnode
LF-8359 soc: imx: imx93-blk-ctrl: fix power up domain fail during early noriq resume
LF-8093 pmdomain: imx: imx8mp-blk-ctrl: add missing HSIO noc setting
LF-9380-1: soc: imx8mp_blk: Add fdcc clock to hdmimix domain
...
We should not do reset & clock gating before the ADB400 handshake done
when HDMIMIX power down. Change the flow to align with what we used
in ATF to fix the HDMI random hang issue due to ADB400 async bridge
power down failure.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Per NXP ATF implementation, the HDMI flow would be:
Assert PD1 RESET_B to LOW -> MIX GPR
Function Clock ON -> MIX GPR
Power up HDMIX PD1 by GPC SW bit -> GPC SW bit set to 1’b1
Wait GPC SW bit self clear -> Polling GPC SW bit
Wait SRC Repair bit done -> Polling SRC SW bit, if repair done, the bit is asserted to 1’b1
Function Clock OFF -> MIX GPR
De-assert PD1 RESET_B to HIGH -> MIX GPR
Function Clock ON -> MIX GPR
Use udelay 20 for waiting SRC repair bit done. Use genpd notifier for
other steps
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Per errata:
ERR050531: VPU_NOC power down handshake may hang during VC8000E/VPUMIX
power up/down cycling.
Description: VC8000E reset de-assertion edge and AXI clock may have a
timing issue.
Workaround: Set bit2 (vc8000e_clk_en) of BLK_CLK_EN_CSR to 0 to gate off
both AXI clock and VC8000E clock sent to VC8000E and AXI clock sent to
VPU_NOC m_v_2 interface during VC8000E power up(VC8000E reset is
de-asserted by HW)
Need clear BIT2 of BLK_CLK_EN_CSR before power up VPU_H1, so
add a notifier with BIT2 cleared when GENPD_NOTIFY_PRE_ON and BIT2 set
when GENPD_NOTIFY_ON to match NXP downstream Arm Trusted Firmware
implementation.
NOTE: The downstream ATF has VPU_H1 CLK SET before do ADB400 HDSK, so follow
that procdure to avoid any suprise.
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The i.MX8M family is a set of NXP product focus on delivering
the latest and greatest video and audio experience combining
state-of-the-art media-specific features with high-performance
processing while optimized for lowest power consumption.
i.MX8MQ, i.MX8MM, i.MX8MN, even the furture i.MX8MP are all
belong to this family. A GPC module is used to manage all the
PU power domain on/off. But the situation is that the number of
power domains & the power up sequence has significate difference
on those SoCs. Even on the same SoC. The power up sequence still
has big difference. It makes us hard to reuse the GPCv2 driver to
cover the whole i.MX8M family. Each time a new SoC is supported in
the mainline kernel, we need to modify the GPCv2 driver to support
it. We need to add or modify hundred lines of code in worst case.
It is a bad practice for the driver maintainability.
This driver add a more generic power domain driver that the actual
power on/off is done by TF-A code. the abstraction give us the
possibility that using one driver to cover the whole i.MX8M family
in kernel side.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Add M4 related APIs for suspend/resume support, and make
MMDC P1 IPG clock always ON, as it is required during resume
with FastMix OFF.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[ Aisheng: update to CLK HW APIs and add FIXME]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The driver register an IRQ handle to SCU for security
violation interrupt.
When an interruption is fired, the driver inform the user.
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Print the imx25 silicon revision when the clocks are initialised.
Use the same mechanism as for imx27, i.e. call mx25_revision.
This function is unused at the moment.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230802184046.153394-2-martin@kaiser.cx
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Only the imx-gpt timer driver makes use of enum imx_gpt_type that is
otherwise unused. Move its definition into the timer-imx-gpt driver.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230328100531.879485-3-u.kleine-koenig@pengutronix.de
mxc_timer_init() was originally only used by non-DT i.MX platforms.
i.MX has already been converted to be a DT-only platform.
Remove the unused mxc_timer_init() function.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230307124313.708255-1-festevam@denx.de
As on i.MX51 and i.MX53, initialize the SoC ID based on the SoC
compatible string of the board.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The soc device register code will be moved to drivers/soc/imx/,
the code needs the cpu type definitions. So let's move the cpu
type definitions to a header.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation this program
is distributed in the hope it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 263 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
If both CONFIG_CPU_IDLE or CONFIG_SOC_IMX6Q are not set
then the imx6q_cpuidle_fec_irqs_used() and other functions
should be marked static inline to avoid the following
warnings whilst building drivers/net/ethernet/freescale:
include/soc/imx/cpuidle.h:21:6: warning: symbol 'imx6q_cpuidle_fec_irqs_used' was not declared. Should it be static?
include/soc/imx/cpuidle.h:22:6: warning: symbol 'imx6q_cpuidle_fec_irqs_unused' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from
waking the CPUs when they are in wait(unclocked) state. As the hardware
workaround isn't applicable to all boards, disable the deeper idle state
when the workaround isn't present and the FEC is in use.
This allows to safely run a kernel with CPUidle enabled on all i.MX6
boards.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: David S. Miller <davem@davemloft.net> (for network changes)
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Define an enum for gpt timer device type in include/soc/imx/timer.h to
tell the gpt block differences among SoCs. Update non-DT users (clock
drivers) to pass the device type.
As we now have include/soc/imx/timer.h, the declaration of
mxc_timer_init() is moved into there as the best fit.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The revision definitions and declarations are widely used by clock
drivers. As a step of moving clock drivers out of arch/arm/mach-imx,
let's create header include/soc/imx/revision.h to accommodate them.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
