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Documented i.MX SoC's Service layer and C_DEV driver for SoC(s) enabled with hardware IP for secure-enclaves like: - edgelock enclave on i.MX93 & i.MX8ULP Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
119 lines
4.8 KiB
ReStructuredText
119 lines
4.8 KiB
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Other Firmware Interfaces
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=========================
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DMI Interfaces
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--------------
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.. kernel-doc:: drivers/firmware/dmi_scan.c
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:export:
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EDD Interfaces
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--------------
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.. kernel-doc:: drivers/firmware/edd.c
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:internal:
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Generic System Framebuffers Interface
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-------------------------------------
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.. kernel-doc:: drivers/firmware/sysfb.c
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:export:
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Intel Stratix10 SoC Service Layer
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---------------------------------
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Some features of the Intel Stratix10 SoC require a level of privilege
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higher than the kernel is granted. Such secure features include
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FPGA programming. In terms of the ARMv8 architecture, the kernel runs
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at Exception Level 1 (EL1), access to the features requires
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Exception Level 3 (EL3).
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The Intel Stratix10 SoC service layer provides an in kernel API for
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drivers to request access to the secure features. The requests are queued
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and processed one by one. ARM’s SMCCC is used to pass the execution
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of the requests on to a secure monitor (EL3).
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.. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
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:functions: stratix10_svc_command_code
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.. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
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:functions: stratix10_svc_client_msg
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.. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
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:functions: stratix10_svc_command_config_type
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.. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
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:functions: stratix10_svc_cb_data
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.. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
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:functions: stratix10_svc_client
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.. kernel-doc:: drivers/firmware/stratix10-svc.c
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:export:
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NXP i.MX Secure Enclave Enabled SoC Service layer and C_DEV driver
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------------------------------------------------------------------
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The NXP's i.MX HW IP like EdgeLock-Enclave, creating an embedded secure
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enclave within the SoC boundary to enable features like
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- HSM
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- SHE
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- V2X
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SoC enabled with the NXP i.MX secure enclave IP(s) like EdgeLock-Enclave(ELE),
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are: i.MX93, i.MX8ULP.
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This driver exposes two interfaces:
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- service layer: This layer takes the two mutex locks:
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"mu_cmd_lock" is taken to ensure one service is processed at a time. This
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lock is not unlocked, till one service processing is complete. Multiple
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messages can be exchanged with FW as part of one service processing.
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"mu_lock" is taken to ensure one message is sent over MU at a time. This
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lock is unlocked, post sending the message.
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- c_dev:
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This driver configures multiple misc-devices on the MU, to exchange
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messages from User-space application and NXP's Edgelocke Enclave firmware.
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The driver ensures that the messages must follow the following protocol
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defined.
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Non-Secure + Secure
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+---------+ +-------------+ |
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| se_fw.c +<---->+imx-mailbox.c| |
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| | | mailbox.c +<-->+------+ +------+
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+---+-----+ +-------------+ | MU X +<-->+ ELE |
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| +------+ +------+
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+----------------+ |
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| | |
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v v |
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logical logical |
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receiver waiter |
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+ + |
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| +----+------+ |
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device_ctx device_ctx device_ctx |
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User 0 User 1 User Y |
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+------+ +------+ +------+ |
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|misc.c| |misc.c| |misc.c| |
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kernel space +------+ +------+ +------+ |
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+------------------------------------------------------ |
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userspace /dev/ele_muXch0 | | |
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/dev/ele_muXch1 | |
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/dev/ele_muXchY |
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When a user sends a command to the firmware, it registers its device_ctx
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as waiter of a response from firmware.
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Enclave's Firmware owns the storage management, over linux filesystem.
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For this c_dev provisions a dedicated slave device called "receiver".
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.. kernel-doc:: drivers/firmware/imx/se_fw.c
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:export:
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