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https://github.com/nxp-imx/linux-imx.git
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7c433d1a97
The MAX96752/MAX96754 deserializers convert a single or dual-link GMSL serial input to single or dual OLDI. They also send and receive side-channel and peripheral control data, enabling full-duplex, single-wire transmission of video and bidirectional data. This driver adds the core support with separate drivers adding support for video or audio. GPIO support is included in the core part as this is not a GPIO controller in the Linux sense. It performs GPIO tunneling, translating GPIO pin transitions from local side to the remote side and viceversa. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
383 lines
11 KiB
C
383 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Core MFD support for Analog Devices MAX96752 deserializer
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*
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* Copyright 2023 NXP
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*/
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#include <linux/completion.h>
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#include <linux/device.h>
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#include <linux/of.h>
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#include <linux/of_graph.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/mfd/maxim_serdes.h>
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#include <linux/mfd/max96752.h>
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static const struct mfd_cell max96752_mfd_cells[] = {
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{
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.name = "max96752-lvds",
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.of_compatible = "maxim,max96752-lvds",
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},
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};
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static bool max96752_writable_register(struct device *dev,
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unsigned int reg)
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{
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switch (reg) {
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case MAX96752_DEV_ID ... MAX96752_DEV_VIDEO_CAP:
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case MAX96752_DEV_PIN_IN_0 ... MAX96752_DEV_PIN_IN_1:
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case MAX96752_TCTRL_PWR0 ... MAX96752_TCTRL_PWR1:
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case MAX96752_TCTRL_CTRL3:
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case MAX96752_TCTRL_INTR3:
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case MAX96752_TCTRL_INTR5:
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case MAX96752_TCTRL_INTR7:
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case MAX96752_CC_I2C_7:
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case MAX96752_CC_BITLEN_LSB:
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case MAX96752_VID_RX8:
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case MAX96752_AUD_TX5:
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case MAX96752_AUD_RX9 ... MAX96752_AUD_RX_INFO_RX4:
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case MAX96752_SPI_7:
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case MAX96752_WM_5:
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case MAX96752_RLMS_7(0):
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case MAX96752_RLMS_7(1):
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case MAX96752_RLMS_EYEMONERRCNTL(0) ... MAX96752_RLMS_EYEMONVALCNTH(0):
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case MAX96752_RLMS_EYEMONERRCNTL(1) ... MAX96752_RLMS_EYEMONVALCNTH(1):
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return false;
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default:
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return true;
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}
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}
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static bool max96752_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX96752_DEV_REG3:
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case MAX96752_TCTRL_PWR0 ... MAX96752_TCTRL_PWR1:
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case MAX96752_TCTRL_CTRL3:
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case MAX96752_TCTRL_INTR3:
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case MAX96752_TCTRL_INTR5:
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case MAX96752_TCTRL_INTR7:
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case MAX96752_CC_I2C_7:
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case MAX96752_CC_BITLEN_LSB ... MAX96752_CC_UART_2:
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case MAX96752_CC_I2C_PT_2:
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case MAX96752_VID_RX3:
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case MAX96752_VID_RX8:
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case MAX96752_AUD_TX5:
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case MAX96752_AUD_RX9 ... MAX96752_AUD_RX_INFO_RX4:
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case MAX96752_SPI_7:
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case MAX96752_WM_5:
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case MAX96752_VRX_OLDI0:
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case MAX96752_RLMS_7(0):
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case MAX96752_RLMS_37(0) ... MAX96752_RLMS_EYEMONVALCNTH(0):
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case MAX96752_RLMS_7(1):
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case MAX96752_RLMS_37(1) ... MAX96752_RLMS_EYEMONVALCNTH(1):
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case MAX96752_GPIO_A(0):
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case MAX96752_GPIO_A(1):
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case MAX96752_GPIO_A(2):
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case MAX96752_GPIO_A(3):
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case MAX96752_GPIO_A(4):
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case MAX96752_GPIO_A(5):
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case MAX96752_GPIO_A(6):
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case MAX96752_GPIO_A(7):
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case MAX96752_GPIO_A(8):
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case MAX96752_GPIO_A(9):
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case MAX96752_GPIO_A(10):
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case MAX96752_GPIO_A(11):
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case MAX96752_GPIO_A(12):
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case MAX96752_GPIO_A(13):
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case MAX96752_GPIO_A(14):
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case MAX96752_GPIO_A(15):
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return true;
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default:
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return false;
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}
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}
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const struct regmap_config max96752_regmap_cfg = {
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.name = "max96752",
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = MAX96752_COLOR_C_LUT + COLOR_LUT_SIZE,
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.writeable_reg = max96752_writable_register,
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.volatile_reg = max96752_volatile_reg,
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.cache_type = REGCACHE_RBTREE,
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};
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EXPORT_SYMBOL_GPL(max96752_regmap_cfg);
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static int max96752_get_dt_gmsl_links_params(struct max96752 *max96752)
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{
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struct device *dev = max96752->dev;
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int ret;
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int val;
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max96752->gmsl2_dual_link = of_property_present(dev->of_node, "maxim,gmsl2-dual-link");
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ret = of_property_read_s32(dev->of_node, "maxim,gmsl2-link-speed", &val);
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if (ret < 0) {
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dev_warn(dev, "GMSL2 link speed not set in DT, using pin configuration\n");
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ret = regmap_read(max96752->regmap, MAX96752_DEV_CH_CTRL, &val);
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if (ret)
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return -EIO;
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max96752->gmsl2_link_speed = val & TX_RATE_MASK;
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return 0;
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}
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if (!ret && val != 3 && val != 6) {
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dev_err(dev, "wrong GMSL speed set in DT\n");
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return -EINVAL;
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}
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max96752->gmsl2_link_speed = val / 3;
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return 0;
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}
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int max96752_set_link_params(struct max96752 *max96752)
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{
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struct device *dev = max96752->dev;
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struct regmap *regmap = max96752->regmap;
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int link_id = max96752->link_id;
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unsigned int reg_val;
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/* setting GMSL2 link speed */
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regmap_update_bits(regmap, MAX96752_DEV_CH_CTRL, RX_RATE_MASK,
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max96752->gmsl2_link_speed << RX_RATE_SHIFT);
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/* activating dual-link */
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if (max96752->gmsl2_dual_link) {
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regmap_read(regmap, MAX96752_DEV_VIDEO_CAP, ®_val);
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if (!(reg_val & DUAL_CPBL)) {
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dev_dbg(dev, "configuring dual-link mode\n");
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/* Set link configuration. */
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regmap_update_bits(regmap, MAX96752_TCTRL_CTRL0,
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LINK_CFG_MASK | AUTO_LINK, LINK_CFG_DUAL_LINK);
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}
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}
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/* set the TX_SRC_ID for all channels */
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regmap_update_bits(regmap, MAX96752_CFGL_AUDIO_TR3, AUD_TX_SRC_ID_MASK, link_id);
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regmap_update_bits(regmap, MAX96752_CFGI_INFOFR_TR3, INFOFR_TX_SRC_ID_MASK, link_id);
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regmap_update_bits(regmap, MAX96752_CFGL_SPI_TR3, SPI_TX_SRC_ID_MASK, link_id);
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regmap_update_bits(regmap, MAX96752_CFGC_CC_TR3, CC_TX_SRC_ID_MASK, link_id);
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regmap_update_bits(regmap, MAX96752_CFGL_GPIO_TR3, GPIO_TX_SRC_ID_MASK, link_id);
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regmap_update_bits(regmap, MAX96752_CFGL_IIC_TR3(0), PT_TX_SRC_ID_MASK, link_id);
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regmap_update_bits(regmap, MAX96752_CFGL_IIC_TR3(1), PT_TX_SRC_ID_MASK, link_id);
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return 0;
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}
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static void max96752_set_gpio_pull_resistor(struct max96752 *max96752, unsigned int gpio_pin,
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unsigned int pull_type, unsigned int pull_strength)
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{
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regmap_update_bits(max96752->regmap, MAX96752_GPIO_B(gpio_pin), PULL_UPDN_SEL_MASK,
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pull_type << PULL_UPDN_SEL_SHIFT);
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regmap_update_bits(max96752->regmap, MAX96752_GPIO_A(gpio_pin), RES_CFG,
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pull_strength ? RES_CFG : 0);
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}
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static void max96752_set_gpio_direction(struct max96752 *max96752, unsigned int gpio_pin,
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unsigned int direction)
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{
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regmap_update_bits(max96752->regmap, MAX96752_GPIO_A(gpio_pin), GPIO_OUT_DIS, direction);
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}
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static void max96752_set_gpio_gmsl_tx(struct max96752 *max96752, unsigned int gpio_pin, bool en)
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{
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regmap_update_bits(max96752->regmap, MAX96752_GPIO_A(gpio_pin), GPIO_TX_EN,
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en ? GPIO_TX_EN : 0);
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}
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static void max96752_set_gpio_gmsl_rx(struct max96752 *max96752, unsigned int gpio_pin, bool en)
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{
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regmap_update_bits(max96752->regmap, MAX96752_GPIO_A(gpio_pin), GPIO_RX_EN,
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en ? GPIO_RX_EN : 0);
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}
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static void max96752_set_gpio_rx_id(struct max96752 *max96752, unsigned int local_gpio_pin,
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unsigned int remote_gpio_pin)
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{
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regmap_update_bits(max96752->regmap, MAX96752_GPIO_C(local_gpio_pin), GPIO_RX_ID_MASK,
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remote_gpio_pin << GPIO_RX_ID_SHIFT);
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}
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static void max96752_config_standalone_gpio(struct max96752 *max96752, unsigned int gpio_pin,
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unsigned int *pin_configs)
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{
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struct device *dev = max96752->dev;
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dev_dbg(dev, "config standalone gpio %d: dir = %d, pull_type = %d, strength = %d\n",
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gpio_pin, pin_configs[0], pin_configs[1], pin_configs[2]);
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max96752_set_gpio_direction(max96752, gpio_pin, pin_configs[0]);
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max96752_set_gpio_pull_resistor(max96752, gpio_pin, pin_configs[1], pin_configs[2]);
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max96752_set_gpio_gmsl_tx(max96752, gpio_pin, false);
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max96752_set_gpio_gmsl_rx(max96752, gpio_pin, false);
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}
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static void max96752_config_tunneled_gpio(struct max96752 *max96752, unsigned int local_gpio_pin,
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unsigned int *pin_configs, unsigned int remote_gpio_pin)
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{
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struct device *dev = max96752->dev;
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dev_dbg(dev, "config tunneled gpio %d: dir = %d, pull_type = %d, strength = %d\n",
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local_gpio_pin, pin_configs[0], pin_configs[1], pin_configs[2]);
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max96752_set_gpio_direction(max96752, local_gpio_pin, pin_configs[0]);
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max96752_set_gpio_pull_resistor(max96752, local_gpio_pin, pin_configs[1], pin_configs[2]);
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max96752_set_gpio_gmsl_tx(max96752, local_gpio_pin, pin_configs[0] ? true : false);
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max96752_set_gpio_gmsl_rx(max96752, local_gpio_pin, pin_configs[0] ? false : true);
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if (!pin_configs[0])
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max96752_set_gpio_rx_id(max96752, local_gpio_pin, remote_gpio_pin);
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}
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static int max96752_set_gpio_pin(struct max96752 *max96752, struct device_node *gpios_node,
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struct device_node *pin_node)
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{
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struct device *dev = max96752->dev;
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unsigned int local_gpio_pin, remote_gpio_pin;
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unsigned int pin_configs[3];
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int ret;
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struct device_node *ep, *remote_pin_node;
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ret = of_property_read_u32(pin_node, "reg", &local_gpio_pin);
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if (ret)
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return ret;
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ret = of_property_read_u32_array(pin_node, "maxim,pin_config", pin_configs, 3);
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if (ret) {
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dev_err(dev, "Bad gpio pin configuration.\n");
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return ret;
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}
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ep = of_graph_get_endpoint_by_regs(gpios_node, local_gpio_pin, 0);
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if (!ep) {
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max96752_config_standalone_gpio(max96752, local_gpio_pin, pin_configs);
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return 0;
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}
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remote_pin_node = of_graph_get_remote_port(ep);
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if (!remote_pin_node) {
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dev_err(dev, "Couldn't find corresponding remote gpio pin\n");
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of_node_put(ep);
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return -ENODEV;
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}
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of_node_put(ep);
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ret = of_property_read_u32(remote_pin_node, "reg", &remote_gpio_pin);
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if (ret) {
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of_node_put(remote_pin_node);
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return ret;
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}
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of_node_put(remote_pin_node);
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max96752_config_tunneled_gpio(max96752, local_gpio_pin, pin_configs, remote_gpio_pin);
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return 0;
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}
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static int max96752_set_gpios(struct max96752 *max96752)
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{
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struct device *dev = max96752->dev;
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struct device_node *dev_node = dev->of_node;
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struct device_node *gpios_node, *child;
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int ret;
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/* look for a gpio-config node that contains gpios' pin configurations */
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gpios_node = of_get_child_by_name(dev_node, "gpio-config");
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if (!gpios_node) {
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dev_info(dev, "No gpios DT node found, using GPIOs defaults.\n");
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return 0;
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}
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for_each_child_of_node(gpios_node, child) {
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ret = max96752_set_gpio_pin(max96752, gpios_node, child);
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if (ret) {
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of_node_put(gpios_node);
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of_node_put(child);
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return ret;
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}
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}
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of_node_put(gpios_node);
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return 0;
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}
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int max96752_dev_check(struct max96752 *max96752, ulong expected_dev_id)
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{
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struct device *dev = max96752->dev;
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int ret;
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ret = regmap_read(max96752->regmap, MAX96752_DEV_ID, &max96752->id);
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if (ret) {
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dev_err(dev, "Failed to read device id: %d\n", ret);
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return ret;
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}
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if (max96752->id != expected_dev_id) {
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dev_err(dev, "Wrong Maxim deserializer detected: id 0x%x\n",
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max96752->id);
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return -ENODEV;
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}
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ret = regmap_read(max96752->regmap, MAX96752_DEV_REV, &max96752->rev);
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if (ret) {
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dev_err(dev, "Failed to read device revision: %d\n", ret);
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return ret;
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}
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max96752->rev &= DEV_REV_MASK;
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dev_info(dev, "Found Maxim deserializer with id 0x%x and rev 0x%x\n",
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max96752->id, max96752->rev);
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return 0;
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}
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EXPORT_SYMBOL(max96752_dev_check);
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int max96752_dev_init(struct max96752 *max96752)
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{
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struct device *dev = max96752->dev;
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int ret;
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dev_set_drvdata(dev, max96752);
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ret = max96752_get_dt_gmsl_links_params(max96752);
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if (ret)
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return ret;
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ret = max96752_set_link_params(max96752);
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if (ret)
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return ret;
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/* disable audio receiver by default */
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regmap_update_bits(max96752->regmap, MAX96752_AUD_RX1, AUD_EN_RX, 0);
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ret = max96752_set_gpios(max96752);
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if (ret)
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return ret;
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return devm_mfd_add_devices(max96752->dev, PLATFORM_DEVID_AUTO, max96752_mfd_cells,
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ARRAY_SIZE(max96752_mfd_cells),
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NULL, 0, NULL);
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}
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EXPORT_SYMBOL_GPL(max96752_dev_init);
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MODULE_DESCRIPTION("MAX96752 core MFD driver");
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MODULE_AUTHOR("Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>");
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MODULE_LICENSE("GPL v2");
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