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0bc1767ab3
The driver register an IRQ handle to SCU for security violation interrupt. When an interruption is fired, the driver inform the user. Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
179 lines
4.9 KiB
C
179 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2019 NXP
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*/
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#ifndef _MISC_IMX_SECVIO_SC_H_
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#define _MISC_IMX_SECVIO_SC_H_
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#include <linux/kernel.h>
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#include <linux/notifier.h>
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/* Bitmask of the security violation status bit in the HPSVS register */
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#define HPSVS__LP_SEC_VIO__MASK BIT(31)
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#define HPSVS__SW_LPSV__MASK BIT(15)
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#define HPSVS__SW_FSV__MASK BIT(14)
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#define HPSVS__SW_SV__MASK BIT(13)
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#define HPSVS__SV5__MASK BIT(5)
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#define HPSVS__SV4__MASK BIT(4)
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#define HPSVS__SV3__MASK BIT(3)
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#define HPSVS__SV2__MASK BIT(2)
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#define HPSVS__SV1__MASK BIT(1)
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#define HPSVS__SV0__MASK BIT(0)
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/* Bitmask of all security violation status bit in the HPSVS register */
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#define HPSVS__ALL_SV__MASK (HPSVS__LP_SEC_VIO__MASK | \
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HPSVS__SW_LPSV__MASK | \
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HPSVS__SW_FSV__MASK | \
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HPSVS__SW_SV__MASK | \
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HPSVS__SV5__MASK | \
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HPSVS__SV4__MASK | \
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HPSVS__SV3__MASK | \
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HPSVS__SV2__MASK | \
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HPSVS__SV1__MASK | \
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HPSVS__SV0__MASK)
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/*
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* Bitmask of the security violation and tampers status bit in the LPS register
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*/
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#define LPS__ESVD__MASK BIT(16)
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#define LPS__ET2D__MASK BIT(10)
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#define LPS__ET1D__MASK BIT(9)
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#define LPS__WMT2D__MASK BIT(8)
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#define LPS__WMT1D__MASK BIT(7)
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#define LPS__VTD__MASK BIT(6)
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#define LPS__TTD__MASK BIT(5)
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#define LPS__CTD__MASK BIT(4)
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#define LPS__PGD__MASK BIT(3)
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#define LPS__MCR__MASK BIT(2)
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#define LPS__SRTCR__MASK BIT(1)
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#define LPS__LPTA__MASK BIT(0)
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/*
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* Bitmask of all security violation and tampers status bit in the LPS register
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*/
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#define LPS__ALL_TP__MASK (LPS__ESVD__MASK | \
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LPS__ET2D__MASK | \
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LPS__ET1D__MASK | \
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LPS__WMT2D__MASK | \
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LPS__WMT1D__MASK | \
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LPS__VTD__MASK | \
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LPS__TTD__MASK | \
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LPS__CTD__MASK | \
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LPS__PGD__MASK | \
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LPS__MCR__MASK | \
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LPS__SRTCR__MASK | \
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LPS__LPTA__MASK)
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/*
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* Bitmask of the security violation and tampers status bit in the LPTDS
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* register
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*/
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#define LPTDS__ET10D__MASK BIT(7)
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#define LPTDS__ET9D__MASK BIT(6)
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#define LPTDS__ET8D__MASK BIT(5)
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#define LPTDS__ET7D__MASK BIT(4)
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#define LPTDS__ET6D__MASK BIT(3)
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#define LPTDS__ET5D__MASK BIT(2)
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#define LPTDS__ET4D__MASK BIT(1)
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#define LPTDS__ET3D__MASK BIT(0)
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/*
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* Bitmask of all security violation and tampers status bit in the LPTDS
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* register
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*/
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#define LPTDS__ALL_TP__MASK (LPTDS__ET10D__MASK | \
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LPTDS__ET9D__MASK | \
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LPTDS__ET8D__MASK | \
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LPTDS__ET7D__MASK | \
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LPTDS__ET6D__MASK | \
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LPTDS__ET5D__MASK | \
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LPTDS__ET4D__MASK | \
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LPTDS__ET3D__MASK)
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/* Struct for notification */
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/**
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* struct secvio_sc_notifier_info - Information about the status of the SNVS
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* @hpsvs: status from register HPSVS
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* @lps: status from register LPS
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* @lptds: status from register LPTDS
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*/
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struct secvio_sc_notifier_info {
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u32 hpsvs;
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u32 lps;
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u32 lptds;
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};
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/**
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* register_imx_secvio_sc_notifier() - Register a notifier
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*
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* @nb: The notifier block structure
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*
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* Register a function to notify to the imx-secvio-sc module. The function
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* will be notified when a check of the state of the SNVS happens: called by
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* a user or triggered by an interruption form the SNVS.
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*
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* The struct secvio_sc_notifier_info is passed as data to the notifier.
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*
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* Return: 0 in case of success
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*/
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int register_imx_secvio_sc_notifier(struct notifier_block *nb);
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/**
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* unregister_imx_secvio_sc_notifier() - Unregister a notifier
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*
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* @nb: The notifier block structure
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*
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* Return: 0 in case of success
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*/
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int unregister_imx_secvio_sc_notifier(struct notifier_block *nb);
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/**
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* imx_secvio_sc_get_state() - Get the state of the SNVS
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*
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* @info: The structure containing the state of the SNVS
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*
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* Return: 0 in case of success
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*/
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int imx_secvio_sc_get_state(struct secvio_sc_notifier_info *info);
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/**
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* imx_secvio_sc_check_state() - Check the state of the SNVS
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*
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* If a security violation or a tamper is detected, the list of notifier
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* (registered using register_imx_secvio_sc_notifier() ) will be called
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*
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* Return: 0 in case of success
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*/
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int imx_secvio_sc_check_state(void);
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/**
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* imx_secvio_sc_clear_state() - Clear the state of the SNVS
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*
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* @hpsvs: Value to write to HPSVS register
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* @lps: Value to write to LPS register
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* @lptds: Value to write to LPTDSregister
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*
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* The function will write the value provided to the corresponding register
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* which will clear the status of the bits set.
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*
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* Return: 0 in case of success
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*/
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int imx_secvio_sc_clear_state(u32 hpsvs, u32 lps, u32 lptds);
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/* Commands of the ioctl interface */
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enum ioctl_cmd_t {
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GET_STATE,
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CHECK_STATE,
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CLEAR_STATE,
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};
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/* Definition for the ioctl interface */
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#define IMX_SECVIO_SC_GET_STATE _IOR('S', GET_STATE, \
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struct secvio_sc_notifier_info)
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#define IMX_SECVIO_SC_CHECK_STATE _IO('S', CHECK_STATE)
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#define IMX_SECVIO_SC_CLEAR_STATE _IOW('S', CLEAR_STATE, \
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struct secvio_sc_notifier_info)
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#endif /* _MISC_IMX_SECVIO_SC_H_ */
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