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https://github.com/nxp-imx/linux-imx.git
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This change adds DRM_IOCTL_IMX_DPU_SYNC_DMABUF ioctl, that enables cache coherency handling for dma-bufs from a generic exporter, that are used with the DPU driver. Use case is typically for buffers that require read/write by CPU at some point and that are accessed through CPU cache for performance reasons. Signed-off-by: Julien Vuillaumier <julien.vuillaumier@nxp.com> Reviewed-by: Xianzhong Li <xianzhong.li@nxp.com> Reviewed-by: Guangliu Ding <guangliu.ding@nxp.com>
110 lines
2.5 KiB
C
110 lines
2.5 KiB
C
/*
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* Copyright 2017,2022-2023 NXP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _UAPI_IMX_DRM_H_
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#define _UAPI_IMX_DRM_H_
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/**
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* Dpu frame info.
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*
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*/
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struct drm_imx_dpu_frame_info {
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__u32 width;
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__u32 height;
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__u32 x_offset;
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__u32 y_offset;
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__u32 stride;
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__u32 format;
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__u64 modifier;
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__u64 baddr;
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__u64 uv_addr;
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};
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#define DRM_IMX_DPU_SET_CMDLIST 0x00
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#define DRM_IMX_DPU_WAIT 0x01
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#define DRM_IMX_DPU_GET_PARAM 0x02
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#define DRM_IMX_DPU_SYNC_DMABUF 0x03
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#define DRM_IOCTL_IMX_DPU_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_IMX_DPU_SET_CMDLIST, struct drm_imx_dpu_set_cmdlist)
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#define DRM_IOCTL_IMX_DPU_WAIT DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_IMX_DPU_WAIT, struct drm_imx_dpu_wait)
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#define DRM_IOCTL_IMX_DPU_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_IMX_DPU_GET_PARAM, enum drm_imx_dpu_param)
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#define DRM_IOCTL_IMX_DPU_SYNC_DMABUF DRM_IOW(DRM_COMMAND_BASE + \
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DRM_IMX_DPU_SYNC_DMABUF, struct drm_imx_dpu_sync_dmabuf)
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/**
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* struct drm_imx_dpu_set_cmdlist - ioctl argument for
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* DRM_IMX_DPU_SET_CMDLIST.
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*/
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struct drm_imx_dpu_set_cmdlist {
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__u64 cmd;
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__u32 cmd_nr;
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/* reserved */
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__u64 user_data;
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};
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/**
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* struct drm_imx_dpu_wait - ioctl argument for
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* DRM_IMX_DPU_WAIT.
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*
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*/
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struct drm_imx_dpu_wait {
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/* reserved */
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__u64 user_data;
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};
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enum drm_imx_dpu_sync_direction {
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IMX_DPU_SYNC_TO_CPU = 0,
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IMX_DPU_SYNC_TO_DEVICE = 1,
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IMX_DPU_SYNC_TO_BOTH = 2,
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};
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/**
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* struct drm_imx_dpu_sync_dmabuf - ioctl argument for
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* DRM_IMX_DPU_SYNC_DMABUF.
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*
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*/
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struct drm_imx_dpu_sync_dmabuf {
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__u32 dmabuf_fd;
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__u32 direction;
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};
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/**
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* enum drm_imx_dpu_param - ioctl argument for
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* DRM_IMX_DPU_GET_PARAM.
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*
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*/
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enum drm_imx_dpu_param {
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DRM_IMX_MAX_DPUS,
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DRM_IMX_GET_FENCE,
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};
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _UAPI_IMX_DRM_H_ */
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