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fd67a7a1a2
During mt8188_afe_init_clock(), mt8188_audsys_clk_register() was called
followed by several other devm functions. The caller of
mt8188_afe_init_clock() utilized devm_add_action_or_reset() to call
mt8188_afe_deinit_clock(). However, the order was incorrect, causing a
use-after-free issue during remove time.
At probe time, the order of calls was:
1. mt8188_audsys_clk_register
2. afe_priv->clk = devm_kcalloc
3. afe_priv->clk[i] = devm_clk_get
At remove time, the order of calls was:
1. mt8188_audsys_clk_unregister
3. free afe_priv->clk[i]
2. free afe_priv->clk
To resolve the problem, it's necessary to move devm_add_action_or_reset()
to the appropriate position so that the remove order can be 3->2->1.
Fixes: f6b026479b ("ASoC: mediatek: mt8188: support audio clock control")
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230601033318.10408-2-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
15 lines
335 B
C
15 lines
335 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* mt8188-audsys-clk.h -- MediaTek 8188 audsys clock definition
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*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Chun-Chia Chiu <chun-chia.chiu@mediatek.com>
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*/
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#ifndef _MT8188_AUDSYS_CLK_H_
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#define _MT8188_AUDSYS_CLK_H_
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int mt8188_audsys_clk_register(struct mtk_base_afe *afe);
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#endif
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