Kishon Vijay Abraham I 28081b7285 phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) ... Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as clocks so that it's possible to select one of these two inputs from device tree. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/20210319124128.13308-13-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2021-03-31 16:43:21 +05:30
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cdns-dphy.c	phy: cadence: convert to devm_platform_ioremap_resource	2020-11-16 12:47:46 +05:30
Kconfig	phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks)	2021-03-31 16:43:21 +05:30
Makefile	phy: cadence: salvo: add salvo phy driver	2020-05-07 09:46:36 +05:30
phy-cadence-salvo.c	phy: cadence: convert to devm_platform_ioremap_resource	2020-11-16 12:47:46 +05:30
phy-cadence-sierra.c	phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks)	2021-03-31 16:43:21 +05:30
phy-cadence-torrent.c	phy: cadence-torrent: Use a common header file for Cadence SERDES	2021-03-31 16:43:20 +05:30