Vladimir Oltean 82e6150c97 phy: introduce C72_LT_INIT API for backplane link training ... Currently it is possible that the state of a failed link training sequence lingers (is preserved) onto the next link training attempt. That is not okay and we should reset the state so that we always start from a consistent position. This is not possible with the current API, because the backplane AN/LT module actually never explicitly tells the SerDes PHY that a new training sequence has begun, and we cannot infer that from C72_LT_DONE means "done successfully". We need to introduce a command specific to that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>		2024-07-31 18:45:47 +03:00
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tegra	phy: tegra: xusb: Add API to retrieve the port number of phy	2024-04-03 15:28:28 +02:00
omap_control_phy.h
omap_usb.h
pcie.h
phy-dp.h
phy-ethernet.h	phy: introduce C72_LT_INIT API for backplane link training	2024-07-31 18:45:47 +03:00
phy-fsl-lynx.h	phy: lynx-10g: export the lynx_lane_mode enum into a new header file	2024-04-29 13:28:44 +02:00
phy-lvds.h
phy-mipi-dphy.h
phy-mixel-lvds-combo.h	phy: Add Mixel LVDS combo PHY support	2023-10-30 16:05:44 +08:00
phy-mixel-lvds.h	phy: Add Mixel LVDS PHY support	2023-10-30 16:05:44 +08:00
phy-sun4i-usb.h
phy.h	phy: fix PHY_STATUS_PCVT_ADDR API for QSGMII/10G-QXGMII	2024-07-31 18:45:47 +03:00
ulpi_phy.h