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34949a31fb
Add generic mailbox command that can support SDM command. User can use this command to send SDM mailbox command. User have to specified an input file which contain the command data and an output file for SDM response to be copied over. Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com> Signed-off-by: Kah Jing Lee <kah.jing.lee@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20230727192907.982070-1-dinguyen@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
624 lines
18 KiB
C
624 lines
18 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2017-2018, Intel Corporation
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*/
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#ifndef __STRATIX10_SMC_H
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#define __STRATIX10_SMC_H
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#include <linux/arm-smccc.h>
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#include <linux/bitops.h>
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/**
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* This file defines the Secure Monitor Call (SMC) message protocol used for
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* service layer driver in normal world (EL1) to communicate with secure
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* monitor software in Secure Monitor Exception Level 3 (EL3).
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*
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* This file is shared with secure firmware (FW) which is out of kernel tree.
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*
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* An ARM SMC instruction takes a function identifier and up to 6 64-bit
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* register values as arguments, and can return up to 4 64-bit register
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* value. The operation of the secure monitor is determined by the parameter
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* values passed in through registers.
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*
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* EL1 and EL3 communicates pointer as physical address rather than the
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* virtual address.
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*
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* Functions specified by ARM SMC Calling convention:
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*
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* FAST call executes atomic operations, returns when the requested operation
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* has completed.
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* STD call starts a operation which can be preempted by a non-secure
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* interrupt. The call can return before the requested operation has
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* completed.
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*
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* a0..a7 is used as register names in the descriptions below, on arm32
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* that translates to r0..r7 and on arm64 to w0..w7.
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*/
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/**
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* @func_num: function ID
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*/
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#define INTEL_SIP_SMC_STD_CALL_VAL(func_num) \
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_64, \
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ARM_SMCCC_OWNER_SIP, (func_num))
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#define INTEL_SIP_SMC_FAST_CALL_VAL(func_num) \
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64, \
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ARM_SMCCC_OWNER_SIP, (func_num))
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/**
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* Return values in INTEL_SIP_SMC_* call
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*
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* INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION:
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* Secure monitor software doesn't recognize the request.
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*
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* INTEL_SIP_SMC_STATUS_OK:
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* Secure monitor software accepts the service client's request.
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*
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* INTEL_SIP_SMC_STATUS_BUSY:
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* Secure monitor software is still processing service client's request.
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*
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* INTEL_SIP_SMC_STATUS_REJECTED:
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* Secure monitor software reject the service client's request.
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*
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* INTEL_SIP_SMC_STATUS_ERROR:
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* There is error during the process of service request.
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*
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* INTEL_SIP_SMC_RSU_ERROR:
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* There is error during the process of remote status update request.
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*/
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#define INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION 0xFFFFFFFF
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#define INTEL_SIP_SMC_STATUS_OK 0x0
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#define INTEL_SIP_SMC_STATUS_BUSY 0x1
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#define INTEL_SIP_SMC_STATUS_REJECTED 0x2
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#define INTEL_SIP_SMC_STATUS_ERROR 0x4
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#define INTEL_SIP_SMC_RSU_ERROR 0x7
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/**
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* Request INTEL_SIP_SMC_FPGA_CONFIG_START
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*
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* Sync call used by service driver at EL1 to request the FPGA in EL3 to
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* be prepare to receive a new configuration.
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_FPGA_CONFIG_START.
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* a1: flag for full or partial configuration. 0 for full and 1 for partial
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* configuration.
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* a2-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK, or INTEL_SIP_SMC_STATUS_ERROR.
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* a1-3: not used.
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*/
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#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START 1
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#define INTEL_SIP_SMC_FPGA_CONFIG_START \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START)
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/**
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* Request INTEL_SIP_SMC_FPGA_CONFIG_WRITE
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*
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* Async call used by service driver at EL1 to provide FPGA configuration data
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* to secure world.
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_FPGA_CONFIG_WRITE.
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* a1: 64bit physical address of the configuration data memory block
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* a2: Size of configuration data block.
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* a3-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
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* INTEL_SIP_SMC_STATUS_ERROR.
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* a1: 64bit physical address of 1st completed memory block if any completed
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* block, otherwise zero value.
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* a2: 64bit physical address of 2nd completed memory block if any completed
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* block, otherwise zero value.
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* a3: 64bit physical address of 3rd completed memory block if any completed
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* block, otherwise zero value.
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*/
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#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE 2
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#define INTEL_SIP_SMC_FPGA_CONFIG_WRITE \
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INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE)
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/**
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* Request INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE
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*
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* Sync call used by service driver at EL1 to track the completed write
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* transactions. This request is called after INTEL_SIP_SMC_FPGA_CONFIG_WRITE
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* call returns INTEL_SIP_SMC_STATUS_BUSY.
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE.
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* a1-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FPGA_BUSY or
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* INTEL_SIP_SMC_STATUS_ERROR.
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* a1: 64bit physical address of 1st completed memory block.
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* a2: 64bit physical address of 2nd completed memory block if
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* any completed block, otherwise zero value.
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* a3: 64bit physical address of 3rd completed memory block if
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* any completed block, otherwise zero value.
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*/
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#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE 3
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#define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
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/**
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* Request INTEL_SIP_SMC_FPGA_CONFIG_ISDONE
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*
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* Sync call used by service driver at EL1 to inform secure world that all
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* data are sent, to check whether or not the secure world had completed
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* the FPGA configuration process.
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_FPGA_CONFIG_ISDONE.
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* a1-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
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* INTEL_SIP_SMC_STATUS_ERROR.
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* a1-3: not used.
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*/
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#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE 4
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#define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE)
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/**
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* Request INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM
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*
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* Sync call used by service driver at EL1 to query the physical address of
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* memory block reserved by secure monitor software.
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*
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* Call register usage:
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* a0:INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM.
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* a1-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
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* a1: start of physical address of reserved memory block.
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* a2: size of reserved memory block.
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* a3: not used.
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*/
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#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM 5
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#define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM)
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/**
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* Request INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK
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*
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* For SMC loop-back mode only, used for internal integration, debugging
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* or troubleshooting.
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK.
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* a1-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
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* a1-3: not used.
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*/
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#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK 6
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#define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
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/**
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* Request INTEL_SIP_SMC_REG_READ
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*
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* Read a protected register at EL3
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_REG_READ.
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* a1: register address.
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* a2-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
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* a1: value in the register
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* a2-3: not used.
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*/
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#define INTEL_SIP_SMC_FUNCID_REG_READ 7
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#define INTEL_SIP_SMC_REG_READ \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
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/**
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* Request INTEL_SIP_SMC_REG_WRITE
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*
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* Write a protected register at EL3
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_REG_WRITE.
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* a1: register address
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* a2: value to program into register.
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* a3-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
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* a1-3: not used.
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*/
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#define INTEL_SIP_SMC_FUNCID_REG_WRITE 8
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#define INTEL_SIP_SMC_REG_WRITE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
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/**
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* Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
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*
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* Update one or more bits in a protected register at EL3 using a
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* read-modify-write operation.
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_REG_UPDATE.
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* a1: register address
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* a2: write Mask.
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* a3: value to write.
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* a4-7: not used.
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*
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* Return status:
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* a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
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* a1-3: Not used.
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*/
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#define INTEL_SIP_SMC_FUNCID_REG_UPDATE 9
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#define INTEL_SIP_SMC_REG_UPDATE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
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/**
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* Request INTEL_SIP_SMC_RSU_STATUS
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*
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* Request remote status update boot log, call is synchronous.
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_STATUS
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* a1-7 not used
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*
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* Return status
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* a0: Current Image
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* a1: Last Failing Image
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* a2: Version | State
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* a3: Error details | Error location
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*
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* Or
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*
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* a0: INTEL_SIP_SMC_RSU_ERROR
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_STATUS 11
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#define INTEL_SIP_SMC_RSU_STATUS \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
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/**
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* Request INTEL_SIP_SMC_RSU_UPDATE
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*
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* Request to set the offset of the bitstream to boot after reboot, call
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* is synchronous.
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_UPDATE
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* a1 64bit physical address of the configuration data memory in flash
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* a2-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12
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#define INTEL_SIP_SMC_RSU_UPDATE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
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/**
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* Request INTEL_SIP_SMC_ECC_DBE
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*
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* Sync call used by service driver at EL1 to alert EL3 that a Double
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* Bit ECC error has occurred.
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_ECC_DBE
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* a1 SysManager Double Bit Error value
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* a2-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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*/
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#define INTEL_SIP_SMC_FUNCID_ECC_DBE 13
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#define INTEL_SIP_SMC_ECC_DBE \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
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/**
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* Request INTEL_SIP_SMC_RSU_NOTIFY
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*
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* Sync call used by service driver at EL1 to report hard processor
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* system execution stage to firmware
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_NOTIFY
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* a1 32bit value representing hard processor system execution stage
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* a2-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
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#define INTEL_SIP_SMC_RSU_NOTIFY \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
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/**
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* Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
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*
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* Sync call used by service driver at EL1 to query RSU retry counter
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
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* a1-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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* a1 the retry counter
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*
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* Or
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*
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* a0 INTEL_SIP_SMC_RSU_ERROR
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
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#define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
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/**
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* Request INTEL_SIP_SMC_RSU_DCMF_VERSION
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*
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* Sync call used by service driver at EL1 to query DCMF (Decision
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* Configuration Management Firmware) version from FW
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_DCMF_VERSION
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* a1-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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* a1 dcmf1 | dcmf0
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* a2 dcmf3 | dcmf2
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*
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* Or
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*
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* a0 INTEL_SIP_SMC_RSU_ERROR
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16
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#define INTEL_SIP_SMC_RSU_DCMF_VERSION \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION)
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/**
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* Request INTEL_SIP_SMC_RSU_MAX_RETRY
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*
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* Sync call used by service driver at EL1 to query max retry value from FW
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_MAX_RETRY
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* a1-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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* a1 max retry value
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*
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* Or
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* a0 INTEL_SIP_SMC_RSU_ERROR
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18
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#define INTEL_SIP_SMC_RSU_MAX_RETRY \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)
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/**
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* Request INTEL_SIP_SMC_RSU_DCMF_STATUS
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*
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* Sync call used by service driver at EL1 to query DCMF status from FW
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*
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* Call register usage:
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* a0 INTEL_SIP_SMC_RSU_DCMF_STATUS
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* a1-7 not used
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*
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* Return status
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* a0 INTEL_SIP_SMC_STATUS_OK
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* a1 dcmf3 | dcmf2 | dcmf1 | dcmf0
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*
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* Or
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*
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* a0 INTEL_SIP_SMC_RSU_ERROR
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*/
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#define INTEL_SIP_SMC_FUNCID_RSU_DCMF_STATUS 20
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#define INTEL_SIP_SMC_RSU_DCMF_STATUS \
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INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_STATUS)
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/**
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* Request INTEL_SIP_SMC_SERVICE_COMPLETED
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* Sync call to check if the secure world have completed service request
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* or not.
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*
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* Call register usage:
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* a0: INTEL_SIP_SMC_SERVICE_COMPLETED
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* a1: this register is optional. If used, it is the physical address for
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* secure firmware to put output data
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* a2: this register is optional. If used, it is the size of output data
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* a3-a7: not used
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*
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* Return status:
|
|
* a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR,
|
|
* INTEL_SIP_SMC_REJECTED or INTEL_SIP_SMC_STATUS_BUSY
|
|
* a1: mailbox error if a0 is INTEL_SIP_SMC_STATUS_ERROR
|
|
* a2: physical address containing the process info
|
|
* for FCS certificate -- the data contains the certificate status
|
|
* for FCS cryption -- the data contains the actual data size FW processes
|
|
* a3: output data size
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED 30
|
|
#define INTEL_SIP_SMC_SERVICE_COMPLETED \
|
|
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED)
|
|
|
|
/**
|
|
* Request INTEL_SIP_SMC_FIRMWARE_VERSION
|
|
*
|
|
* Sync call used to query the version of running firmware
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_FIRMWARE_VERSION
|
|
* a1-a7 not used
|
|
*
|
|
* Return status:
|
|
* a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR
|
|
* a1 running firmware version
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION 31
|
|
#define INTEL_SIP_SMC_FIRMWARE_VERSION \
|
|
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION)
|
|
|
|
/**
|
|
* SMC call protocol for Mailbox, starting FUNCID from 60
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_MBOX_SEND_CMD
|
|
* a1 mailbox command code
|
|
* a2 physical address that contain mailbox command data (not include header)
|
|
* a3 mailbox command data size in word
|
|
* a4 set to 0 for CASUAL, set to 1 for URGENT
|
|
* a5 physical address for secure firmware to put response data
|
|
* (not include header)
|
|
* a6 maximum size in word of physical address to store response data
|
|
* a7 not used
|
|
*
|
|
* Return status
|
|
* a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_REJECTED or
|
|
* INTEL_SIP_SMC_STATUS_ERROR
|
|
* a1 mailbox error code
|
|
* a2 response data length in word
|
|
* a3 not used
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD 60
|
|
#define INTEL_SIP_SMC_MBOX_SEND_CMD \
|
|
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD)
|
|
|
|
/**
|
|
* Request INTEL_SIP_SMC_SVC_VERSION
|
|
*
|
|
* Sync call used to query the SIP SMC API Version
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_SVC_VERSION
|
|
* a1-a7 not used
|
|
*
|
|
* Return status:
|
|
* a0 INTEL_SIP_SMC_STATUS_OK
|
|
* a1 Major
|
|
* a2 Minor
|
|
*/
|
|
#define INTEL_SIP_SMC_SVC_FUNCID_VERSION 512
|
|
#define INTEL_SIP_SMC_SVC_VERSION \
|
|
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_SVC_FUNCID_VERSION)
|
|
|
|
/**
|
|
* SMC call protocol for FPGA Crypto Service (FCS)
|
|
* FUNCID starts from 90
|
|
*/
|
|
|
|
/**
|
|
* Request INTEL_SIP_SMC_FCS_RANDOM_NUMBER
|
|
*
|
|
* Sync call used to query the random number generated by the firmware
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_FCS_RANDOM_NUMBER
|
|
* a1 the physical address for firmware to write generated random data
|
|
* a2-a7 not used
|
|
*
|
|
* Return status:
|
|
* a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or
|
|
* INTEL_SIP_SMC_FCS_REJECTED
|
|
* a1 mailbox error
|
|
* a2 the physical address of generated random number
|
|
* a3 size
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER 90
|
|
#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER \
|
|
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER)
|
|
|
|
/**
|
|
* Request INTEL_SIP_SMC_FCS_CRYPTION
|
|
* Async call for data encryption and HMAC signature generation, or for
|
|
* data decryption and HMAC verification.
|
|
*
|
|
* Call INTEL_SIP_SMC_SERVICE_COMPLETED to get the output encrypted or
|
|
* decrypted data
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_FCS_CRYPTION
|
|
* a1 cryption mode (1 for encryption and 0 for decryption)
|
|
* a2 physical address which stores to be encrypted or decrypted data
|
|
* a3 input data size
|
|
* a4 physical address which will hold the encrypted or decrypted output data
|
|
* a5 output data size
|
|
* a6-a7 not used
|
|
*
|
|
* Return status:
|
|
* a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR or
|
|
* INTEL_SIP_SMC_STATUS_REJECTED
|
|
* a1-3 not used
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_FCS_CRYPTION 91
|
|
#define INTEL_SIP_SMC_FCS_CRYPTION \
|
|
INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_CRYPTION)
|
|
|
|
/**
|
|
* Request INTEL_SIP_SMC_FCS_SERVICE_REQUEST
|
|
* Async call for authentication service of HPS software
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_FCS_SERVICE_REQUEST
|
|
* a1 the physical address of data block
|
|
* a2 size of data block
|
|
* a3-a7 not used
|
|
*
|
|
* Return status:
|
|
* a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_ERROR or
|
|
* INTEL_SIP_SMC_REJECTED
|
|
* a1-a3 not used
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST 92
|
|
#define INTEL_SIP_SMC_FCS_SERVICE_REQUEST \
|
|
INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST)
|
|
|
|
/**
|
|
* Request INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE
|
|
* Sync call to send a signed certificate
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_FCS_SEND_CERTIFICATE
|
|
* a1 the physical address of CERTIFICATE block
|
|
* a2 size of data block
|
|
* a3-a7 not used
|
|
*
|
|
* Return status:
|
|
* a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_FCS_REJECTED
|
|
* a1-a3 not used
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE 93
|
|
#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE \
|
|
INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE)
|
|
|
|
/**
|
|
* Request INTEL_SIP_SMC_FCS_GET_PROVISION_DATA
|
|
* Sync call to dump all the fuses and key hashes
|
|
*
|
|
* Call register usage:
|
|
* a0 INTEL_SIP_SMC_FCS_GET_PROVISION_DATA
|
|
* a1 the physical address for firmware to write structure of fuse and
|
|
* key hashes
|
|
* a2-a7 not used
|
|
*
|
|
* Return status:
|
|
* a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or
|
|
* INTEL_SIP_SMC_FCS_REJECTED
|
|
* a1 mailbox error
|
|
* a2 physical address for the structure of fuse and key hashes
|
|
* a3 the size of structure
|
|
*
|
|
*/
|
|
#define INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA 94
|
|
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
|
|
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)
|
|
|
|
#endif
|