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net: ti: icssg-prueth: Add ICSSG FW Stats
The ICSSG firmware maintains set of stats called PA_STATS. Currently the driver only dumps 4 stats. Add support for dumping more stats. The offset for different stats are defined as MACROs in icssg_switch_map.h file. All the offsets are for Slice0. Slice1 offsets are slice0 + 4. The offset calculation is taken care while reading the stats in emac_update_hardware_stats(). The statistics are documented in Documentation/networking/device_drivers/icssg_prueth.rst Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Link: https://patch.msgid.link/20250424095316.2643573-1-danishanwar@ti.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -55,6 +55,7 @@ Contents:
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ti/cpsw_switchdev
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ti/am65_nuss_cpsw_switchdev
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ti/tlan
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ti/icssg_prueth
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wangxun/txgbe
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wangxun/ngbe
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@ -0,0 +1,56 @@
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.. SPDX-License-Identifier: GPL-2.0
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==============================================
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Texas Instruments ICSSG PRUETH ethernet driver
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==============================================
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:Version: 1.0
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ICSSG Firmware
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==============
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Every ICSSG core has two Programmable Real-Time Unit(PRUs), two auxiliary
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Real-Time Transfer Unit (RTUs), and two Transmit Real-Time Transfer Units
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(TX_PRUs). Each one of these runs its own firmware. The firmwares combnined are
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referred as ICSSG Firmware.
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Firmware Statistics
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===================
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The ICSSG firmware maintains certain statistics which are dumped by the driver
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via ``ethtool -S <interface>``
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These statistics are as follows,
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- ``FW_RTU_PKT_DROP``: Diagnostic error counter which increments when RTU drops a locally injected packet due to port being disabled or rule violation.
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- ``FW_Q0_OVERFLOW``: TX overflow counter for queue0
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- ``FW_Q1_OVERFLOW``: TX overflow counter for queue1
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- ``FW_Q2_OVERFLOW``: TX overflow counter for queue2
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- ``FW_Q3_OVERFLOW``: TX overflow counter for queue3
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- ``FW_Q4_OVERFLOW``: TX overflow counter for queue4
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- ``FW_Q5_OVERFLOW``: TX overflow counter for queue5
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- ``FW_Q6_OVERFLOW``: TX overflow counter for queue6
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- ``FW_Q7_OVERFLOW``: TX overflow counter for queue7
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- ``FW_DROPPED_PKT``: This counter is incremented when a packet is dropped at PRU because of rule violation.
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- ``FW_RX_ERROR``: Incremented if there was a CRC error or Min/Max frame error at PRU
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- ``FW_RX_DS_INVALID``: Incremented when RTU detects Data Status invalid condition
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- ``FW_TX_DROPPED_PACKET``: Counter for packets dropped via TX Port
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- ``FW_TX_TS_DROPPED_PACKET``: Counter for packets with TS flag dropped via TX Port
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- ``FW_INF_PORT_DISABLED``: Incremented when RX frame is dropped due to port being disabled
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- ``FW_INF_SAV``: Incremented when RX frame is dropped due to Source Address violation
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- ``FW_INF_SA_DL``: Incremented when RX frame is dropped due to Source Address being in the denylist
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- ``FW_INF_PORT_BLOCKED``: Incremented when RX frame is dropped due to port being blocked and frame being a special frame
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- ``FW_INF_DROP_TAGGED`` : Incremented when RX frame is dropped for being tagged
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- ``FW_INF_DROP_PRIOTAGGED``: Incremented when RX frame is dropped for being priority tagged
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- ``FW_INF_DROP_NOTAG``: Incremented when RX frame is dropped for being untagged
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- ``FW_INF_DROP_NOTMEMBER``: Incremented when RX frame is dropped for port not being member of VLAN
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- ``FW_RX_EOF_SHORT_FRMERR``: Incremented if End Of Frame (EOF) task is scheduled without seeing RX_B1
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- ``FW_RX_B0_DROP_EARLY_EOF``: Incremented when frame is dropped due to Early EOF
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- ``FW_TX_JUMBO_FRM_CUTOFF``: Incremented when frame is cut off to prevent packet size > 2000 Bytes
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- ``FW_RX_EXP_FRAG_Q_DROP``: Incremented when express frame is received in the same queue as the previous fragment
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- ``FW_RX_FIFO_OVERRUN``: RX fifo overrun counter
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- ``FW_CUT_THR_PKT``: Incremented when a packet is forwarded using Cut-Through forwarding method
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- ``FW_HOST_RX_PKT_CNT``: Number of valid packets sent by Rx PRU to Host on PSI
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- ``FW_HOST_TX_PKT_CNT``: Number of valid packets copied by RTU0 to Tx queues
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- ``FW_HOST_EGRESS_Q_PRE_OVERFLOW``: Host Egress Q (Pre-emptible) Overflow Counter
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- ``FW_HOST_EGRESS_Q_EXP_OVERFLOW``: Host Egress Q (Pre-emptible) Overflow Counter
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@ -1318,10 +1318,28 @@ void icssg_ndo_get_stats64(struct net_device *ndev,
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stats->rx_over_errors = emac_get_stat_by_name(emac, "rx_over_errors");
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stats->multicast = emac_get_stat_by_name(emac, "rx_multicast_frames");
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stats->rx_errors = ndev->stats.rx_errors;
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stats->rx_dropped = ndev->stats.rx_dropped;
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stats->rx_errors = ndev->stats.rx_errors +
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emac_get_stat_by_name(emac, "FW_RX_ERROR") +
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emac_get_stat_by_name(emac, "FW_RX_EOF_SHORT_FRMERR") +
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emac_get_stat_by_name(emac, "FW_RX_B0_DROP_EARLY_EOF") +
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emac_get_stat_by_name(emac, "FW_RX_EXP_FRAG_Q_DROP") +
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emac_get_stat_by_name(emac, "FW_RX_FIFO_OVERRUN");
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stats->rx_dropped = ndev->stats.rx_dropped +
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emac_get_stat_by_name(emac, "FW_DROPPED_PKT") +
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emac_get_stat_by_name(emac, "FW_INF_PORT_DISABLED") +
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emac_get_stat_by_name(emac, "FW_INF_SAV") +
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emac_get_stat_by_name(emac, "FW_INF_SA_DL") +
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emac_get_stat_by_name(emac, "FW_INF_PORT_BLOCKED") +
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emac_get_stat_by_name(emac, "FW_INF_DROP_TAGGED") +
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emac_get_stat_by_name(emac, "FW_INF_DROP_PRIOTAGGED") +
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emac_get_stat_by_name(emac, "FW_INF_DROP_NOTAG") +
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emac_get_stat_by_name(emac, "FW_INF_DROP_NOTMEMBER");
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stats->tx_errors = ndev->stats.tx_errors;
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stats->tx_dropped = ndev->stats.tx_dropped;
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stats->tx_dropped = ndev->stats.tx_dropped +
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emac_get_stat_by_name(emac, "FW_RTU_PKT_DROP") +
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emac_get_stat_by_name(emac, "FW_TX_DROPPED_PACKET") +
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emac_get_stat_by_name(emac, "FW_TX_TS_DROPPED_PACKET") +
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emac_get_stat_by_name(emac, "FW_TX_JUMBO_FRM_CUTOFF");
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}
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EXPORT_SYMBOL_GPL(icssg_ndo_get_stats64);
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@ -54,7 +54,7 @@
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#define ICSSG_MAX_RFLOWS 8 /* per slice */
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#define ICSSG_NUM_PA_STATS 4
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#define ICSSG_NUM_PA_STATS 32
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#define ICSSG_NUM_MIIG_STATS 60
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/* Number of ICSSG related stats */
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#define ICSSG_NUM_STATS (ICSSG_NUM_MIIG_STATS + ICSSG_NUM_PA_STATS)
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@ -11,7 +11,6 @@
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#define ICSSG_TX_PACKET_OFFSET 0xA0
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#define ICSSG_TX_BYTE_OFFSET 0xEC
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#define ICSSG_FW_STATS_BASE 0x0248
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static u32 stats_base[] = { 0x54c, /* Slice 0 stats start */
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0xb18, /* Slice 1 stats start */
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@ -46,9 +45,8 @@ void emac_update_hardware_stats(struct prueth_emac *emac)
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if (prueth->pa_stats) {
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for (i = 0; i < ARRAY_SIZE(icssg_all_pa_stats); i++) {
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reg = ICSSG_FW_STATS_BASE +
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icssg_all_pa_stats[i].offset *
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PRUETH_NUM_MACS + slice * sizeof(u32);
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reg = icssg_all_pa_stats[i].offset +
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slice * sizeof(u32);
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regmap_read(prueth->pa_stats, reg, &val);
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emac->pa_stats[i] += val;
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}
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@ -80,7 +78,7 @@ int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name)
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if (emac->prueth->pa_stats) {
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for (i = 0; i < ARRAY_SIZE(icssg_all_pa_stats); i++) {
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if (!strcmp(icssg_all_pa_stats[i].name, stat_name))
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return emac->pa_stats[icssg_all_pa_stats[i].offset / sizeof(u32)];
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return emac->pa_stats[i];
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}
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}
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@ -155,24 +155,10 @@ static const struct icssg_miig_stats icssg_all_miig_stats[] = {
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ICSSG_MIIG_STATS(tx_bytes, true),
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};
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/**
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* struct pa_stats_regs - ICSSG Firmware maintained PA Stats register
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* @fw_rx_cnt: Number of valid packets sent by Rx PRU to Host on PSI
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* @fw_tx_cnt: Number of valid packets copied by RTU0 to Tx queues
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* @fw_tx_pre_overflow: Host Egress Q (Pre-emptible) Overflow Counter
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* @fw_tx_exp_overflow: Host Egress Q (Express) Overflow Counter
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*/
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struct pa_stats_regs {
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u32 fw_rx_cnt;
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u32 fw_tx_cnt;
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u32 fw_tx_pre_overflow;
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u32 fw_tx_exp_overflow;
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};
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#define ICSSG_PA_STATS(field) \
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{ \
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#field, \
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offsetof(struct pa_stats_regs, field), \
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#define ICSSG_PA_STATS(field) \
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{ \
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#field, \
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field, \
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}
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struct icssg_pa_stats {
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@ -181,10 +167,38 @@ struct icssg_pa_stats {
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};
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static const struct icssg_pa_stats icssg_all_pa_stats[] = {
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ICSSG_PA_STATS(fw_rx_cnt),
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ICSSG_PA_STATS(fw_tx_cnt),
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ICSSG_PA_STATS(fw_tx_pre_overflow),
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ICSSG_PA_STATS(fw_tx_exp_overflow),
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ICSSG_PA_STATS(FW_RTU_PKT_DROP),
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ICSSG_PA_STATS(FW_Q0_OVERFLOW),
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ICSSG_PA_STATS(FW_Q1_OVERFLOW),
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ICSSG_PA_STATS(FW_Q2_OVERFLOW),
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ICSSG_PA_STATS(FW_Q3_OVERFLOW),
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ICSSG_PA_STATS(FW_Q4_OVERFLOW),
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ICSSG_PA_STATS(FW_Q5_OVERFLOW),
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ICSSG_PA_STATS(FW_Q6_OVERFLOW),
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ICSSG_PA_STATS(FW_Q7_OVERFLOW),
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ICSSG_PA_STATS(FW_DROPPED_PKT),
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ICSSG_PA_STATS(FW_RX_ERROR),
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ICSSG_PA_STATS(FW_RX_DS_INVALID),
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ICSSG_PA_STATS(FW_TX_DROPPED_PACKET),
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ICSSG_PA_STATS(FW_TX_TS_DROPPED_PACKET),
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ICSSG_PA_STATS(FW_INF_PORT_DISABLED),
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ICSSG_PA_STATS(FW_INF_SAV),
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ICSSG_PA_STATS(FW_INF_SA_DL),
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ICSSG_PA_STATS(FW_INF_PORT_BLOCKED),
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ICSSG_PA_STATS(FW_INF_DROP_TAGGED),
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ICSSG_PA_STATS(FW_INF_DROP_PRIOTAGGED),
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ICSSG_PA_STATS(FW_INF_DROP_NOTAG),
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ICSSG_PA_STATS(FW_INF_DROP_NOTMEMBER),
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ICSSG_PA_STATS(FW_RX_EOF_SHORT_FRMERR),
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ICSSG_PA_STATS(FW_RX_B0_DROP_EARLY_EOF),
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ICSSG_PA_STATS(FW_TX_JUMBO_FRM_CUTOFF),
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ICSSG_PA_STATS(FW_RX_EXP_FRAG_Q_DROP),
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ICSSG_PA_STATS(FW_RX_FIFO_OVERRUN),
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ICSSG_PA_STATS(FW_CUT_THR_PKT),
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ICSSG_PA_STATS(FW_HOST_RX_PKT_CNT),
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ICSSG_PA_STATS(FW_HOST_TX_PKT_CNT),
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ICSSG_PA_STATS(FW_HOST_EGRESS_Q_PRE_OVERFLOW),
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ICSSG_PA_STATS(FW_HOST_EGRESS_Q_EXP_OVERFLOW),
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};
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#endif /* __NET_TI_ICSSG_STATS_H */
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/* Start of 32 bits PA_STAT counters */
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#define PA_STAT_32b_START_OFFSET 0x0080
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#define FW_RTU_PKT_DROP 0x0088
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#define FW_Q0_OVERFLOW 0x0090
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#define FW_Q1_OVERFLOW 0x0098
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#define FW_Q2_OVERFLOW 0x00A0
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#define FW_Q3_OVERFLOW 0x00A8
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#define FW_Q4_OVERFLOW 0x00B0
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#define FW_Q5_OVERFLOW 0x00B8
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#define FW_Q6_OVERFLOW 0x00C0
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#define FW_Q7_OVERFLOW 0x00C8
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#define FW_DROPPED_PKT 0x00F8
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#define FW_RX_ERROR 0x0100
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#define FW_RX_DS_INVALID 0x0108
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#define FW_TX_DROPPED_PACKET 0x0110
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#define FW_TX_TS_DROPPED_PACKET 0x0118
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#define FW_INF_PORT_DISABLED 0x0120
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#define FW_INF_SAV 0x0128
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#define FW_INF_SA_DL 0x0130
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#define FW_INF_PORT_BLOCKED 0x0138
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#define FW_INF_DROP_TAGGED 0x0140
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#define FW_INF_DROP_PRIOTAGGED 0x0148
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#define FW_INF_DROP_NOTAG 0x0150
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#define FW_INF_DROP_NOTMEMBER 0x0158
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#define FW_RX_EOF_SHORT_FRMERR 0x0188
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#define FW_RX_B0_DROP_EARLY_EOF 0x0190
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#define FW_TX_JUMBO_FRM_CUTOFF 0x0198
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#define FW_RX_EXP_FRAG_Q_DROP 0x01A0
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#define FW_RX_FIFO_OVERRUN 0x01A8
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#define FW_CUT_THR_PKT 0x01B0
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#define FW_HOST_RX_PKT_CNT 0x0248
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#define FW_HOST_TX_PKT_CNT 0x0250
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#define FW_HOST_EGRESS_Q_PRE_OVERFLOW 0x0258
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#define FW_HOST_EGRESS_Q_EXP_OVERFLOW 0x0260
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#endif /* __NET_TI_ICSSG_SWITCH_MAP_H */
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