imx8m-blk-ctrl: set ISI panic write hurry level

[ Upstream commit c01fba0b48 ]

Apparently, ISI needs cache settings similar to LCDIF.
Otherwise we get artefacts in the image.
Tested on i.MX8MP.

Signed-off-by: Krzysztof Hałasa <khalasa@piap.pl>
Link: https://lore.kernel.org/r/m3ldr69lsw.fsf@t19.piap.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Krzysztof Hałasa 2025-05-09 11:26:55 +02:00 committed by Greg Kroah-Hartman
parent d66713e261
commit 1375d73914

View File

@ -665,6 +665,11 @@ static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data = {
#define LCDIF_1_RD_HURRY GENMASK(15, 13)
#define LCDIF_0_RD_HURRY GENMASK(12, 10)
#define ISI_CACHE_CTRL 0x50
#define ISI_V_WR_HURRY GENMASK(28, 26)
#define ISI_U_WR_HURRY GENMASK(25, 23)
#define ISI_Y_WR_HURRY GENMASK(22, 20)
static int imx8mp_media_power_notifier(struct notifier_block *nb,
unsigned long action, void *data)
{
@ -694,6 +699,11 @@ static int imx8mp_media_power_notifier(struct notifier_block *nb,
regmap_set_bits(bc->regmap, LCDIF_ARCACHE_CTRL,
FIELD_PREP(LCDIF_1_RD_HURRY, 7) |
FIELD_PREP(LCDIF_0_RD_HURRY, 7));
/* Same here for ISI */
regmap_set_bits(bc->regmap, ISI_CACHE_CTRL,
FIELD_PREP(ISI_V_WR_HURRY, 7) |
FIELD_PREP(ISI_U_WR_HURRY, 7) |
FIELD_PREP(ISI_Y_WR_HURRY, 7));
}
return NOTIFY_OK;