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Merge branch '20250903-msm8937-v9-1-a097c91c5801@mainlining.org' into clk-for-6.18

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Merge the MSM8937 global clock controller binding through a topic branch
to allow merging the constants into the DeviceTree branch as well.
This commit is contained in:
Bjorn Andersson 2025-09-04 08:38:00 -05:00
commit 154691e7c9
2 changed files with 27 additions and 3 deletions
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11
Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml
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@ -9,16 +9,21 @@ title: Qualcomm Global Clock & Reset Controller on MSM8953
maintainers:
- Adam Skladowski <a_skl39@protonmail.com>
- Sireesh Kodali <sireeshkodali@protonmail.com>
- Barnabas Czeman <barnabas.czeman@mainlining.org>
description: |
Qualcomm global clock control module provides the clocks, resets and power
domains on MSM8953.
domains on MSM8937 or MSM8953.
See also: include/dt-bindings/clock/qcom,gcc-msm8953.h
See also::
include/dt-bindings/clock/qcom,gcc-msm8917.h
include/dt-bindings/clock/qcom,gcc-msm8953.h
properties:
compatible:
const: qcom,gcc-msm8953
enum:
- qcom,gcc-msm8937
- qcom,gcc-msm8953
clocks:
items:

19
include/dt-bindings/clock/qcom,gcc-msm8917.h
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@ -170,6 +170,23 @@
#define VFE1_CLK_SRC 163
#define VSYNC_CLK_SRC 164
#define GPLL0_SLEEP_CLK_SRC 165
/* Addtional MSM8937-specific clocks */
#define MSM8937_BLSP1_QUP1_I2C_APPS_CLK_SRC 166
#define MSM8937_BLSP1_QUP1_SPI_APPS_CLK_SRC 167
#define MSM8937_BLSP2_QUP4_I2C_APPS_CLK_SRC 168
#define MSM8937_BLSP2_QUP4_SPI_APPS_CLK_SRC 169
#define MSM8937_BYTE1_CLK_SRC 170
#define MSM8937_ESC1_CLK_SRC 171
#define MSM8937_PCLK1_CLK_SRC 172
#define MSM8937_GCC_BLSP1_QUP1_I2C_APPS_CLK 173
#define MSM8937_GCC_BLSP1_QUP1_SPI_APPS_CLK 174
#define MSM8937_GCC_BLSP2_QUP4_I2C_APPS_CLK 175
#define MSM8937_GCC_BLSP2_QUP4_SPI_APPS_CLK 176
#define MSM8937_GCC_MDSS_BYTE1_CLK 177
#define MSM8937_GCC_MDSS_ESC1_CLK 178
#define MSM8937_GCC_MDSS_PCLK1_CLK 179
#define MSM8937_GCC_OXILI_AON_CLK 180
#define MSM8937_GCC_OXILI_TIMER_CLK 181
/* GCC block resets */
#define GCC_CAMSS_MICRO_BCR 0
@ -187,5 +204,7 @@
#define VENUS_GDSC 5
#define VFE0_GDSC 6
#define VFE1_GDSC 7
/* Additional MSM8937-specific GDSCs */
#define MSM8937_OXILI_CX_GDSC 8
#endif