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mips/crc32: expose CRC32 functions through lib
Move the mips CRC32 assembly code into the lib directory and wire it up to the library interface. This allows it to be used without going through the crypto API. It remains usable via the crypto API too via the shash algorithms that use the library interface. Thus all the arch-specific "shash" code becomes unnecessary and is removed. Note: to see the diff from arch/mips/crypto/crc32-mips.c to arch/mips/lib/crc32-mips.c, view this commit with 'git show -M10'. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20241202010844.144356-8-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@google.com>
This commit is contained in:
Eric Biggers
parent
72f51a4f4b
commit
289c270eab
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@ -1995,11 +1995,11 @@ config CPU_MIPSR5
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config CPU_MIPSR6
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bool
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default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
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select ARCH_HAS_CRC32
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select CPU_HAS_RIXI
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select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
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select HAVE_ARCH_BITREVERSE
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select MIPS_ASID_BITS_VARIABLE
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select MIPS_CRC_SUPPORT
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select MIPS_SPRAM
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config TARGET_ISA_REV
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@ -2475,9 +2475,6 @@ config MIPS_ASID_BITS
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config MIPS_ASID_BITS_VARIABLE
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bool
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config MIPS_CRC_SUPPORT
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bool
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# R4600 erratum. Due to the lack of errata information the exact
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# technical details aren't known. I've experimentally found that disabling
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# interrupts during indexed I-cache flushes seems to be sufficient to deal
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@ -99,7 +99,6 @@ CONFIG_NFS_V4=y
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CONFIG_NFS_V4_1=y
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CONFIG_NFS_V4_2=y
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CONFIG_ROOT_NFS=y
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CONFIG_CRYPTO_CRC32_MIPS=y
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CONFIG_FRAME_WARN=1024
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CONFIG_DEBUG_FS=y
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# CONFIG_RCU_TRACE is not set
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@ -102,7 +102,6 @@ CONFIG_NFS_V4=y
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CONFIG_NFS_V4_1=y
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CONFIG_NFS_V4_2=y
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CONFIG_ROOT_NFS=y
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CONFIG_CRYPTO_CRC32_MIPS=y
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CONFIG_FRAME_WARN=1024
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CONFIG_DEBUG_FS=y
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# CONFIG_RCU_TRACE is not set
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@ -1,4 +1,2 @@
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CONFIG_CPU_MIPS32_R6=y
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CONFIG_HIGHMEM=y
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CONFIG_CRYPTO_CRC32_MIPS=y
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@ -4,5 +4,4 @@ CONFIG_MIPS32_O32=y
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CONFIG_MIPS32_N32=y
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CONFIG_CPU_HAS_MSA=y
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CONFIG_CRYPTO_CRC32_MIPS=y
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CONFIG_VIRTUALIZATION=y
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@ -2,15 +2,6 @@
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menu "Accelerated Cryptographic Algorithms for CPU (mips)"
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config CRYPTO_CRC32_MIPS
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tristate "CRC32c and CRC32"
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depends on MIPS_CRC_SUPPORT
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select CRYPTO_HASH
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help
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CRC32c and CRC32 CRC algorithms
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Architecture: mips
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config CRYPTO_POLY1305_MIPS
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tristate "Hash functions: Poly1305"
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depends on MIPS
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@ -3,8 +3,6 @@
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# Makefile for MIPS crypto files..
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#
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obj-$(CONFIG_CRYPTO_CRC32_MIPS) += crc32-mips.o
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obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o
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chacha-mips-y := chacha-core.o chacha-glue.o
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AFLAGS_chacha-core.o += -O2 # needed to fill branch delay slots
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@ -1,354 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* crc32-mips.c - CRC32 and CRC32C using optional MIPSr6 instructions
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*
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* Module based on arm64/crypto/crc32-arm.c
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*
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* Copyright (C) 2014 Linaro Ltd <yazen.ghannam@linaro.org>
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* Copyright (C) 2018 MIPS Tech, LLC
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*/
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#include <linux/cpufeature.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <asm/mipsregs.h>
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#include <linux/unaligned.h>
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#include <crypto/internal/hash.h>
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enum crc_op_size {
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b, h, w, d,
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};
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enum crc_type {
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crc32,
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crc32c,
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};
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#ifndef TOOLCHAIN_SUPPORTS_CRC
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#define _ASM_SET_CRC(OP, SZ, TYPE) \
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_ASM_MACRO_3R(OP, rt, rs, rt2, \
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".ifnc \\rt, \\rt2\n\t" \
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".error \"invalid operands \\\"" #OP " \\rt,\\rs,\\rt2\\\"\"\n\t" \
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".endif\n\t" \
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_ASM_INSN_IF_MIPS(0x7c00000f | (__rt << 16) | (__rs << 21) | \
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((SZ) << 6) | ((TYPE) << 8)) \
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_ASM_INSN32_IF_MM(0x00000030 | (__rs << 16) | (__rt << 21) | \
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((SZ) << 14) | ((TYPE) << 3)))
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#define _ASM_UNSET_CRC(op, SZ, TYPE) ".purgem " #op "\n\t"
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#else /* !TOOLCHAIN_SUPPORTS_CRC */
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#define _ASM_SET_CRC(op, SZ, TYPE) ".set\tcrc\n\t"
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#define _ASM_UNSET_CRC(op, SZ, TYPE)
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#endif
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#define __CRC32(crc, value, op, SZ, TYPE) \
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do { \
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__asm__ __volatile__( \
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".set push\n\t" \
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_ASM_SET_CRC(op, SZ, TYPE) \
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#op " %0, %1, %0\n\t" \
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_ASM_UNSET_CRC(op, SZ, TYPE) \
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".set pop" \
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: "+r" (crc) \
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: "r" (value)); \
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} while (0)
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#define _CRC32_crc32b(crc, value) __CRC32(crc, value, crc32b, 0, 0)
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#define _CRC32_crc32h(crc, value) __CRC32(crc, value, crc32h, 1, 0)
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#define _CRC32_crc32w(crc, value) __CRC32(crc, value, crc32w, 2, 0)
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#define _CRC32_crc32d(crc, value) __CRC32(crc, value, crc32d, 3, 0)
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#define _CRC32_crc32cb(crc, value) __CRC32(crc, value, crc32cb, 0, 1)
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#define _CRC32_crc32ch(crc, value) __CRC32(crc, value, crc32ch, 1, 1)
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#define _CRC32_crc32cw(crc, value) __CRC32(crc, value, crc32cw, 2, 1)
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#define _CRC32_crc32cd(crc, value) __CRC32(crc, value, crc32cd, 3, 1)
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#define _CRC32(crc, value, size, op) \
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_CRC32_##op##size(crc, value)
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#define CRC32(crc, value, size) \
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_CRC32(crc, value, size, crc32)
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#define CRC32C(crc, value, size) \
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_CRC32(crc, value, size, crc32c)
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static u32 crc32_mips_le_hw(u32 crc_, const u8 *p, unsigned int len)
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{
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u32 crc = crc_;
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if (IS_ENABLED(CONFIG_64BIT)) {
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for (; len >= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {
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u64 value = get_unaligned_le64(p);
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CRC32(crc, value, d);
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}
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if (len & sizeof(u32)) {
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u32 value = get_unaligned_le32(p);
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CRC32(crc, value, w);
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p += sizeof(u32);
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}
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} else {
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for (; len >= sizeof(u32); len -= sizeof(u32)) {
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u32 value = get_unaligned_le32(p);
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CRC32(crc, value, w);
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p += sizeof(u32);
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}
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}
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if (len & sizeof(u16)) {
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u16 value = get_unaligned_le16(p);
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CRC32(crc, value, h);
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p += sizeof(u16);
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}
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if (len & sizeof(u8)) {
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u8 value = *p++;
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CRC32(crc, value, b);
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}
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return crc;
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}
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static u32 crc32c_mips_le_hw(u32 crc_, const u8 *p, unsigned int len)
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{
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u32 crc = crc_;
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if (IS_ENABLED(CONFIG_64BIT)) {
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for (; len >= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {
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u64 value = get_unaligned_le64(p);
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CRC32C(crc, value, d);
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}
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if (len & sizeof(u32)) {
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u32 value = get_unaligned_le32(p);
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CRC32C(crc, value, w);
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p += sizeof(u32);
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}
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} else {
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for (; len >= sizeof(u32); len -= sizeof(u32)) {
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u32 value = get_unaligned_le32(p);
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CRC32C(crc, value, w);
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p += sizeof(u32);
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}
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}
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if (len & sizeof(u16)) {
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u16 value = get_unaligned_le16(p);
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CRC32C(crc, value, h);
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p += sizeof(u16);
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}
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if (len & sizeof(u8)) {
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u8 value = *p++;
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CRC32C(crc, value, b);
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}
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return crc;
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}
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#define CHKSUM_BLOCK_SIZE 1
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#define CHKSUM_DIGEST_SIZE 4
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struct chksum_ctx {
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u32 key;
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};
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struct chksum_desc_ctx {
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u32 crc;
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};
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static int chksum_init(struct shash_desc *desc)
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{
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struct chksum_ctx *mctx = crypto_shash_ctx(desc->tfm);
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struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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ctx->crc = mctx->key;
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return 0;
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}
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/*
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* Setting the seed allows arbitrary accumulators and flexible XOR policy
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* If your algorithm starts with ~0, then XOR with ~0 before you set
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* the seed.
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*/
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static int chksum_setkey(struct crypto_shash *tfm, const u8 *key,
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unsigned int keylen)
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{
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struct chksum_ctx *mctx = crypto_shash_ctx(tfm);
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if (keylen != sizeof(mctx->key))
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return -EINVAL;
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mctx->key = get_unaligned_le32(key);
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return 0;
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}
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static int chksum_update(struct shash_desc *desc, const u8 *data,
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unsigned int length)
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{
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struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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ctx->crc = crc32_mips_le_hw(ctx->crc, data, length);
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return 0;
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}
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static int chksumc_update(struct shash_desc *desc, const u8 *data,
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unsigned int length)
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{
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struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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ctx->crc = crc32c_mips_le_hw(ctx->crc, data, length);
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return 0;
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}
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static int chksum_final(struct shash_desc *desc, u8 *out)
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{
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struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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put_unaligned_le32(ctx->crc, out);
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return 0;
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}
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static int chksumc_final(struct shash_desc *desc, u8 *out)
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{
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struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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put_unaligned_le32(~ctx->crc, out);
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return 0;
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}
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static int __chksum_finup(u32 crc, const u8 *data, unsigned int len, u8 *out)
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{
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put_unaligned_le32(crc32_mips_le_hw(crc, data, len), out);
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return 0;
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}
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static int __chksumc_finup(u32 crc, const u8 *data, unsigned int len, u8 *out)
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{
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put_unaligned_le32(~crc32c_mips_le_hw(crc, data, len), out);
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return 0;
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}
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static int chksum_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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return __chksum_finup(ctx->crc, data, len, out);
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}
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static int chksumc_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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return __chksumc_finup(ctx->crc, data, len, out);
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}
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static int chksum_digest(struct shash_desc *desc, const u8 *data,
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unsigned int length, u8 *out)
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{
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struct chksum_ctx *mctx = crypto_shash_ctx(desc->tfm);
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return __chksum_finup(mctx->key, data, length, out);
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}
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static int chksumc_digest(struct shash_desc *desc, const u8 *data,
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unsigned int length, u8 *out)
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{
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struct chksum_ctx *mctx = crypto_shash_ctx(desc->tfm);
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return __chksumc_finup(mctx->key, data, length, out);
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}
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static int chksum_cra_init(struct crypto_tfm *tfm)
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{
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struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);
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mctx->key = ~0;
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return 0;
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}
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static struct shash_alg crc32_alg = {
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.digestsize = CHKSUM_DIGEST_SIZE,
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.setkey = chksum_setkey,
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.init = chksum_init,
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.update = chksum_update,
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.final = chksum_final,
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.finup = chksum_finup,
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.digest = chksum_digest,
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.descsize = sizeof(struct chksum_desc_ctx),
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.base = {
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.cra_name = "crc32",
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.cra_driver_name = "crc32-mips-hw",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_OPTIONAL_KEY,
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.cra_blocksize = CHKSUM_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct chksum_ctx),
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.cra_module = THIS_MODULE,
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.cra_init = chksum_cra_init,
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}
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};
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static struct shash_alg crc32c_alg = {
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.digestsize = CHKSUM_DIGEST_SIZE,
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.setkey = chksum_setkey,
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.init = chksum_init,
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.update = chksumc_update,
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.final = chksumc_final,
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.finup = chksumc_finup,
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.digest = chksumc_digest,
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.descsize = sizeof(struct chksum_desc_ctx),
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.base = {
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.cra_name = "crc32c",
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.cra_driver_name = "crc32c-mips-hw",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_OPTIONAL_KEY,
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.cra_blocksize = CHKSUM_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct chksum_ctx),
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.cra_module = THIS_MODULE,
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.cra_init = chksum_cra_init,
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}
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};
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static int __init crc32_mod_init(void)
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{
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int err;
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err = crypto_register_shash(&crc32_alg);
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if (err)
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return err;
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err = crypto_register_shash(&crc32c_alg);
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if (err) {
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crypto_unregister_shash(&crc32_alg);
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return err;
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}
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return 0;
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}
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static void __exit crc32_mod_exit(void)
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{
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crypto_unregister_shash(&crc32_alg);
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crypto_unregister_shash(&crc32c_alg);
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}
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MODULE_AUTHOR("Marcin Nowakowski <marcin.nowakowski@mips.com");
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MODULE_DESCRIPTION("CRC32 and CRC32C using optional MIPS instructions");
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MODULE_LICENSE("GPL v2");
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module_cpu_feature_match(MIPS_CRC32, crc32_mod_init);
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module_exit(crc32_mod_exit);
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@ -14,5 +14,7 @@ lib-$(CONFIG_GENERIC_CSUM) := $(filter-out csum_partial.o, $(lib-y))
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obj-$(CONFIG_CPU_GENERIC_DUMP_TLB) += dump_tlb.o
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obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o
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obj-$(CONFIG_CRC32_ARCH) += crc32-mips.o
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# libgcc-style stuff needed in the kernel
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obj-y += bswapsi.o bswapdi.o multi3.o
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||||
|
|
|
|||
192
arch/mips/lib/crc32-mips.c
Normal file
192
arch/mips/lib/crc32-mips.c
Normal file
|
|
@ -0,0 +1,192 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* crc32-mips.c - CRC32 and CRC32C using optional MIPSr6 instructions
|
||||
*
|
||||
* Module based on arm64/crypto/crc32-arm.c
|
||||
*
|
||||
* Copyright (C) 2014 Linaro Ltd <yazen.ghannam@linaro.org>
|
||||
* Copyright (C) 2018 MIPS Tech, LLC
|
||||
*/
|
||||
|
||||
#include <linux/cpufeature.h>
|
||||
#include <linux/crc32.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <asm/mipsregs.h>
|
||||
#include <linux/unaligned.h>
|
||||
|
||||
enum crc_op_size {
|
||||
b, h, w, d,
|
||||
};
|
||||
|
||||
enum crc_type {
|
||||
crc32,
|
||||
crc32c,
|
||||
};
|
||||
|
||||
#ifndef TOOLCHAIN_SUPPORTS_CRC
|
||||
#define _ASM_SET_CRC(OP, SZ, TYPE) \
|
||||
_ASM_MACRO_3R(OP, rt, rs, rt2, \
|
||||
".ifnc \\rt, \\rt2\n\t" \
|
||||
".error \"invalid operands \\\"" #OP " \\rt,\\rs,\\rt2\\\"\"\n\t" \
|
||||
".endif\n\t" \
|
||||
_ASM_INSN_IF_MIPS(0x7c00000f | (__rt << 16) | (__rs << 21) | \
|
||||
((SZ) << 6) | ((TYPE) << 8)) \
|
||||
_ASM_INSN32_IF_MM(0x00000030 | (__rs << 16) | (__rt << 21) | \
|
||||
((SZ) << 14) | ((TYPE) << 3)))
|
||||
#define _ASM_UNSET_CRC(op, SZ, TYPE) ".purgem " #op "\n\t"
|
||||
#else /* !TOOLCHAIN_SUPPORTS_CRC */
|
||||
#define _ASM_SET_CRC(op, SZ, TYPE) ".set\tcrc\n\t"
|
||||
#define _ASM_UNSET_CRC(op, SZ, TYPE)
|
||||
#endif
|
||||
|
||||
#define __CRC32(crc, value, op, SZ, TYPE) \
|
||||
do { \
|
||||
__asm__ __volatile__( \
|
||||
".set push\n\t" \
|
||||
_ASM_SET_CRC(op, SZ, TYPE) \
|
||||
#op " %0, %1, %0\n\t" \
|
||||
_ASM_UNSET_CRC(op, SZ, TYPE) \
|
||||
".set pop" \
|
||||
: "+r" (crc) \
|
||||
: "r" (value)); \
|
||||
} while (0)
|
||||
|
||||
#define _CRC32_crc32b(crc, value) __CRC32(crc, value, crc32b, 0, 0)
|
||||
#define _CRC32_crc32h(crc, value) __CRC32(crc, value, crc32h, 1, 0)
|
||||
#define _CRC32_crc32w(crc, value) __CRC32(crc, value, crc32w, 2, 0)
|
||||
#define _CRC32_crc32d(crc, value) __CRC32(crc, value, crc32d, 3, 0)
|
||||
#define _CRC32_crc32cb(crc, value) __CRC32(crc, value, crc32cb, 0, 1)
|
||||
#define _CRC32_crc32ch(crc, value) __CRC32(crc, value, crc32ch, 1, 1)
|
||||
#define _CRC32_crc32cw(crc, value) __CRC32(crc, value, crc32cw, 2, 1)
|
||||
#define _CRC32_crc32cd(crc, value) __CRC32(crc, value, crc32cd, 3, 1)
|
||||
|
||||
#define _CRC32(crc, value, size, op) \
|
||||
_CRC32_##op##size(crc, value)
|
||||
|
||||
#define CRC32(crc, value, size) \
|
||||
_CRC32(crc, value, size, crc32)
|
||||
|
||||
#define CRC32C(crc, value, size) \
|
||||
_CRC32(crc, value, size, crc32c)
|
||||
|
||||
static DEFINE_STATIC_KEY_FALSE(have_crc32);
|
||||
|
||||
u32 crc32_le_arch(u32 crc, const u8 *p, size_t len)
|
||||
{
|
||||
if (!static_branch_likely(&have_crc32))
|
||||
return crc32_le_base(crc, p, len);
|
||||
|
||||
if (IS_ENABLED(CONFIG_64BIT)) {
|
||||
for (; len >= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {
|
||||
u64 value = get_unaligned_le64(p);
|
||||
|
||||
CRC32(crc, value, d);
|
||||
}
|
||||
|
||||
if (len & sizeof(u32)) {
|
||||
u32 value = get_unaligned_le32(p);
|
||||
|
||||
CRC32(crc, value, w);
|
||||
p += sizeof(u32);
|
||||
}
|
||||
} else {
|
||||
for (; len >= sizeof(u32); len -= sizeof(u32)) {
|
||||
u32 value = get_unaligned_le32(p);
|
||||
|
||||
CRC32(crc, value, w);
|
||||
p += sizeof(u32);
|
||||
}
|
||||
}
|
||||
|
||||
if (len & sizeof(u16)) {
|
||||
u16 value = get_unaligned_le16(p);
|
||||
|
||||
CRC32(crc, value, h);
|
||||
p += sizeof(u16);
|
||||
}
|
||||
|
||||
if (len & sizeof(u8)) {
|
||||
u8 value = *p++;
|
||||
|
||||
CRC32(crc, value, b);
|
||||
}
|
||||
|
||||
return crc;
|
||||
}
|
||||
EXPORT_SYMBOL(crc32_le_arch);
|
||||
|
||||
u32 crc32c_le_arch(u32 crc, const u8 *p, size_t len)
|
||||
{
|
||||
if (!static_branch_likely(&have_crc32))
|
||||
return crc32c_le_base(crc, p, len);
|
||||
|
||||
if (IS_ENABLED(CONFIG_64BIT)) {
|
||||
for (; len >= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {
|
||||
u64 value = get_unaligned_le64(p);
|
||||
|
||||
CRC32C(crc, value, d);
|
||||
}
|
||||
|
||||
if (len & sizeof(u32)) {
|
||||
u32 value = get_unaligned_le32(p);
|
||||
|
||||
CRC32C(crc, value, w);
|
||||
p += sizeof(u32);
|
||||
}
|
||||
} else {
|
||||
for (; len >= sizeof(u32); len -= sizeof(u32)) {
|
||||
u32 value = get_unaligned_le32(p);
|
||||
|
||||
CRC32C(crc, value, w);
|
||||
p += sizeof(u32);
|
||||
}
|
||||
}
|
||||
|
||||
if (len & sizeof(u16)) {
|
||||
u16 value = get_unaligned_le16(p);
|
||||
|
||||
CRC32C(crc, value, h);
|
||||
p += sizeof(u16);
|
||||
}
|
||||
|
||||
if (len & sizeof(u8)) {
|
||||
u8 value = *p++;
|
||||
|
||||
CRC32C(crc, value, b);
|
||||
}
|
||||
return crc;
|
||||
}
|
||||
EXPORT_SYMBOL(crc32c_le_arch);
|
||||
|
||||
u32 crc32_be_arch(u32 crc, const u8 *p, size_t len)
|
||||
{
|
||||
return crc32_be_base(crc, p, len);
|
||||
}
|
||||
EXPORT_SYMBOL(crc32_be_arch);
|
||||
|
||||
static int __init crc32_mips_init(void)
|
||||
{
|
||||
if (cpu_have_feature(cpu_feature(MIPS_CRC32)))
|
||||
static_branch_enable(&have_crc32);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(crc32_mips_init);
|
||||
|
||||
static void __exit crc32_mips_exit(void)
|
||||
{
|
||||
}
|
||||
module_exit(crc32_mips_exit);
|
||||
|
||||
u32 crc32_optimizations(void)
|
||||
{
|
||||
if (static_key_enabled(&have_crc32))
|
||||
return CRC32_LE_OPTIMIZATION | CRC32C_OPTIMIZATION;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(crc32_optimizations);
|
||||
|
||||
MODULE_AUTHOR("Marcin Nowakowski <marcin.nowakowski@mips.com");
|
||||
MODULE_DESCRIPTION("CRC32 and CRC32C using optional MIPS instructions");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user