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Fixes for a few clk drivers and bindings:

Browse Source 
- Add a missing property to the Mediatek MT8188 clk binding to
    keep binding checks happy
 
  - Avoid an OOB by setting the correct number of parents in
    dispmix_csr_clk_dev_data
 
  - Allocate clk_hw structs early in probe to avoid an ordering
    issue where clk_parent_data points to an unallocated clk_hw
    when the child clk is registered before the parent clk in the
    SCMI clk driver
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Fixes for a few clk drivers and bindings:

 - Add a missing property to the Mediatek MT8188 clk binding to
   keep binding checks happy

 - Avoid an OOB by setting the correct number of parents in
   dispmix_csr_clk_dev_data

 - Allocate clk_hw structs early in probe to avoid an ordering
   issue where clk_parent_data points to an unallocated clk_hw
   when the child clk is registered before the parent clk in the
   SCMI clk driver

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  dt-bindings: clock: mediatek: Add #reset-cells property for MT8188
  clk: imx: Fix an out-of-bounds access in dispmix_csr_clk_dev_data
  clk: scmi: Handle case where child clocks are initialized before their parents
This commit is contained in:
Linus Torvalds 2025-07-13 11:37:35 -07:00
commit 3cd752194e
3 changed files with 22 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml
View File

@ -52,6 +52,9 @@ properties:
'#clock-cells':
const: 1
'#reset-cells':
const: 1
required:
- compatible
- reg

20
drivers/clk/clk-scmi.c
View File

@ -404,6 +404,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
const struct scmi_handle *handle = sdev->handle;
struct scmi_protocol_handle *ph;
const struct clk_ops *scmi_clk_ops_db[SCMI_MAX_CLK_OPS] = {};
struct scmi_clk *sclks;
if (!handle)
return -ENODEV;
@ -430,18 +431,21 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
transport_is_atomic = handle->is_transport_atomic(handle,
&atomic_threshold_us);
for (idx = 0; idx < count; idx++) {
struct scmi_clk *sclk;
const struct clk_ops *scmi_ops;
sclks = devm_kcalloc(dev, count, sizeof(*sclks), GFP_KERNEL);
if (!sclks)
return -ENOMEM;
sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
if (!sclk)
return -ENOMEM;
for (idx = 0; idx < count; idx++)
hws[idx] = &sclks[idx].hw;
for (idx = 0; idx < count; idx++) {
struct scmi_clk *sclk = &sclks[idx];
const struct clk_ops *scmi_ops;
sclk->info = scmi_proto_clk_ops->info_get(ph, idx);
if (!sclk->info) {
dev_dbg(dev, "invalid clock info for idx %d\n", idx);
devm_kfree(dev, sclk);
hws[idx] = NULL;
continue;
}
@ -479,13 +483,11 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
if (err) {
dev_err(dev, "failed to register clock %d\n", idx);
devm_kfree(dev, sclk->parent_data);
devm_kfree(dev, sclk);
hws[idx] = NULL;
} else {
dev_dbg(dev, "Registered clock:%s%s\n",
sclk->info->name,
scmi_ops->enable ? " (atomic ops)" : "");
hws[idx] = &sclk->hw;
}
}

12
drivers/clk/imx/clk-imx95-blk-ctl.c
View File

@ -219,11 +219,15 @@ static const struct imx95_blk_ctl_dev_data lvds_csr_dev_data = {
.clk_reg_offset = 0,
};
static const char * const disp_engine_parents[] = {
"videopll1", "dsi_pll", "ldb_pll_div7"
};
static const struct imx95_blk_ctl_clk_dev_data dispmix_csr_clk_dev_data[] = {
[IMX95_CLK_DISPMIX_ENG0_SEL] = {
.name = "disp_engine0_sel",
.parent_names = (const char *[]){"videopll1", "dsi_pll", "ldb_pll_div7", },
.num_parents = 4,
.parent_names = disp_engine_parents,
.num_parents = ARRAY_SIZE(disp_engine_parents),
.reg = 0,
.bit_idx = 0,
.bit_width = 2,
@ -232,8 +236,8 @@ static const struct imx95_blk_ctl_clk_dev_data dispmix_csr_clk_dev_data[] = {
},
[IMX95_CLK_DISPMIX_ENG1_SEL] = {
.name = "disp_engine1_sel",
.parent_names = (const char *[]){"videopll1", "dsi_pll", "ldb_pll_div7", },
.num_parents = 4,
.parent_names = disp_engine_parents,
.num_parents = ARRAY_SIZE(disp_engine_parents),
.reg = 0,
.bit_idx = 2,
.bit_width = 2,