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dmaengine: fsl-edma: request per-channel IRQ only when channel is allocated
The edma feature individual IRQs for each DMA channel at some devices. Given the presence of numerous eDMA instances, each with multiple channels, IRQ request during probe results in an extensive list at /proc/interrupts. However, a significant portion of these channels remains unused by the system. Request irq only when a DMA client driver requests a DMA channel. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240603152317.69917-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -805,6 +805,7 @@ void fsl_edma_issue_pending(struct dma_chan *chan)
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int fsl_edma_alloc_chan_resources(struct dma_chan *chan)
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{
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struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);
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int ret;
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if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_CHCLK)
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clk_prepare_enable(fsl_chan->clk);
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@ -813,6 +814,17 @@ int fsl_edma_alloc_chan_resources(struct dma_chan *chan)
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fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_TCD64 ?
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sizeof(struct fsl_edma_hw_tcd64) : sizeof(struct fsl_edma_hw_tcd),
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32, 0);
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if (fsl_chan->txirq) {
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ret = request_irq(fsl_chan->txirq, fsl_chan->irq_handler, IRQF_SHARED,
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fsl_chan->chan_name, fsl_chan);
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if (ret) {
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dma_pool_destroy(fsl_chan->tcd_pool);
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return ret;
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}
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}
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return 0;
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}
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@ -832,6 +844,9 @@ void fsl_edma_free_chan_resources(struct dma_chan *chan)
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fsl_edma_unprep_slave_dma(fsl_chan);
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spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
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if (fsl_chan->txirq)
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free_irq(fsl_chan->txirq, fsl_chan);
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vchan_dma_desc_free_list(&fsl_chan->vchan, &head);
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dma_pool_destroy(fsl_chan->tcd_pool);
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fsl_chan->tcd_pool = NULL;
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@ -172,6 +172,7 @@ struct fsl_edma_chan {
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int priority;
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int hw_chanid;
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int txirq;
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irqreturn_t (*irq_handler)(int irq, void *dev_id);
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bool is_rxchan;
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bool is_remote;
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bool is_multi_fifo;
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@ -65,6 +65,13 @@ static irqreturn_t fsl_edma3_tx_handler(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static irqreturn_t fsl_edma2_tx_handler(int irq, void *devi_id)
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{
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struct fsl_edma_chan *fsl_chan = devi_id;
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return fsl_edma_tx_handler(irq, fsl_chan->edma);
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}
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static irqreturn_t fsl_edma_err_handler(int irq, void *dev_id)
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{
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struct fsl_edma_engine *fsl_edma = dev_id;
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@ -228,7 +235,6 @@ fsl_edma_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma
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static int fsl_edma3_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma)
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{
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int ret;
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int i;
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for (i = 0; i < fsl_edma->n_chans; i++) {
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@ -243,13 +249,7 @@ static int fsl_edma3_irq_init(struct platform_device *pdev, struct fsl_edma_engi
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if (fsl_chan->txirq < 0)
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return -EINVAL;
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ret = devm_request_irq(&pdev->dev, fsl_chan->txirq,
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fsl_edma3_tx_handler, IRQF_SHARED,
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fsl_chan->chan_name, fsl_chan);
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if (ret) {
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dev_err(&pdev->dev, "Can't register chan%d's IRQ.\n", i);
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return -EINVAL;
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}
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fsl_chan->irq_handler = fsl_edma3_tx_handler;
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}
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return 0;
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@ -278,19 +278,20 @@ fsl_edma2_irq_init(struct platform_device *pdev,
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*/
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for (i = 0; i < count; i++) {
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irq = platform_get_irq(pdev, i);
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ret = 0;
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if (irq < 0)
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return -ENXIO;
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/* The last IRQ is for eDMA err */
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if (i == count - 1)
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if (i == count - 1) {
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ret = devm_request_irq(&pdev->dev, irq,
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fsl_edma_err_handler,
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0, "eDMA2-ERR", fsl_edma);
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else
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ret = devm_request_irq(&pdev->dev, irq,
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fsl_edma_tx_handler, 0,
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fsl_edma->chans[i].chan_name,
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fsl_edma);
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} else {
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fsl_edma->chans[i].txirq = irq;
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fsl_edma->chans[i].irq_handler = fsl_edma2_tx_handler;
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}
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if (ret)
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return ret;
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}
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