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media: uapi: Add MEDIA_BUS_FMT_RGB101010_1X7X5_{SPWG, JEIDA}
Add two media bus formats that identify 30-bit RGB pixels transmitted by a LVDS link with five differential data pairs, serialized into 7 time slots, using standard SPWG/VESA or JEIDA data mapping. Signed-off-by: Liu Ying <victor.liu@nxp.com> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-5-victor.liu@nxp.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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@ -2225,7 +2225,7 @@ The following table list existing packed 48bit wide RGB formats.
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\endgroup
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On LVDS buses, usually each sample is transferred serialized in seven
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time slots per pixel clock, on three (18-bit) or four (24-bit)
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time slots per pixel clock, on three (18-bit) or four (24-bit) or five (30-bit)
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differential data pairs at the same time. The remaining bits are used
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for control signals as defined by SPWG/PSWG/VESA or JEIDA standards. The
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24-bit RGB format serialized in seven time slots on four lanes using
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@ -2246,11 +2246,12 @@ JEIDA defined bit mapping will be named
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- Code
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-
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-
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- :cspan:`3` Data organization
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- :cspan:`4` Data organization
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* -
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-
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- Timeslot
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- Lane
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- 4
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- 3
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- 2
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- 1
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@ -2262,6 +2263,7 @@ JEIDA defined bit mapping will be named
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- 0
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-
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-
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-
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- d
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- b\ :sub:`1`
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- g\ :sub:`0`
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@ -2270,6 +2272,7 @@ JEIDA defined bit mapping will be named
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- 1
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-
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-
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-
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- d
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- b\ :sub:`0`
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- r\ :sub:`5`
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@ -2278,6 +2281,7 @@ JEIDA defined bit mapping will be named
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- 2
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-
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-
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-
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- d
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- g\ :sub:`5`
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- r\ :sub:`4`
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@ -2286,6 +2290,7 @@ JEIDA defined bit mapping will be named
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- 3
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-
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-
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-
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- b\ :sub:`5`
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- g\ :sub:`4`
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- r\ :sub:`3`
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@ -2294,6 +2299,7 @@ JEIDA defined bit mapping will be named
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- 4
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-
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-
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-
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- b\ :sub:`4`
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- g\ :sub:`3`
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- r\ :sub:`2`
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@ -2302,6 +2308,7 @@ JEIDA defined bit mapping will be named
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- 5
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-
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-
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-
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- b\ :sub:`3`
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- g\ :sub:`2`
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- r\ :sub:`1`
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@ -2310,6 +2317,7 @@ JEIDA defined bit mapping will be named
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- 6
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-
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-
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-
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- b\ :sub:`2`
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- g\ :sub:`1`
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- r\ :sub:`0`
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@ -2319,6 +2327,7 @@ JEIDA defined bit mapping will be named
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- 0x1011
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- 0
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-
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-
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- d
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- d
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- b\ :sub:`1`
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@ -2327,6 +2336,7 @@ JEIDA defined bit mapping will be named
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-
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- 1
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-
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-
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- b\ :sub:`7`
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- d
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- b\ :sub:`0`
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@ -2335,6 +2345,7 @@ JEIDA defined bit mapping will be named
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-
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- 2
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-
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-
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- b\ :sub:`6`
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- d
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- g\ :sub:`5`
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@ -2343,6 +2354,7 @@ JEIDA defined bit mapping will be named
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-
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- 3
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-
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-
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- g\ :sub:`7`
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- b\ :sub:`5`
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- g\ :sub:`4`
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@ -2351,6 +2363,7 @@ JEIDA defined bit mapping will be named
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-
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- 4
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-
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-
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- g\ :sub:`6`
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- b\ :sub:`4`
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- g\ :sub:`3`
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@ -2359,6 +2372,7 @@ JEIDA defined bit mapping will be named
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-
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- 5
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-
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-
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- r\ :sub:`7`
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- b\ :sub:`3`
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- g\ :sub:`2`
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@ -2367,6 +2381,7 @@ JEIDA defined bit mapping will be named
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-
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- 6
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-
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-
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- r\ :sub:`6`
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- b\ :sub:`2`
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- g\ :sub:`1`
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@ -2377,6 +2392,7 @@ JEIDA defined bit mapping will be named
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- 0x1012
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- 0
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-
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-
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- d
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- d
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- b\ :sub:`3`
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@ -2385,6 +2401,7 @@ JEIDA defined bit mapping will be named
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-
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- 1
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-
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-
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- b\ :sub:`1`
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- d
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- b\ :sub:`2`
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@ -2393,6 +2410,7 @@ JEIDA defined bit mapping will be named
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-
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- 2
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-
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-
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- b\ :sub:`0`
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- d
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- g\ :sub:`7`
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@ -2401,6 +2419,7 @@ JEIDA defined bit mapping will be named
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-
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- 3
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-
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-
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- g\ :sub:`1`
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- b\ :sub:`7`
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- g\ :sub:`6`
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@ -2409,6 +2428,7 @@ JEIDA defined bit mapping will be named
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-
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- 4
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-
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-
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- g\ :sub:`0`
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- b\ :sub:`6`
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- g\ :sub:`5`
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@ -2417,6 +2437,7 @@ JEIDA defined bit mapping will be named
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-
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- 5
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-
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-
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- r\ :sub:`1`
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- b\ :sub:`5`
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- g\ :sub:`4`
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@ -2425,10 +2446,141 @@ JEIDA defined bit mapping will be named
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-
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- 6
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-
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-
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- r\ :sub:`0`
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- b\ :sub:`4`
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- g\ :sub:`3`
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- r\ :sub:`2`
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* .. _MEDIA-BUS-FMT-RGB101010-1X7X5-SPWG:
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- MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG
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- 0x1026
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- 0
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-
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- d
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- d
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- d
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- b\ :sub:`1`
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- g\ :sub:`0`
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* -
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-
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- 1
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-
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- b\ :sub:`9`
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- b\ :sub:`7`
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- d
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- b\ :sub:`0`
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- r\ :sub:`5`
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* -
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-
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- 2
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-
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- b\ :sub:`8`
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- b\ :sub:`6`
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- d
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- g\ :sub:`5`
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- r\ :sub:`4`
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* -
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-
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- 3
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-
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- g\ :sub:`9`
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- g\ :sub:`7`
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- b\ :sub:`5`
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- g\ :sub:`4`
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- r\ :sub:`3`
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* -
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-
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- 4
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-
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- g\ :sub:`8`
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- g\ :sub:`6`
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- b\ :sub:`4`
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- g\ :sub:`3`
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- r\ :sub:`2`
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* -
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-
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- 5
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-
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- r\ :sub:`9`
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- r\ :sub:`7`
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- b\ :sub:`3`
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- g\ :sub:`2`
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- r\ :sub:`1`
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* -
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-
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- 6
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-
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- r\ :sub:`8`
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- r\ :sub:`6`
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- b\ :sub:`2`
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- g\ :sub:`1`
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- r\ :sub:`0`
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* .. _MEDIA-BUS-FMT-RGB101010-1X7X5-JEIDA:
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- MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA
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- 0x1027
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- 0
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-
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- d
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- d
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- d
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- b\ :sub:`5`
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- g\ :sub:`4`
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* -
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-
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- 1
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-
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- b\ :sub:`1`
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- b\ :sub:`3`
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- d
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- b\ :sub:`4`
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- r\ :sub:`9`
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* -
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-
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- 2
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-
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- b\ :sub:`0`
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- b\ :sub:`2`
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- d
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- g\ :sub:`9`
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- r\ :sub:`8`
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* -
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-
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- 3
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-
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- g\ :sub:`1`
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- g\ :sub:`3`
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- b\ :sub:`9`
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- g\ :sub:`8`
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- r\ :sub:`7`
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* -
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-
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- 4
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-
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- g\ :sub:`0`
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- g\ :sub:`2`
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- b\ :sub:`8`
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- g\ :sub:`7`
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- r\ :sub:`6`
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* -
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-
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- 5
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-
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- r\ :sub:`1`
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- r\ :sub:`3`
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- b\ :sub:`7`
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- g\ :sub:`6`
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- r\ :sub:`5`
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* -
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-
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- 6
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-
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- r\ :sub:`0`
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- r\ :sub:`2`
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- b\ :sub:`6`
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- g\ :sub:`5`
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- r\ :sub:`4`
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.. raw:: latex
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@ -34,7 +34,7 @@
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#define MEDIA_BUS_FMT_FIXED 0x0001
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/* RGB - next is 0x1026 */
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/* RGB - next is 0x1028 */
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#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
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@ -68,6 +68,8 @@
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#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d
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#define MEDIA_BUS_FMT_RGB888_1X32_PADHI 0x100f
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#define MEDIA_BUS_FMT_RGB101010_1X30 0x1018
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#define MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG 0x1026
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#define MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA 0x1027
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#define MEDIA_BUS_FMT_RGB666_1X36_CPADLO 0x1020
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#define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x1021
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#define MEDIA_BUS_FMT_RGB121212_1X36 0x1019
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