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git://git.yoctoproject.org/linux-yocto.git
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Cleanups and fixes
-----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmeXoDUaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHAorw/8CaBkXlyYNQzlSD6WK9Si yfZAhKp3BdZWUfImlRJFQkAWaORz3LWtMg6T5odQpara3D5tvUTZ6leXDsVjwctA pZXv1xiAg9SymQQiWLdHawGG6xWCG+Z0eI8vQrXjPp+6fI6c7pq6AfDjW+TQ9dnl 0cZEPUItgj0TBv8dSs2hKyHRotU7Fn2sagWVhMy5KeLnp8qK1rq/aZaFehNXIuCo bslcsoT1Sex6YwCawST94f+kWAzDOigp/M32+7gQJXDQljbjTCXBtWkpoP0QRl55 bcdiTB1sSvLBlCurFI/0ktvxm5lfyjmMmvvWPYgNW50v3QROr9xWyjkRWhXtSBZk M8MozS9+TH51QtPOf+uIkWY5KkIAJILw85eVtC5gP8L980qvUkBhREm36m1Vy3NT xUTRKuaeBm7FNu2lD3wj16F5K4YdtE+Zwr+luRnxTWpdeauMoDkyzW8QIitO8CEw 2gedxeivvs+kAufkodmv+heC6Nk/fkoYGm5AfHeCIdpwFXLV/gtCP9PvhiUiE+Le tKShGvFOB8hj0UlS7z6XPlInXvwuqZmKhRc214ymKTWmNLYDKutRo++GlNZALzCV ts47pcw76ktkC8ptYkzxOXBWwpR1NOdGvAgV9Px6N/211Ww6wRn2BPb6oToSebE0 ZERE04cQGnm16i06qwD38Hc= =IdU/ -----END PGP SIGNATURE----- Merge tag 'mips_6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: "Cleanups and fixes" * tag 'mips_6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: pci-legacy: Override pci_address_to_pio MIPS: Loongson64: env: Use str_on_off() helper in prom_lefi_init_env() MIPS: migrate to generic rule for built-in DTBs mips: fix shmctl/semctl/msgctl syscall for o32 mips/math-emu: fix emulation of the prefx instruction MIPS: Loongson: Add comments for interface_info MIPS: Loongson64: remove ROM Size unit in boardinfo MIPS: traps: Use str_enabled_disabled() in parity_protection_init() MIPS: ftrace: Declare ftrace_get_parent_ra_addr() as static Revert "MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT" MIPS: Fix the wrong format specifier MIPS: Add a blank line after __HEAD MIPS: kernel: Rename read/write_c0_ecc to read/writec0_errctl
This commit is contained in:
commit
805ba04cb7
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@ -29,10 +29,12 @@ config MIPS
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select ARCH_WANT_IPC_PARSE_VERSION
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select ARCH_WANT_LD_ORPHAN_WARN
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select BUILDTIME_TABLE_SORT
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select BUILTIN_DTB_ALL if BUILTIN_DTB
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select CLONE_BACKWARDS
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select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
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select CPU_PM if CPU_IDLE || SUSPEND
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select GENERIC_ATOMIC64 if !64BIT
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select GENERIC_BUILTIN_DTB if BUILTIN_DTB
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select GENERIC_CMOS_UPDATE
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select GENERIC_CPU_AUTOPROBE
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select GENERIC_GETTIMEOFDAY
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@ -1084,7 +1086,6 @@ config CSRC_IOASIC
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config CSRC_R4K
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select CLOCKSOURCE_WATCHDOG if CPU_FREQ
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select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT
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bool
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config CSRC_SB1250
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@ -423,9 +423,6 @@ endif
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CLEAN_FILES += vmlinux.32 vmlinux.64
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# device-trees
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core-y += arch/mips/boot/dts/
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archprepare:
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ifdef CONFIG_MIPS32_N32
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@$(kecho) ' Checking missing-syscalls for N32'
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@ -16,5 +16,3 @@ subdir-$(CONFIG_ATH79) += qca
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subdir-$(CONFIG_RALINK) += ralink
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subdir-$(CONFIG_MACH_REALTEK_RTL) += realtek
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subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += xilfpga
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obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))
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@ -33,5 +33,3 @@ dtb-$(CONFIG_DT_NONE) += \
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bcm97420c.dtb \
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bcm97425svmb.dtb \
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bcm97435svmb.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,4 +1,2 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -5,5 +5,3 @@ dtb-$(CONFIG_JZ4770_GCW0) += gcw0.dtb
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dtb-$(CONFIG_JZ4780_CI20) += ci20.dtb
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dtb-$(CONFIG_X1000_CU1000_NEO) += cu1000-neo.dtb
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dtb-$(CONFIG_X1830_CU1830_NEO) += cu1830-neo.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,4 +1,2 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_DT_EASY50712) += danube_easy50712.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -5,5 +5,3 @@ dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb
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dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_8core_rs780e.dtb
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dtb-$(CONFIG_MACH_LOONGSON64) += loongson64g_4core_ls7a.dtb
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dtb-$(CONFIG_MACH_LOONGSON64) += loongson64v_4core_virtio.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -8,6 +8,3 @@ dtb-$(CONFIG_SOC_VCOREIII) += \
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ocelot_pcb123.dtb \
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serval_pcb105.dtb \
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serval_pcb106.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,5 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_MIPS_MALTA) += malta.dtb
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dtb-$(CONFIG_LEGACY_BOARD_SEAD3) += sead3.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -3,5 +3,3 @@ dtb-$(CONFIG_DTB_PIC32_MZDA_SK) += pic32mzda_sk.dtb
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dtb-$(CONFIG_DTB_PIC32_NONE) += \
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pic32mzda_sk.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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|
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@ -10,5 +10,3 @@ dtb-$(CONFIG_SOC_MT7621) += \
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mt7621-gnubee-gb-pc1.dtb \
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mt7621-gnubee-gb-pc2.dtb \
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mt7621-tplink-hc220-g5-v1.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -128,10 +128,10 @@ struct irq_source_routing_table {
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} __packed;
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struct interface_info {
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u16 vers; /* version of the specificition */
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u16 size;
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u8 flag;
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char description[64];
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u16 vers; /* version of the specification */
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u16 size; /* size of this interface */
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u8 flag; /* used or unused */
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char description[64]; /* description for each change */
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} __packed;
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#define MAX_RESOURCE_NUMBER 128
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@ -2039,8 +2039,8 @@ do { \
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#define read_c0_perfcntr3_64() __read_64bit_c0_register($25, 7)
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#define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val)
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#define read_c0_ecc() __read_32bit_c0_register($26, 0)
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#define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val)
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#define read_c0_errctl() __read_32bit_c0_register($26, 0)
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#define write_c0_errctl(val) __write_32bit_c0_register($26, 0, val)
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#define read_c0_derraddr0() __read_ulong_c0_register($26, 1)
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#define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val)
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@ -103,7 +103,7 @@ void sb1480_clockevent_init(void)
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BUG_ON(cpu > 3); /* Only have 4 general purpose timers */
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sprintf(name, "bcm1480-counter-%d", cpu);
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sprintf(name, "bcm1480-counter-%u", cpu);
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cd->name = name;
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cd->features = CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_ONESHOT;
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@ -248,7 +248,7 @@ int ftrace_disable_ftrace_graph_caller(void)
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#define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */
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#define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */
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unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
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static unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
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old_parent_ra, unsigned long parent_ra_addr, unsigned long fp)
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{
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unsigned long sp, ip, tmp;
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@ -60,6 +60,7 @@
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.endm
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__HEAD
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#ifndef CONFIG_NO_EXCEPT_FILL
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/*
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* Reserved space for exception handlers.
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@ -122,9 +122,8 @@ void mips_mt_set_cpuoptions(void)
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unsigned long ectlval;
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unsigned long itcblkgrn;
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/* ErrCtl register is known as "ecc" to Linux */
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ectlval = read_c0_ecc();
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write_c0_ecc(ectlval | (0x1 << 26));
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ectlval = read_c0_errctl();
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write_c0_errctl(ectlval | (0x1 << 26));
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ehb();
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#define INDEX_0 (0x80000000)
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#define INDEX_8 (0x80000008)
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@ -145,7 +144,7 @@ void mips_mt_set_cpuoptions(void)
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ehb();
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/* Write out to ITU with CACHE op */
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cache_op(Index_Store_Tag_D, INDEX_0);
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write_c0_ecc(ectlval);
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write_c0_errctl(ectlval);
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ehb();
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printk("Mapped %ld ITC cells starting at 0x%08x\n",
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((itcblkgrn & 0x7fe00000) >> 20), itc_base);
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@ -26,10 +26,6 @@
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#define ERRCTL_SPRAM (1 << 28)
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/* errctl access */
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#define read_c0_errctl(x) read_c0_ecc(x)
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#define write_c0_errctl(x) write_c0_ecc(x)
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/*
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* Different semantics to the set_c0_* function built by __BUILD_SET_C0
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*/
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@ -382,15 +382,15 @@
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368 o32 io_pgetevents sys_io_pgetevents_time32 compat_sys_io_pgetevents
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# room for arch specific calls
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393 o32 semget sys_semget
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394 o32 semctl sys_semctl compat_sys_semctl
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394 o32 semctl sys_old_semctl compat_sys_old_semctl
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395 o32 shmget sys_shmget
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396 o32 shmctl sys_shmctl compat_sys_shmctl
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396 o32 shmctl sys_old_shmctl compat_sys_old_shmctl
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397 o32 shmat sys_shmat compat_sys_shmat
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398 o32 shmdt sys_shmdt
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399 o32 msgget sys_msgget
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400 o32 msgsnd sys_msgsnd compat_sys_msgsnd
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401 o32 msgrcv sys_msgrcv compat_sys_msgrcv
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402 o32 msgctl sys_msgctl compat_sys_msgctl
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402 o32 msgctl sys_old_msgctl compat_sys_old_msgctl
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403 o32 clock_gettime64 sys_clock_gettime sys_clock_gettime
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404 o32 clock_settime64 sys_clock_settime sys_clock_settime
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405 o32 clock_adjtime64 sys_clock_adjtime sys_clock_adjtime
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@ -38,6 +38,7 @@
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#include <linux/kdb.h>
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#include <linux/irq.h>
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#include <linux/perf_event.h>
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#include <linux/string_choices.h>
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#include <asm/addrspace.h>
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#include <asm/bootinfo.h>
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@ -1705,10 +1706,10 @@ static inline __init void parity_protection_init(void)
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l2parity &= l1parity;
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/* Probe L1 ECC support */
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cp0_ectl = read_c0_ecc();
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write_c0_ecc(cp0_ectl | ERRCTL_PE);
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cp0_ectl = read_c0_errctl();
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write_c0_errctl(cp0_ectl | ERRCTL_PE);
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back_to_back_c0_hazard();
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cp0_ectl = read_c0_ecc();
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cp0_ectl = read_c0_errctl();
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/* Probe L2 ECC support */
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gcr_ectl = read_gcr_err_control();
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@ -1727,9 +1728,9 @@ static inline __init void parity_protection_init(void)
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cp0_ectl |= ERRCTL_PE;
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else
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cp0_ectl &= ~ERRCTL_PE;
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write_c0_ecc(cp0_ectl);
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write_c0_errctl(cp0_ectl);
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back_to_back_c0_hazard();
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WARN_ON(!!(read_c0_ecc() & ERRCTL_PE) != l1parity);
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WARN_ON(!!(read_c0_errctl() & ERRCTL_PE) != l1parity);
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/* Configure L2 ECC checking */
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if (l2parity)
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|
@ -1741,8 +1742,8 @@ static inline __init void parity_protection_init(void)
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gcr_ectl &= CM_GCR_ERR_CONTROL_L2_ECC_EN;
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WARN_ON(!!gcr_ectl != l2parity);
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pr_info("Cache parity protection %sabled\n",
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l1parity ? "en" : "dis");
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pr_info("Cache parity protection %s\n",
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str_enabled_disabled(l1parity));
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return;
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}
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|
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|
@ -1761,18 +1762,18 @@ static inline __init void parity_protection_init(void)
|
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unsigned long errctl;
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unsigned int l1parity_present, l2parity_present;
|
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|
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errctl = read_c0_ecc();
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errctl = read_c0_errctl();
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errctl &= ~(ERRCTL_PE|ERRCTL_L2P);
|
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|
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/* probe L1 parity support */
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write_c0_ecc(errctl | ERRCTL_PE);
|
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write_c0_errctl(errctl | ERRCTL_PE);
|
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back_to_back_c0_hazard();
|
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l1parity_present = (read_c0_ecc() & ERRCTL_PE);
|
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l1parity_present = (read_c0_errctl() & ERRCTL_PE);
|
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|
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/* probe L2 parity support */
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write_c0_ecc(errctl|ERRCTL_L2P);
|
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write_c0_errctl(errctl|ERRCTL_L2P);
|
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back_to_back_c0_hazard();
|
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l2parity_present = (read_c0_ecc() & ERRCTL_L2P);
|
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l2parity_present = (read_c0_errctl() & ERRCTL_L2P);
|
||||
|
||||
if (l1parity_present && l2parity_present) {
|
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if (l1parity)
|
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|
@ -1791,20 +1792,20 @@ static inline __init void parity_protection_init(void)
|
|||
|
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printk(KERN_INFO "Writing ErrCtl register=%08lx\n", errctl);
|
||||
|
||||
write_c0_ecc(errctl);
|
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write_c0_errctl(errctl);
|
||||
back_to_back_c0_hazard();
|
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errctl = read_c0_ecc();
|
||||
errctl = read_c0_errctl();
|
||||
printk(KERN_INFO "Readback ErrCtl register=%08lx\n", errctl);
|
||||
|
||||
if (l1parity_present)
|
||||
printk(KERN_INFO "Cache parity protection %sabled\n",
|
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(errctl & ERRCTL_PE) ? "en" : "dis");
|
||||
pr_info("Cache parity protection %s\n",
|
||||
str_enabled_disabled(errctl & ERRCTL_PE));
|
||||
|
||||
if (l2parity_present) {
|
||||
if (l1parity_present && l1parity)
|
||||
errctl ^= ERRCTL_L2P;
|
||||
printk(KERN_INFO "L2 cache parity protection %sabled\n",
|
||||
(errctl & ERRCTL_L2P) ? "en" : "dis");
|
||||
pr_info("L2 cache parity protection %s\n",
|
||||
str_enabled_disabled(errctl & ERRCTL_L2P));
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
@ -1812,11 +1813,11 @@ static inline __init void parity_protection_init(void)
|
|||
case CPU_5KC:
|
||||
case CPU_5KE:
|
||||
case CPU_LOONGSON32:
|
||||
write_c0_ecc(0x80000000);
|
||||
write_c0_errctl(0x80000000);
|
||||
back_to_back_c0_hazard();
|
||||
/* Set the PE bit (bit 31) in the c0_errctl register. */
|
||||
printk(KERN_INFO "Cache parity protection %sabled\n",
|
||||
(read_c0_ecc() & 0x80000000) ? "en" : "dis");
|
||||
pr_info("Cache parity protection %s\n",
|
||||
str_enabled_disabled(read_c0_errctl() & 0x80000000));
|
||||
break;
|
||||
case CPU_20KC:
|
||||
case CPU_25KF:
|
||||
|
@ -1887,8 +1888,8 @@ asmlinkage void do_ftlb(void)
|
|||
if ((cpu_has_mips_r2_r6) &&
|
||||
(((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS) ||
|
||||
((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_LOONGSON))) {
|
||||
pr_err("FTLB error exception, cp0_ecc=0x%08x:\n",
|
||||
read_c0_ecc());
|
||||
pr_err("FTLB error exception, cp0_errctl=0x%08x:\n",
|
||||
read_c0_errctl());
|
||||
pr_err("cp0_errorepc == %0*lx\n", field, read_c0_errorepc());
|
||||
reg_val = read_c0_cacheerr();
|
||||
pr_err("c0_cacheerr == %08x\n", reg_val);
|
||||
|
|
|
@ -21,13 +21,11 @@ static ssize_t boardinfo_show(struct kobject *kobj,
|
|||
"BIOS Info\n"
|
||||
"Vendor\t\t\t: %s\n"
|
||||
"Version\t\t\t: %s\n"
|
||||
"ROM Size\t\t: %d KB\n"
|
||||
"Release Date\t\t: %s\n",
|
||||
strsep(&tmp_board_manufacturer, "-"),
|
||||
eboard->name,
|
||||
strsep(&tmp_bios_vendor, "-"),
|
||||
einter->description,
|
||||
einter->size,
|
||||
especial->special_name);
|
||||
}
|
||||
static struct kobj_attribute boardinfo_attr = __ATTR(boardinfo, 0444,
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
#include <linux/dma-map-ops.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/pci_ids.h>
|
||||
#include <linux/string_choices.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <loongson.h>
|
||||
#include <boot_param.h>
|
||||
|
@ -162,7 +163,7 @@ void __init prom_lefi_init_env(void)
|
|||
dma_default_coherent = !eirq_source->dma_noncoherent;
|
||||
}
|
||||
|
||||
pr_info("Firmware: Coherent DMA: %s\n", dma_default_coherent ? "on" : "off");
|
||||
pr_info("Firmware: Coherent DMA: %s\n", str_on_off(dma_default_coherent));
|
||||
|
||||
loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
|
||||
loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
|
||||
|
|
|
@ -1660,7 +1660,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
|
|||
break;
|
||||
}
|
||||
|
||||
case 0x3:
|
||||
case 0x7:
|
||||
if (MIPSInst_FUNC(ir) != pfetch_op)
|
||||
return SIGILL;
|
||||
|
||||
|
|
|
@ -29,6 +29,14 @@ static LIST_HEAD(controllers);
|
|||
|
||||
static int pci_initialized;
|
||||
|
||||
unsigned long pci_address_to_pio(phys_addr_t address)
|
||||
{
|
||||
if (address > IO_SPACE_LIMIT)
|
||||
return (unsigned long)-1;
|
||||
|
||||
return (unsigned long) address;
|
||||
}
|
||||
|
||||
/*
|
||||
* We need to avoid collisions with `mirrored' VGA ports
|
||||
* and other strange ISA hardware, so we always want the
|
||||
|
|
Loading…
Reference in New Issue
Block a user