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iio: frequency: adf4371: add ref doubler

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Add support for the reference doubler.

Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Link: https://patch.msgid.link/20250127101026.5320-4-antoniu.miclaus@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Antoniu Miclaus 2025-01-27 12:10:23 +02:00 committed by Jonathan Cameron
parent e01670e31d
commit 80ce1f106a
1 changed files with 14 additions and 2 deletions
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16
drivers/iio/frequency/adf4371.c
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@ -45,6 +45,8 @@
/* ADF4371_REG22 */ /* ADF4371_REG22 */
#define ADF4371_REFIN_MODE_MASK BIT(6) #define ADF4371_REFIN_MODE_MASK BIT(6)
#define ADF4371_REFIN_MODE(x) FIELD_PREP(ADF4371_REFIN_MODE_MASK, x) #define ADF4371_REFIN_MODE(x) FIELD_PREP(ADF4371_REFIN_MODE_MASK, x)
#define ADF4371_REF_DOUB_MASK BIT(5)
#define ADF4371_REF_DOUB(x) FIELD_PREP(ADF4371_REF_DOUB_MASK, x)\
/* ADF4371_REG24 */ /* ADF4371_REG24 */
#define ADF4371_RF_DIV_SEL_MSK GENMASK(6, 4) #define ADF4371_RF_DIV_SEL_MSK GENMASK(6, 4)
@ -76,6 +78,9 @@
#define ADF4371_MAX_FREQ_REFIN 600000000UL /* Hz */ #define ADF4371_MAX_FREQ_REFIN 600000000UL /* Hz */
#define ADF4371_MAX_FREQ_REFIN_SE 500000000UL /* Hz */ #define ADF4371_MAX_FREQ_REFIN_SE 500000000UL /* Hz */
#define ADF4371_MIN_CLKIN_DOUB_FREQ 10000000ULL /* Hz */
#define ADF4371_MAX_CLKIN_DOUB_FREQ 125000000ULL /* Hz */
/* MOD1 is a 24-bit primary modulus with fixed value of 2^25 */ /* MOD1 is a 24-bit primary modulus with fixed value of 2^25 */
#define ADF4371_MODULUS1 33554432ULL #define ADF4371_MODULUS1 33554432ULL
/* MOD2 is the programmable, 14-bit auxiliary fractional modulus */ /* MOD2 is the programmable, 14-bit auxiliary fractional modulus */
@ -483,7 +488,7 @@ static const struct iio_info adf4371_info = {
static int adf4371_setup(struct adf4371_state *st) static int adf4371_setup(struct adf4371_state *st)
{ {
unsigned int synth_timeout = 2, timeout = 1, vco_alc_timeout = 1; unsigned int synth_timeout = 2, timeout = 1, vco_alc_timeout = 1;
unsigned int vco_band_div, tmp; unsigned int vco_band_div, tmp, ref_doubler_en = 0;
int ret; int ret;
/* Perform a software reset */ /* Perform a software reset */
@ -516,8 +521,14 @@ static int adf4371_setup(struct adf4371_state *st)
(!st->ref_diff_en && st->clkin_freq > ADF4371_MAX_FREQ_REFIN_SE)) (!st->ref_diff_en && st->clkin_freq > ADF4371_MAX_FREQ_REFIN_SE))
return -EINVAL; return -EINVAL;
if (st->clkin_freq < ADF4371_MAX_CLKIN_DOUB_FREQ &&
st->clkin_freq > ADF4371_MIN_CLKIN_DOUB_FREQ)
ref_doubler_en = 1;
ret = regmap_update_bits(st->regmap, ADF4371_REG(0x22), ret = regmap_update_bits(st->regmap, ADF4371_REG(0x22),
ADF4371_REF_DOUB_MASK |
ADF4371_REFIN_MODE_MASK, ADF4371_REFIN_MODE_MASK,
ADF4371_REF_DOUB(ref_doubler_en) |
ADF4371_REFIN_MODE(st->ref_diff_en)); ADF4371_REFIN_MODE(st->ref_diff_en));
if (ret < 0) if (ret < 0)
return ret; return ret;
@ -531,7 +542,8 @@ static int adf4371_setup(struct adf4371_state *st)
*/ */
do { do {
st->ref_div_factor++; st->ref_div_factor++;
st->fpfd = st->clkin_freq / st->ref_div_factor; st->fpfd = st->clkin_freq * (1 + ref_doubler_en) /
st->ref_div_factor;
} while (st->fpfd > ADF4371_MAX_FREQ_PFD); } while (st->fpfd > ADF4371_MAX_FREQ_PFD);
/* Calculate Timeouts */ /* Calculate Timeouts */