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iio: frequency: adf4350: Fix ADF4350_REG3_12BIT_CLKDIV_MODE
commit1d8fdabe19upstream. The clk div bits (2 bits wide) do not start in bit 16 but in bit 15. Fix it accordingly. Fixes:e31166f0fd("iio: frequency: New driver for Analog Devices ADF4350/ADF4351 Wideband Synthesizers") Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250829-adf4350-fix-v2-2-0bf543ba797d@analog.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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/* REG3 Bit Definitions */
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#define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3)
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#define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 16)
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#define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 15)
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#define ADF4350_REG3_12BIT_CSR_EN (1 << 18)
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#define ADF4351_REG3_CHARGE_CANCELLATION_EN (1 << 21)
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#define ADF4351_REG3_ANTI_BACKLASH_3ns_EN (1 << 22)
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