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This is the 6.1.148 stable release

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Merge tag 'v6.1.148' into v6.1/standard/base

This is the 6.1.148 stable release

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# gpg: Signature made Fri 15 Aug 2025 06:07:22 AM EDT
# gpg:                using RSA key 647F28654894E3BD457199BE38DBBDC86092693E
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This commit is contained in:
Bruce Ashfield 2025-08-21 09:42:57 -04:00
commit 969da4277b
271 changed files with 2448 additions and 1169 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/filesystems/f2fs.rst
View File

@ -230,9 +230,9 @@ usrjquota=<file> Appoint specified file and type during mount, so that quota
grpjquota=<file> information can be properly updated during recovery flow,
prjjquota=<file> <quota file>: must be in root directory;
jqfmt=<quota type> <quota type>: [vfsold,vfsv0,vfsv1].
offusrjquota Turn off user journalled quota.
offgrpjquota Turn off group journalled quota.
offprjjquota Turn off project journalled quota.
usrjquota= Turn off user journalled quota.
grpjquota= Turn off group journalled quota.
prjjquota= Turn off project journalled quota.
quota Enable plain user disk quota accounting.
noquota Disable all plain disk quota option.
alloc_mode=%s Adjust block allocation policy, which supports "reuse"

2
Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 147
SUBLEVEL = 148
EXTRAVERSION =
NAME = Curry Ramen

2
arch/arm/boot/dts/am335x-boneblack.dts
View File

@ -34,7 +34,7 @@
"P9_18 [spi0_d1]",
"P9_17 [spi0_cs0]",
"[mmc0_cd]",
"P8_42A [ecappwm0]",
"P9_42A [ecappwm0]",
"P8_35 [lcd d12]",
"P8_33 [lcd d13]",
"P8_31 [lcd d14]",

1
arch/arm/boot/dts/imx6ul-kontron-bl-common.dtsi
View File

@ -169,7 +169,6 @@
pinctrl-0 = <&pinctrl_uart2>;
linux,rs485-enabled-at-boot-time;
rs485-rx-during-tx;
rs485-rts-active-low;
uart-has-rtscts;
status = "okay";
};

2
arch/arm/boot/dts/vfxxx.dtsi
View File

@ -617,7 +617,7 @@
ftm: ftm@400b8000 {
compatible = "fsl,ftm-timer";
reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
reg = <0x400b8000 0x1000>, <0x400b9000 0x1000>;
interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "ftm-evt", "ftm-src",
"ftm-evt-counter-en", "ftm-src-counter-en";

2
arch/arm/crypto/aes-neonbs-glue.c
View File

@ -245,7 +245,7 @@ static int ctr_encrypt(struct skcipher_request *req)
while (walk.nbytes > 0) {
const u8 *src = walk.src.virt.addr;
u8 *dst = walk.dst.virt.addr;
int bytes = walk.nbytes;
unsigned int bytes = walk.nbytes;
if (unlikely(bytes < AES_BLOCK_SIZE))
src = dst = memcpy(buf + sizeof(buf) - bytes,

2
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
View File

@ -284,6 +284,8 @@
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
assigned-clocks = <&clk IMX8MM_CLK_USDHC3>;
assigned-clock-rates = <400000000>;
bus-width = <8>;
non-removable;
status = "okay";

2
arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
View File

@ -295,6 +295,8 @@
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
assigned-clocks = <&clk IMX8MN_CLK_USDHC3>;
assigned-clock-rates = <400000000>;
bus-width = <8>;
non-removable;
status = "okay";

10
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@ -3244,18 +3244,18 @@
cell-index = <0>;
};
sram@146aa000 {
sram@14680000 {
compatible = "qcom,sc7180-imem", "syscon", "simple-mfd";
reg = <0 0x146aa000 0 0x2000>;
reg = <0 0x14680000 0 0x2e000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x146aa000 0x2000>;
ranges = <0 0 0x14680000 0x2e000>;
pil-reloc@94c {
pil-reloc@2a94c {
compatible = "qcom,pil-reloc-info";
reg = <0x94c 0xc8>;
reg = <0x2a94c 0xc8>;
};
};

10
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@ -4915,18 +4915,18 @@
cell-index = <0>;
};
sram@146bf000 {
sram@14680000 {
compatible = "qcom,sdm845-imem", "syscon", "simple-mfd";
reg = <0 0x146bf000 0 0x1000>;
reg = <0 0x14680000 0 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x146bf000 0x1000>;
ranges = <0 0 0x14680000 0x40000>;
pil-reloc@94c {
pil-reloc@3f94c {
compatible = "qcom,pil-reloc-info";
reg = <0x94c 0xc8>;
reg = <0x3f94c 0xc8>;
};
};

2
arch/m68k/Kconfig.debug
View File

@ -10,7 +10,7 @@ config BOOTPARAM_STRING
config EARLY_PRINTK
bool "Early printk"
depends on !(SUN3 || M68000 || COLDFIRE)
depends on MMU_MOTOROLA
help
Write kernel log output directly to a serial port.
Where implemented, output goes to the framebuffer as well.

42
arch/m68k/kernel/early_printk.c
View File

@ -16,25 +16,10 @@
#include "../mvme147/mvme147.h"
#include "../mvme16x/mvme16x.h"
asmlinkage void __init debug_cons_nputs(const char *s, unsigned n);
static void __ref debug_cons_write(struct console *c,
const char *s, unsigned n)
{
#if !(defined(CONFIG_SUN3) || defined(CONFIG_M68000) || \
defined(CONFIG_COLDFIRE))
if (MACH_IS_MVME147)
mvme147_scc_write(c, s, n);
else if (MACH_IS_MVME16x)
mvme16x_cons_write(c, s, n);
else
debug_cons_nputs(s, n);
#endif
}
asmlinkage void __init debug_cons_nputs(struct console *c, const char *s, unsigned int n);
static struct console early_console_instance = {
.name = "debug",
.write = debug_cons_write,
.flags = CON_PRINTBUFFER | CON_BOOT,
.index = -1
};
@ -44,6 +29,12 @@ static int __init setup_early_printk(char *buf)
if (early_console || buf)
return 0;
if (MACH_IS_MVME147)
early_console_instance.write = mvme147_scc_write;
else if (MACH_IS_MVME16x)
early_console_instance.write = mvme16x_cons_write;
else
early_console_instance.write = debug_cons_nputs;
early_console = &early_console_instance;
register_console(early_console);
@ -51,20 +42,15 @@ static int __init setup_early_printk(char *buf)
}
early_param("earlyprintk", setup_early_printk);
/*
* debug_cons_nputs() defined in arch/m68k/kernel/head.S cannot be called
* after init sections are discarded (for platforms that use it).
*/
#if !(defined(CONFIG_SUN3) || defined(CONFIG_M68000) || \
defined(CONFIG_COLDFIRE))
static int __init unregister_early_console(void)
{
if (!early_console || MACH_IS_MVME16x)
return 0;
/*
* debug_cons_nputs() defined in arch/m68k/kernel/head.S cannot be
* called after init sections are discarded (for platforms that use it).
*/
if (early_console && early_console->write == debug_cons_nputs)
return unregister_console(early_console);
return unregister_console(early_console);
return 0;
}
late_initcall(unregister_early_console);
#endif

8
arch/m68k/kernel/head.S
View File

@ -3267,8 +3267,8 @@ func_return putn
* turns around and calls the internal routines. This routine
* is used by the boot console.
*
* The calling parameters are:
* void debug_cons_nputs(const char *str, unsigned length)
* The function signature is -
* void debug_cons_nputs(struct console *c, const char *s, unsigned int n)
*
* This routine does NOT understand variable arguments only
* simple strings!
@ -3277,8 +3277,8 @@ ENTRY(debug_cons_nputs)
moveml %d0/%d1/%a0,%sp@-
movew %sr,%sp@-
ori #0x0700,%sr
movel %sp@(18),%a0 /* fetch parameter */
movel %sp@(22),%d1 /* fetch parameter */
movel %sp@(22),%a0 /* char *s */
movel %sp@(26),%d1 /* unsigned int n */
jra 2f
1:
#ifdef CONSOLE_DEBUG

56
arch/mips/mm/tlb-r4k.c
View File

@ -498,6 +498,60 @@ static int __init set_ntlb(char *str)
__setup("ntlb=", set_ntlb);
/* Initialise all TLB entries with unique values */
static void r4k_tlb_uniquify(void)
{
int entry = num_wired_entries();
htw_stop();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
while (entry < current_cpu_data.tlbsize) {
unsigned long asid_mask = cpu_asid_mask(&current_cpu_data);
unsigned long asid = 0;
int idx;
/* Skip wired MMID to make ginvt_mmid work */
if (cpu_has_mmid)
asid = MMID_KERNEL_WIRED + 1;
/* Check for match before using UNIQUE_ENTRYHI */
do {
if (cpu_has_mmid) {
write_c0_memorymapid(asid);
write_c0_entryhi(UNIQUE_ENTRYHI(entry));
} else {
write_c0_entryhi(UNIQUE_ENTRYHI(entry) | asid);
}
mtc0_tlbw_hazard();
tlb_probe();
tlb_probe_hazard();
idx = read_c0_index();
/* No match or match is on current entry */
if (idx < 0 || idx == entry)
break;
/*
* If we hit a match, we need to try again with
* a different ASID.
*/
asid++;
} while (asid < asid_mask);
if (idx >= 0 && idx != entry)
panic("Unable to uniquify TLB entry %d", idx);
write_c0_index(entry);
mtc0_tlbw_hazard();
tlb_write_indexed();
entry++;
}
tlbw_use_hazard();
htw_start();
flush_micro_tlb();
}
/*
* Configure TLB (for init or after a CPU has been powered off).
*/
@ -537,7 +591,7 @@ static void r4k_tlb_configure(void)
temp_tlb_entry = current_cpu_data.tlbsize - 1;
/* From this point on the ARC firmware is dead. */
local_flush_tlb_all();
r4k_tlb_uniquify();
/* Did I tell you that ARC SUCKS? */
}

1
arch/powerpc/configs/ppc6xx_defconfig
View File

@ -263,7 +263,6 @@ CONFIG_NET_SCH_DSMARK=m
CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m

1
arch/powerpc/kernel/eeh.c
View File

@ -1130,6 +1130,7 @@ int eeh_unfreeze_pe(struct eeh_pe *pe)
return ret;
}
EXPORT_SYMBOL_GPL(eeh_unfreeze_pe);
static struct pci_device_id eeh_reset_ids[] = {

48
arch/powerpc/kernel/eeh_driver.c
View File

@ -257,13 +257,12 @@ static void eeh_pe_report_edev(struct eeh_dev *edev, eeh_report_fn fn,
struct pci_driver *driver;
enum pci_ers_result new_result;
pci_lock_rescan_remove();
pdev = edev->pdev;
if (pdev)
get_device(&pdev->dev);
pci_unlock_rescan_remove();
if (!pdev) {
eeh_edev_info(edev, "no device");
*result = PCI_ERS_RESULT_DISCONNECT;
return;
}
device_lock(&pdev->dev);
@ -304,8 +303,9 @@ static void eeh_pe_report(const char *name, struct eeh_pe *root,
struct eeh_dev *edev, *tmp;
pr_info("EEH: Beginning: '%s'\n", name);
eeh_for_each_pe(root, pe) eeh_pe_for_each_dev(pe, edev, tmp)
eeh_pe_report_edev(edev, fn, result);
eeh_for_each_pe(root, pe)
eeh_pe_for_each_dev(pe, edev, tmp)
eeh_pe_report_edev(edev, fn, result);
if (result)
pr_info("EEH: Finished:'%s' with aggregate recovery state:'%s'\n",
name, pci_ers_result_name(*result));
@ -383,6 +383,8 @@ static void eeh_dev_restore_state(struct eeh_dev *edev, void *userdata)
if (!edev)
return;
pci_lock_rescan_remove();
/*
* The content in the config space isn't saved because
* the blocked config space on some adapters. We have
@ -393,14 +395,19 @@ static void eeh_dev_restore_state(struct eeh_dev *edev, void *userdata)
if (list_is_last(&edev->entry, &edev->pe->edevs))
eeh_pe_restore_bars(edev->pe);
pci_unlock_rescan_remove();
return;
}
pdev = eeh_dev_to_pci_dev(edev);
if (!pdev)
if (!pdev) {
pci_unlock_rescan_remove();
return;
}
pci_restore_state(pdev);
pci_unlock_rescan_remove();
}
/**
@ -647,9 +654,7 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,
if (any_passed || driver_eeh_aware || (pe->type & EEH_PE_VF)) {
eeh_pe_dev_traverse(pe, eeh_rmv_device, rmv_data);
} else {
pci_lock_rescan_remove();
pci_hp_remove_devices(bus);
pci_unlock_rescan_remove();
}
/*
@ -665,8 +670,6 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,
if (rc)
return rc;
pci_lock_rescan_remove();
/* Restore PE */
eeh_ops->configure_bridge(pe);
eeh_pe_restore_bars(pe);
@ -674,7 +677,6 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,
/* Clear frozen state */
rc = eeh_clear_pe_frozen_state(pe, false);
if (rc) {
pci_unlock_rescan_remove();
return rc;
}
@ -709,7 +711,6 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,
pe->tstamp = tstamp;
pe->freeze_count = cnt;
pci_unlock_rescan_remove();
return 0;
}
@ -843,10 +844,13 @@ void eeh_handle_normal_event(struct eeh_pe *pe)
{LIST_HEAD_INIT(rmv_data.removed_vf_list), 0};
int devices = 0;
pci_lock_rescan_remove();
bus = eeh_pe_bus_get(pe);
if (!bus) {
pr_err("%s: Cannot find PCI bus for PHB#%x-PE#%x\n",
__func__, pe->phb->global_number, pe->addr);
pci_unlock_rescan_remove();
return;
}
@ -1085,10 +1089,15 @@ recover_failed:
eeh_pe_state_clear(pe, EEH_PE_PRI_BUS, true);
eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED);
pci_lock_rescan_remove();
pci_hp_remove_devices(bus);
pci_unlock_rescan_remove();
bus = eeh_pe_bus_get(pe);
if (bus)
pci_hp_remove_devices(bus);
else
pr_err("%s: PCI bus for PHB#%x-PE#%x disappeared\n",
__func__, pe->phb->global_number, pe->addr);
/* The passed PE should no longer be used */
pci_unlock_rescan_remove();
return;
}
@ -1105,6 +1114,8 @@ out:
eeh_clear_slot_attention(edev->pdev);
eeh_pe_state_clear(pe, EEH_PE_RECOVERING, true);
pci_unlock_rescan_remove();
}
/**
@ -1123,6 +1134,7 @@ void eeh_handle_special_event(void)
unsigned long flags;
int rc;
pci_lock_rescan_remove();
do {
rc = eeh_ops->next_error(&pe);
@ -1162,10 +1174,12 @@ void eeh_handle_special_event(void)
break;
case EEH_NEXT_ERR_NONE:
pci_unlock_rescan_remove();
return;
default:
pr_warn("%s: Invalid value %d from next_error()\n",
__func__, rc);
pci_unlock_rescan_remove();
return;
}
@ -1177,7 +1191,9 @@ void eeh_handle_special_event(void)
if (rc == EEH_NEXT_ERR_FROZEN_PE ||
rc == EEH_NEXT_ERR_FENCED_PHB) {
eeh_pe_state_mark(pe, EEH_PE_RECOVERING);
pci_unlock_rescan_remove();
eeh_handle_normal_event(pe);
pci_lock_rescan_remove();
} else {
eeh_for_each_pe(pe, tmp_pe)
eeh_pe_for_each_dev(tmp_pe, edev, tmp_edev)
@ -1190,7 +1206,6 @@ void eeh_handle_special_event(void)
"error_detected(permanent failure)", pe,
eeh_report_failure, NULL);
pci_lock_rescan_remove();
list_for_each_entry(hose, &hose_list, list_node) {
phb_pe = eeh_phb_pe_get(hose);
if (!phb_pe ||
@ -1209,7 +1224,6 @@ void eeh_handle_special_event(void)
}
pci_hp_remove_devices(bus);
}
pci_unlock_rescan_remove();
}
/*
@ -1219,4 +1233,6 @@ void eeh_handle_special_event(void)
if (rc == EEH_NEXT_ERR_DEAD_IOC)
break;
} while (rc != EEH_NEXT_ERR_NONE);
pci_unlock_rescan_remove();
}

11
arch/powerpc/kernel/eeh_pe.c
View File

@ -671,11 +671,12 @@ static void eeh_bridge_check_link(struct eeh_dev *edev)
eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val);
/* Check link */
eeh_ops->read_config(edev, cap + PCI_EXP_LNKCAP, 4, &val);
if (!(val & PCI_EXP_LNKCAP_DLLLARC)) {
eeh_edev_dbg(edev, "No link reporting capability (0x%08x) \n", val);
msleep(1000);
return;
if (edev->pdev) {
if (!edev->pdev->link_active_reporting) {
eeh_edev_dbg(edev, "No link reporting capability\n");
msleep(1000);
return;
}
}
/* Wait the link is up until timeout (5s) */

3
arch/powerpc/kernel/pci-hotplug.c
View File

@ -111,6 +111,9 @@ void pci_hp_add_devices(struct pci_bus *bus)
struct pci_controller *phb;
struct device_node *dn = pci_bus_to_OF_node(bus);
if (!dn)
return;
phb = pci_bus_to_host(bus);
mode = PCI_PROBE_NORMAL;

10
arch/sh/Makefile
View File

@ -103,16 +103,16 @@ UTS_MACHINE := sh
LDFLAGS_vmlinux += -e _stext
ifdef CONFIG_CPU_LITTLE_ENDIAN
ld-bfd := elf32-sh-linux
LDFLAGS_vmlinux += --defsym jiffies=jiffies_64 --oformat $(ld-bfd)
ld_bfd := elf32-sh-linux
LDFLAGS_vmlinux += --defsym jiffies=jiffies_64 --oformat $(ld_bfd)
KBUILD_LDFLAGS += -EL
else
ld-bfd := elf32-shbig-linux
LDFLAGS_vmlinux += --defsym jiffies=jiffies_64+4 --oformat $(ld-bfd)
ld_bfd := elf32-shbig-linux
LDFLAGS_vmlinux += --defsym jiffies=jiffies_64+4 --oformat $(ld_bfd)
KBUILD_LDFLAGS += -EB
endif
export ld-bfd
export ld_bfd
# Mach groups
machdir-$(CONFIG_SOLUTION_ENGINE) += mach-se

4
arch/sh/boot/compressed/Makefile
View File

@ -36,7 +36,7 @@ endif
ccflags-remove-$(CONFIG_MCOUNT) += -pg
LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(IMAGE_OFFSET) -e startup \
LDFLAGS_vmlinux := --oformat $(ld_bfd) -Ttext $(IMAGE_OFFSET) -e startup \
-T $(obj)/../../kernel/vmlinux.lds
KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING
@ -60,7 +60,7 @@ $(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE
OBJCOPYFLAGS += -R .empty_zero_page
LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
LDFLAGS_piggy.o := -r --format binary --oformat $(ld_bfd) -T
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE
$(call if_changed,ld)

4
arch/sh/boot/romimage/Makefile
View File

@ -13,7 +13,7 @@ mmcif-obj-$(CONFIG_CPU_SUBTYPE_SH7724) := $(obj)/mmcif-sh7724.o
load-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-load-y)
obj-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-obj-y)
LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(load-y) -e romstart \
LDFLAGS_vmlinux := --oformat $(ld_bfd) -Ttext $(load-y) -e romstart \
-T $(obj)/../../kernel/vmlinux.lds
$(obj)/vmlinux: $(obj)/head.o $(obj-y) $(obj)/piggy.o FORCE
@ -24,7 +24,7 @@ OBJCOPYFLAGS += -j .empty_zero_page
$(obj)/zeropage.bin: vmlinux FORCE
$(call if_changed,objcopy)
LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
LDFLAGS_piggy.o := -r --format binary --oformat $(ld_bfd) -T
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/zeropage.bin arch/sh/boot/zImage FORCE
$(call if_changed,ld)

2
arch/um/drivers/rtc_user.c
View File

@ -28,7 +28,7 @@ int uml_rtc_start(bool timetravel)
int err;
if (timetravel) {
int err = os_pipe(uml_rtc_irq_fds, 1, 1);
err = os_pipe(uml_rtc_irq_fds, 1, 1);
if (err)
goto fail;
} else {

7
arch/x86/boot/compressed/sev.c
View File

@ -164,6 +164,13 @@ static void __page_state_change(unsigned long paddr, enum psc_op op)
*/
if (op == SNP_PAGE_STATE_PRIVATE && pvalidate(paddr, RMP_PG_SIZE_4K, 1))
sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PVALIDATE);
/*
* If validating memory (making it private) and affected by the
* cache-coherency vulnerability, perform the cache eviction mitigation.
*/
if (op == SNP_PAGE_STATE_PRIVATE && !has_cpuflag(X86_FEATURE_COHERENCY_SFW_NO))
sev_evict_cache((void *)paddr, 1);
}
void snp_set_page_private(unsigned long paddr)

13
arch/x86/boot/cpuflags.c
View File

@ -124,5 +124,18 @@ void get_cpuflags(void)
cpuid(0x80000001, &ignored, &ignored, &cpu.flags[6],
&cpu.flags[1]);
}
if (max_amd_level >= 0x8000001f) {
u32 ebx;
/*
* The X86_FEATURE_COHERENCY_SFW_NO feature bit is in
* the virtualization flags entry (word 8) and set by
* scattered.c, so the bit needs to be explicitly set.
*/
cpuid(0x8000001f, &ignored, &ebx, &ignored, &ignored);
if (ebx & BIT(31))
set_bit(X86_FEATURE_COHERENCY_SFW_NO, cpu.flags);
}
}
}

4
arch/x86/hyperv/irqdomain.c
View File

@ -192,7 +192,6 @@ static void hv_irq_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
struct pci_dev *dev;
struct hv_interrupt_entry out_entry, *stored_entry;
struct irq_cfg *cfg = irqd_cfg(data);
const cpumask_t *affinity;
int cpu;
u64 status;
@ -204,8 +203,7 @@ static void hv_irq_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
return;
}
affinity = irq_data_get_effective_affinity_mask(data);
cpu = cpumask_first_and(affinity, cpu_online_mask);
cpu = cpumask_first(irq_data_get_effective_affinity_mask(data));
if (data->chip_data) {
/*

1
arch/x86/include/asm/cpufeatures.h
View File

@ -230,6 +230,7 @@
#define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
#define X86_FEATURE_EPT ( 8*32+ 3) /* Intel Extended Page Table */
#define X86_FEATURE_VPID ( 8*32+ 4) /* Intel Virtual Processor ID */
#define X86_FEATURE_COHERENCY_SFW_NO ( 8*32+ 5) /* "" SNP cache coherency software work around not needed */
#define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer VMMCALL to VMCALL */
#define X86_FEATURE_XENPV ( 8*32+16) /* "" Xen paravirtual guest */

2
arch/x86/kernel/cpu/amd.c
View File

@ -563,6 +563,8 @@ static bool amd_check_tsa_microcode(void)
p.model = c->x86_model;
p.ext_model = c->x86_model >> 4;
p.stepping = c->x86_stepping;
/* reserved bits are expected to be 0 in test below */
p.__reserved = 0;
if (c->x86 == 0x19) {
switch (p.ucode_rev >> 8) {

1
arch/x86/kernel/cpu/scattered.c
View File

@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
{ X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },
{ X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 },
{ X86_FEATURE_COHERENCY_SFW_NO, CPUID_EBX, 31, 0x8000001f, 0 },
{ X86_FEATURE_TSA_SQ_NO, CPUID_ECX, 1, 0x80000021, 0 },
{ X86_FEATURE_TSA_L1_NO, CPUID_ECX, 2, 0x80000021, 0 },
{ X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 },

18
arch/x86/kernel/sev-shared.c
View File

@ -1064,3 +1064,21 @@ static void __head setup_cpuid_table(const struct cc_blob_sev_info *cc_info)
RIP_REL_REF(cpuid_ext_range_max) = fn->eax;
}
}
static inline void sev_evict_cache(void *va, int npages)
{
volatile u8 val __always_unused;
u8 *bytes = va;
int page_idx;
/*
* For SEV guests, a read from the first/last cache-lines of a 4K page
* using the guest key is sufficient to cause a flush of all cache-lines
* associated with that 4K page without incurring all the overhead of a
* full CLFLUSH sequence.
*/
for (page_idx = 0; page_idx < npages; page_idx++) {
val = bytes[page_idx * PAGE_SIZE];
val = bytes[page_idx * PAGE_SIZE + PAGE_SIZE - 1];
}
}

11
arch/x86/kernel/sev.c
View File

@ -676,10 +676,12 @@ static u64 __init get_jump_table_addr(void)
static void pvalidate_pages(unsigned long vaddr, unsigned long npages, bool validate)
{
unsigned long vaddr_end;
unsigned long vaddr_begin, vaddr_end;
int rc;
vaddr = vaddr & PAGE_MASK;
vaddr_begin = vaddr;
vaddr_end = vaddr + (npages << PAGE_SHIFT);
while (vaddr < vaddr_end) {
@ -689,6 +691,13 @@ static void pvalidate_pages(unsigned long vaddr, unsigned long npages, bool vali
vaddr = vaddr + PAGE_SIZE;
}
/*
* If validating memory (making it private) and affected by the
* cache-coherency vulnerability, perform the cache eviction mitigation.
*/
if (validate && !cpu_feature_enabled(X86_FEATURE_COHERENCY_SFW_NO))
sev_evict_cache((void *)vaddr_begin, npages);
}
static void __head early_set_pages_state(unsigned long paddr, unsigned long npages, enum psc_op op)

5
arch/x86/mm/extable.c
View File

@ -121,13 +121,12 @@ static bool ex_handler_sgx(const struct exception_table_entry *fixup,
static bool ex_handler_fprestore(const struct exception_table_entry *fixup,
struct pt_regs *regs)
{
regs->ip = ex_fixup_addr(fixup);
WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
(void *)instruction_pointer(regs));
fpu_reset_from_exception_fixup();
return true;
return ex_handler_default(fixup, regs);
}
static bool ex_handler_uaccess(const struct exception_table_entry *fixup,

2
drivers/base/regmap/regmap.c
View File

@ -1266,6 +1266,8 @@ err_name:
err_map:
kfree(map);
err:
if (bus && bus->free_on_exit)
kfree(bus);
return ERR_PTR(ret);
}
EXPORT_SYMBOL_GPL(__regmap_init);

4
drivers/block/ublk_drv.c
View File

@ -1391,7 +1391,7 @@ static void ublk_deinit_queues(struct ublk_device *ub)
for (i = 0; i < nr_queues; i++)
ublk_deinit_queue(ub, i);
kfree(ub->__queues);
kvfree(ub->__queues);
}
static int ublk_init_queues(struct ublk_device *ub)
@ -1402,7 +1402,7 @@ static int ublk_init_queues(struct ublk_device *ub)
int i, ret = -ENOMEM;
ub->queue_size = ubq_size;
ub->__queues = kcalloc(nr_queues, ubq_size, GFP_KERNEL);
ub->__queues = kvcalloc(nr_queues, ubq_size, GFP_KERNEL);
if (!ub->__queues)
return ret;

19
drivers/bus/fsl-mc/fsl-mc-bus.c
View File

@ -947,6 +947,7 @@ struct fsl_mc_device *fsl_mc_get_endpoint(struct fsl_mc_device *mc_dev,
struct fsl_mc_obj_desc endpoint_desc = {{ 0 }};
struct dprc_endpoint endpoint1 = {{ 0 }};
struct dprc_endpoint endpoint2 = {{ 0 }};
struct fsl_mc_bus *mc_bus;
int state, err;
mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
@ -970,6 +971,8 @@ struct fsl_mc_device *fsl_mc_get_endpoint(struct fsl_mc_device *mc_dev,
strcpy(endpoint_desc.type, endpoint2.type);
endpoint_desc.id = endpoint2.id;
endpoint = fsl_mc_device_lookup(&endpoint_desc, mc_bus_dev);
if (endpoint)
return endpoint;
/*
* We know that the device has an endpoint because we verified by
@ -977,17 +980,13 @@ struct fsl_mc_device *fsl_mc_get_endpoint(struct fsl_mc_device *mc_dev,
* yet discovered by the fsl-mc bus, thus the lookup returned NULL.
* Force a rescan of the devices in this container and retry the lookup.
*/
if (!endpoint) {
struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
if (mutex_trylock(&mc_bus->scan_mutex)) {
err = dprc_scan_objects(mc_bus_dev, true);
mutex_unlock(&mc_bus->scan_mutex);
}
if (err < 0)
return ERR_PTR(err);
mc_bus = to_fsl_mc_bus(mc_bus_dev);
if (mutex_trylock(&mc_bus->scan_mutex)) {
err = dprc_scan_objects(mc_bus_dev, true);
mutex_unlock(&mc_bus->scan_mutex);
}
if (err < 0)
return ERR_PTR(err);
endpoint = fsl_mc_device_lookup(&endpoint_desc, mc_bus_dev);
/*

4
drivers/char/hw_random/mtk-rng.c
View File

@ -142,7 +142,9 @@ static int mtk_rng_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, priv);
pm_runtime_set_autosuspend_delay(&pdev->dev, RNG_AUTOSUSPEND_TIMEOUT);
pm_runtime_use_autosuspend(&pdev->dev);
devm_pm_runtime_enable(&pdev->dev);
ret = devm_pm_runtime_enable(&pdev->dev);
if (ret)
return ret;
dev_info(&pdev->dev, "registered RNG driver\n");

2
drivers/clk/clk-axi-clkgen.c
View File

@ -118,7 +118,7 @@ static const struct axi_clkgen_limits axi_clkgen_zynqmp_default_limits = {
static const struct axi_clkgen_limits axi_clkgen_zynq_default_limits = {
.fpfd_min = 10000,
.fpfd_max = 300000,
.fpfd_max = 450000,
.fvco_min = 600000,
.fvco_max = 1200000,
};

5
drivers/clk/davinci/psc.c
View File

@ -278,6 +278,11 @@ davinci_lpsc_clk_register(struct device *dev, const char *name,
lpsc->pm_domain.name = devm_kasprintf(dev, GFP_KERNEL, "%s: %s",
best_dev_name(dev), name);
if (!lpsc->pm_domain.name) {
clk_hw_unregister(&lpsc->hw);
kfree(lpsc);
return ERR_PTR(-ENOMEM);
}
lpsc->pm_domain.attach_dev = davinci_psc_genpd_attach_dev;
lpsc->pm_domain.detach_dev = davinci_psc_genpd_detach_dev;
lpsc->pm_domain.flags = GENPD_FLAG_PM_CLK;

3
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
View File

@ -347,8 +347,7 @@ static SUNXI_CCU_GATE(dram_ohci_clk, "dram-ohci", "dram",
static const char * const de_parents[] = { "pll-video", "pll-periph0" };
static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents,
0x104, 0, 4, 24, 2, BIT(31),
CLK_SET_RATE_PARENT);
0x104, 0, 4, 24, 3, BIT(31), 0);
static const char * const tcon_parents[] = { "pll-video" };
static SUNXI_CCU_M_WITH_MUX_GATE(tcon_clk, "tcon", tcon_parents,

4
drivers/clk/xilinx/xlnx_vcu.c
View File

@ -587,8 +587,8 @@ static void xvcu_unregister_clock_provider(struct xvcu_device *xvcu)
xvcu_clk_hw_unregister_leaf(hws[CLK_XVCU_ENC_MCU]);
if (!IS_ERR_OR_NULL(hws[CLK_XVCU_ENC_CORE]))
xvcu_clk_hw_unregister_leaf(hws[CLK_XVCU_ENC_CORE]);
clk_hw_unregister_fixed_factor(xvcu->pll_post);
if (!IS_ERR_OR_NULL(xvcu->pll_post))
clk_hw_unregister_fixed_factor(xvcu->pll_post);
}
/**

2
drivers/comedi/drivers/comedi_test.c
View File

@ -788,7 +788,7 @@ static void waveform_detach(struct comedi_device *dev)
{
struct waveform_private *devpriv = dev->private;
if (devpriv) {
if (devpriv && dev->n_subdevices) {
del_timer_sync(&devpriv->ai_timer);
del_timer_sync(&devpriv->ao_timer);
}

21
drivers/cpufreq/cpufreq.c
View File

@ -1239,6 +1239,8 @@ static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu)
goto err_free_real_cpus;
}
init_rwsem(&policy->rwsem);
freq_constraints_init(&policy->constraints);
policy->nb_min.notifier_call = cpufreq_notifier_min;
@ -1261,7 +1263,6 @@ static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu)
}
INIT_LIST_HEAD(&policy->policy_list);
init_rwsem(&policy->rwsem);
spin_lock_init(&policy->transition_lock);
init_waitqueue_head(&policy->transition_wait);
INIT_WORK(&policy->update, handle_update);
@ -2882,15 +2883,6 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data)
cpufreq_driver = driver_data;
write_unlock_irqrestore(&cpufreq_driver_lock, flags);
/*
* Mark support for the scheduler's frequency invariance engine for
* drivers that implement target(), target_index() or fast_switch().
*/
if (!cpufreq_driver->setpolicy) {
static_branch_enable_cpuslocked(&cpufreq_freq_invariance);
pr_debug("supports frequency invariance");
}
if (driver_data->setpolicy)
driver_data->flags |= CPUFREQ_CONST_LOOPS;
@ -2921,6 +2913,15 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data)
hp_online = ret;
ret = 0;
/*
* Mark support for the scheduler's frequency invariance engine for
* drivers that implement target(), target_index() or fast_switch().
*/
if (!cpufreq_driver->setpolicy) {
static_branch_enable_cpuslocked(&cpufreq_freq_invariance);
pr_debug("supports frequency invariance");
}
pr_debug("driver %s up and running\n", driver_data->name);
goto out;

4
drivers/cpufreq/intel_pstate.c
View File

@ -2867,8 +2867,8 @@ static int intel_cpufreq_update_pstate(struct cpufreq_policy *policy,
int max_pstate = policy->strict_target ?
target_pstate : cpu->max_perf_ratio;
intel_cpufreq_hwp_update(cpu, target_pstate, max_pstate, 0,
fast_switch);
intel_cpufreq_hwp_update(cpu, target_pstate, max_pstate,
target_pstate, fast_switch);
} else if (target_pstate != old_pstate) {
intel_cpufreq_perf_ctl_update(cpu, target_pstate, fast_switch);
}

4
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
View File

@ -260,8 +260,8 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine *engine, void *async_req
}
chan->timeout = areq->cryptlen;
rctx->nr_sgs = nr_sgs;
rctx->nr_sgd = nr_sgd;
rctx->nr_sgs = ns;
rctx->nr_sgd = nd;
return 0;
theend_sgs:

3
drivers/crypto/ccp/ccp-debugfs.c
View File

@ -319,5 +319,8 @@ void ccp5_debugfs_setup(struct ccp_device *ccp)
void ccp5_debugfs_destroy(void)
{
mutex_lock(&ccp_debugfs_lock);
debugfs_remove_recursive(ccp_debugfs_dir);
ccp_debugfs_dir = NULL;
mutex_unlock(&ccp_debugfs_lock);
}

2
drivers/crypto/img-hash.c
View File

@ -436,7 +436,7 @@ static int img_hash_write_via_dma_stop(struct img_hash_dev *hdev)
struct img_hash_request_ctx *ctx = ahash_request_ctx(hdev->req);
if (ctx->flags & DRIVER_FLAGS_SG)
dma_unmap_sg(hdev->dev, ctx->sg, ctx->dma_ct, DMA_TO_DEVICE);
dma_unmap_sg(hdev->dev, ctx->sg, 1, DMA_TO_DEVICE);
return 0;
}

8
drivers/crypto/inside-secure/safexcel_hash.c
View File

@ -249,7 +249,9 @@ static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv,
safexcel_complete(priv, ring);
if (sreq->nents) {
dma_unmap_sg(priv->dev, areq->src, sreq->nents, DMA_TO_DEVICE);
dma_unmap_sg(priv->dev, areq->src,
sg_nents_for_len(areq->src, areq->nbytes),
DMA_TO_DEVICE);
sreq->nents = 0;
}
@ -497,7 +499,9 @@ unmap_result:
DMA_FROM_DEVICE);
unmap_sg:
if (req->nents) {
dma_unmap_sg(priv->dev, areq->src, req->nents, DMA_TO_DEVICE);
dma_unmap_sg(priv->dev, areq->src,
sg_nents_for_len(areq->src, areq->nbytes),
DMA_TO_DEVICE);
req->nents = 0;
}
cdesc_rollback:

8
drivers/crypto/keembay/keembay-ocs-hcu-core.c
View File

@ -68,6 +68,7 @@ struct ocs_hcu_ctx {
* @sg_data_total: Total data in the SG list at any time.
* @sg_data_offset: Offset into the data of the current individual SG node.
* @sg_dma_nents: Number of sg entries mapped in dma_list.
* @nents: Number of entries in the scatterlist.
*/
struct ocs_hcu_rctx {
struct ocs_hcu_dev *hcu_dev;
@ -91,6 +92,7 @@ struct ocs_hcu_rctx {
unsigned int sg_data_total;
unsigned int sg_data_offset;
unsigned int sg_dma_nents;
unsigned int nents;
};
/**
@ -199,7 +201,7 @@ static void kmb_ocs_hcu_dma_cleanup(struct ahash_request *req,
/* Unmap req->src (if mapped). */
if (rctx->sg_dma_nents) {
dma_unmap_sg(dev, req->src, rctx->sg_dma_nents, DMA_TO_DEVICE);
dma_unmap_sg(dev, req->src, rctx->nents, DMA_TO_DEVICE);
rctx->sg_dma_nents = 0;
}
@ -260,6 +262,10 @@ static int kmb_ocs_dma_prepare(struct ahash_request *req)
rc = -ENOMEM;
goto cleanup;
}
/* Save the value of nents to pass to dma_unmap_sg. */
rctx->nents = nents;
/*
* The value returned by dma_map_sg() can be < nents; so update
* nents accordingly.

4
drivers/crypto/marvell/cesa/cipher.c
View File

@ -75,9 +75,12 @@ mv_cesa_skcipher_dma_cleanup(struct skcipher_request *req)
static inline void mv_cesa_skcipher_cleanup(struct skcipher_request *req)
{
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
struct mv_cesa_engine *engine = creq->base.engine;
if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ)
mv_cesa_skcipher_dma_cleanup(req);
atomic_sub(req->cryptlen, &engine->load);
}
static void mv_cesa_skcipher_std_step(struct skcipher_request *req)
@ -212,7 +215,6 @@ mv_cesa_skcipher_complete(struct crypto_async_request *req)
struct mv_cesa_engine *engine = creq->base.engine;
unsigned int ivsize;
atomic_sub(skreq->cryptlen, &engine->load);
ivsize = crypto_skcipher_ivsize(crypto_skcipher_reqtfm(skreq));
if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ) {

5
drivers/crypto/marvell/cesa/hash.c
View File

@ -110,9 +110,12 @@ static inline void mv_cesa_ahash_dma_cleanup(struct ahash_request *req)
static inline void mv_cesa_ahash_cleanup(struct ahash_request *req)
{
struct mv_cesa_ahash_req *creq = ahash_request_ctx(req);
struct mv_cesa_engine *engine = creq->base.engine;
if (mv_cesa_req_get_type(&creq->base) == CESA_DMA_REQ)
mv_cesa_ahash_dma_cleanup(req);
atomic_sub(req->nbytes, &engine->load);
}
static void mv_cesa_ahash_last_cleanup(struct ahash_request *req)
@ -395,8 +398,6 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
}
}
}
atomic_sub(ahashreq->nbytes, &engine->load);
}
static void mv_cesa_ahash_prepare(struct crypto_async_request *req,

4
drivers/crypto/qat/qat_common/adf_transport_debug.c
View File

@ -31,8 +31,10 @@ static void *adf_ring_next(struct seq_file *sfile, void *v, loff_t *pos)
struct adf_etr_ring_data *ring = sfile->private;
if (*pos >= (ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size) /
ADF_MSG_SIZE_TO_BYTES(ring->msg_size)))
ADF_MSG_SIZE_TO_BYTES(ring->msg_size))) {
(*pos)++;
return NULL;
}
return ring->base_addr +
(ADF_MSG_SIZE_TO_BYTES(ring->msg_size) * (*pos)++);

10
drivers/devfreq/devfreq.c
View File

@ -1381,15 +1381,11 @@ int devfreq_remove_governor(struct devfreq_governor *governor)
int ret;
struct device *dev = devfreq->dev.parent;
if (!devfreq->governor)
continue;
if (!strncmp(devfreq->governor->name, governor->name,
DEVFREQ_NAME_LEN)) {
/* we should have a devfreq governor! */
if (!devfreq->governor) {
dev_warn(dev, "%s: Governor %s NOT present\n",
__func__, governor->name);
continue;
/* Fall through */
}
ret = devfreq->governor->event_handler(devfreq,
DEVFREQ_GOV_STOP, NULL);
if (ret) {

21
drivers/dma/mv_xor.c
View File

@ -1061,8 +1061,16 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
*/
mv_chan->dummy_src_addr = dma_map_single(dma_dev->dev,
mv_chan->dummy_src, MV_XOR_MIN_BYTE_COUNT, DMA_FROM_DEVICE);
if (dma_mapping_error(dma_dev->dev, mv_chan->dummy_src_addr))
return ERR_PTR(-ENOMEM);
mv_chan->dummy_dst_addr = dma_map_single(dma_dev->dev,
mv_chan->dummy_dst, MV_XOR_MIN_BYTE_COUNT, DMA_TO_DEVICE);
if (dma_mapping_error(dma_dev->dev, mv_chan->dummy_dst_addr)) {
ret = -ENOMEM;
goto err_unmap_src;
}
/* allocate coherent memory for hardware descriptors
* note: writecombine gives slightly better performance, but
@ -1071,8 +1079,10 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
mv_chan->dma_desc_pool_virt =
dma_alloc_wc(&pdev->dev, MV_XOR_POOL_SIZE, &mv_chan->dma_desc_pool,
GFP_KERNEL);
if (!mv_chan->dma_desc_pool_virt)
return ERR_PTR(-ENOMEM);
if (!mv_chan->dma_desc_pool_virt) {
ret = -ENOMEM;
goto err_unmap_dst;
}
/* discover transaction capabilites from the platform data */
dma_dev->cap_mask = cap_mask;
@ -1155,6 +1165,13 @@ err_free_irq:
err_free_dma:
dma_free_coherent(&pdev->dev, MV_XOR_POOL_SIZE,
mv_chan->dma_desc_pool_virt, mv_chan->dma_desc_pool);
err_unmap_dst:
dma_unmap_single(dma_dev->dev, mv_chan->dummy_dst_addr,
MV_XOR_MIN_BYTE_COUNT, DMA_TO_DEVICE);
err_unmap_src:
dma_unmap_single(dma_dev->dev, mv_chan->dummy_src_addr,
MV_XOR_MIN_BYTE_COUNT, DMA_FROM_DEVICE);
return ERR_PTR(ret);
}

13
drivers/dma/nbpfaxi.c
View File

@ -712,6 +712,9 @@ static int nbpf_desc_page_alloc(struct nbpf_channel *chan)
list_add_tail(&ldesc->node, &lhead);
ldesc->hwdesc_dma_addr = dma_map_single(dchan->device->dev,
hwdesc, sizeof(*hwdesc), DMA_TO_DEVICE);
if (dma_mapping_error(dchan->device->dev,
ldesc->hwdesc_dma_addr))
goto unmap_error;
dev_dbg(dev, "%s(): mapped 0x%p to %pad\n", __func__,
hwdesc, &ldesc->hwdesc_dma_addr);
@ -738,6 +741,16 @@ static int nbpf_desc_page_alloc(struct nbpf_channel *chan)
spin_unlock_irq(&chan->lock);
return ARRAY_SIZE(dpage->desc);
unmap_error:
while (i--) {
ldesc--; hwdesc--;
dma_unmap_single(dchan->device->dev, ldesc->hwdesc_dma_addr,
sizeof(hwdesc), DMA_TO_DEVICE);
}
return -ENOMEM;
}
static void nbpf_desc_put(struct nbpf_desc *desc)

47
drivers/gpu/drm/amd/amdkfd/kfd_svm.c
View File

@ -1076,13 +1076,12 @@ svm_range_split_head(struct svm_range *prange,
}
static void
svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
struct svm_range *pchild, enum svm_work_list_ops op)
svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op)
{
pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
pchild, pchild->start, pchild->last, prange, op);
pchild->work_item.mm = mm;
pchild->work_item.mm = NULL;
pchild->work_item.op = op;
list_add_tail(&pchild->child_list, &prange->child_list);
}
@ -1128,14 +1127,14 @@ svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm,
r = svm_range_split(prange, start, prange->last, &head);
if (r)
return r;
svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE);
svm_range_add_child(parent, head, SVM_OP_ADD_RANGE);
}
if (last < prange->last) {
r = svm_range_split(prange, prange->start, last, &tail);
if (r)
return r;
svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE);
}
/* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */
@ -2265,15 +2264,17 @@ svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
prange->work_item.op != SVM_OP_UNMAP_RANGE)
prange->work_item.op = op;
} else {
prange->work_item.op = op;
/* Pairs with mmput in deferred_list_work */
mmget(mm);
prange->work_item.mm = mm;
list_add_tail(&prange->deferred_list,
&prange->svms->deferred_range_list);
pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
prange, prange->start, prange->last, op);
/* Pairs with mmput in deferred_list_work.
* If process is exiting and mm is gone, don't update mmu notifier.
*/
if (mmget_not_zero(mm)) {
prange->work_item.mm = mm;
prange->work_item.op = op;
list_add_tail(&prange->deferred_list,
&prange->svms->deferred_range_list);
pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
prange, prange->start, prange->last, op);
}
}
spin_unlock(&svms->deferred_list_lock);
}
@ -2287,8 +2288,7 @@ void schedule_deferred_list_work(struct svm_range_list *svms)
}
static void
svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
struct svm_range *prange, unsigned long start,
svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start,
unsigned long last)
{
struct svm_range *head;
@ -2309,12 +2309,12 @@ svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
svm_range_split(tail, last + 1, tail->last, &head);
if (head != prange && tail != prange) {
svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE);
svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE);
} else if (tail != prange) {
svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE);
} else if (head != prange) {
svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE);
} else if (parent != prange) {
prange->work_item.op = SVM_OP_UNMAP_RANGE;
}
@ -2353,14 +2353,14 @@ svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
l = min(last, pchild->last);
if (l >= s)
svm_range_unmap_from_gpus(pchild, s, l, trigger);
svm_range_unmap_split(mm, prange, pchild, start, last);
svm_range_unmap_split(prange, pchild, start, last);
mutex_unlock(&pchild->lock);
}
s = max(start, prange->start);
l = min(last, prange->last);
if (l >= s)
svm_range_unmap_from_gpus(prange, s, l, trigger);
svm_range_unmap_split(mm, prange, prange, start, last);
svm_range_unmap_split(prange, prange, start, last);
if (unmap_parent)
svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
@ -2403,8 +2403,6 @@ svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
if (range->event == MMU_NOTIFY_RELEASE)
return true;
if (!mmget_not_zero(mni->mm))
return true;
start = mni->interval_tree.start;
last = mni->interval_tree.last;
@ -2431,7 +2429,6 @@ svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
}
svm_range_unlock(prange);
mmput(mni->mm);
return true;
}

2
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c
View File

@ -149,7 +149,7 @@ int phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr,
}
cgs_write_register(hwmgr->device, indirect_port, index);
return phm_wait_on_register(hwmgr, indirect_port + 1, mask, value);
return phm_wait_on_register(hwmgr, indirect_port + 1, value, mask);
}
int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr,

2
drivers/gpu/drm/bridge/ti-sn65dsi86.c
View File

@ -1333,7 +1333,7 @@ static int ti_sn_bridge_probe(struct auxiliary_device *adev,
regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG,
HPD_DISABLE, 0);
mutex_unlock(&pdata->comms_mutex);
};
}
drm_bridge_add(&pdata->bridge);

6
drivers/gpu/drm/i915/display/intel_dp.c
View File

@ -1139,6 +1139,12 @@ int intel_dp_rate_select(struct intel_dp *intel_dp, int rate)
void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
u8 *link_bw, u8 *rate_select)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
/* FIXME g4x can't generate an exact 2.7GHz with the 96MHz non-SSC refclk */
if (IS_G4X(i915) && port_clock == 268800)
port_clock = 270000;
/* eDP 1.4 rate select method. */
if (intel_dp->use_rate_select) {
*link_bw = 0;

9
drivers/gpu/drm/rockchip/rockchip_drm_fb.c
View File

@ -82,16 +82,9 @@ rockchip_fb_create(struct drm_device *dev, struct drm_file *file,
}
if (drm_is_afbc(mode_cmd->modifier[0])) {
int ret, i;
ret = drm_gem_fb_afbc_init(dev, mode_cmd, afbc_fb);
if (ret) {
struct drm_gem_object **obj = afbc_fb->base.obj;
for (i = 0; i < info->num_planes; ++i)
drm_gem_object_put(obj[i]);
kfree(afbc_fb);
drm_framebuffer_put(&afbc_fb->base);
return ERR_PTR(ret);
}
}

4
drivers/i2c/busses/i2c-qup.c
View File

@ -452,8 +452,10 @@ static int qup_i2c_bus_active(struct qup_i2c_dev *qup, int len)
if (!(status & I2C_STATUS_BUS_ACTIVE))
break;
if (time_after(jiffies, timeout))
if (time_after(jiffies, timeout)) {
ret = -ETIMEDOUT;
break;
}
usleep_range(len, len * 2);
}

24
drivers/i2c/busses/i2c-tegra.c
View File

@ -623,7 +623,6 @@ static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev)
static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
{
u32 val, clk_divisor, clk_multiplier, tsu_thd, tlow, thigh, non_hs_mode;
acpi_handle handle = ACPI_HANDLE(i2c_dev->dev);
struct i2c_timings *t = &i2c_dev->timings;
int err;
@ -635,11 +634,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
* emit a noisy warning on error, which won't stay unnoticed and
* won't hose machine entirely.
*/
if (handle)
err = acpi_evaluate_object(handle, "_RST", NULL, NULL);
else
err = reset_control_reset(i2c_dev->rst);
err = device_reset(i2c_dev->dev);
WARN_ON_ONCE(err);
if (IS_DVC(i2c_dev))
@ -1696,19 +1691,6 @@ static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev)
i2c_dev->is_vi = true;
}
static int tegra_i2c_init_reset(struct tegra_i2c_dev *i2c_dev)
{
if (ACPI_HANDLE(i2c_dev->dev))
return 0;
i2c_dev->rst = devm_reset_control_get_exclusive(i2c_dev->dev, "i2c");
if (IS_ERR(i2c_dev->rst))
return dev_err_probe(i2c_dev->dev, PTR_ERR(i2c_dev->rst),
"failed to get reset control\n");
return 0;
}
static int tegra_i2c_init_clocks(struct tegra_i2c_dev *i2c_dev)
{
int err;
@ -1818,10 +1800,6 @@ static int tegra_i2c_probe(struct platform_device *pdev)
tegra_i2c_parse_dt(i2c_dev);
err = tegra_i2c_init_reset(i2c_dev);
if (err)
return err;
err = tegra_i2c_init_clocks(i2c_dev);
if (err)
return err;

15
drivers/i2c/busses/i2c-virtio.c
View File

@ -116,15 +116,16 @@ static int virtio_i2c_complete_reqs(struct virtqueue *vq,
for (i = 0; i < num; i++) {
struct virtio_i2c_req *req = &reqs[i];
wait_for_completion(&req->completion);
if (!failed && req->in_hdr.status != VIRTIO_I2C_MSG_OK)
failed = true;
if (!failed) {
if (wait_for_completion_interruptible(&req->completion))
failed = true;
else if (req->in_hdr.status != VIRTIO_I2C_MSG_OK)
failed = true;
else
j++;
}
i2c_put_dma_safe_msg_buf(reqs[i].buf, &msgs[i], !failed);
if (!failed)
j++;
}
return j;

7
drivers/iio/adc/ad7949.c
View File

@ -308,7 +308,6 @@ static void ad7949_disable_reg(void *reg)
static int ad7949_spi_probe(struct spi_device *spi)
{
u32 spi_ctrl_mask = spi->controller->bits_per_word_mask;
struct device *dev = &spi->dev;
const struct ad7949_adc_spec *spec;
struct ad7949_adc_chip *ad7949_adc;
@ -337,11 +336,11 @@ static int ad7949_spi_probe(struct spi_device *spi)
ad7949_adc->resolution = spec->resolution;
/* Set SPI bits per word */
if (spi_ctrl_mask & SPI_BPW_MASK(ad7949_adc->resolution)) {
if (spi_is_bpw_supported(spi, ad7949_adc->resolution)) {
spi->bits_per_word = ad7949_adc->resolution;
} else if (spi_ctrl_mask == SPI_BPW_MASK(16)) {
} else if (spi_is_bpw_supported(spi, 16)) {
spi->bits_per_word = 16;
} else if (spi_ctrl_mask == SPI_BPW_MASK(8)) {
} else if (spi_is_bpw_supported(spi, 8)) {
spi->bits_per_word = 8;
} else {
dev_err(dev, "unable to find common BPW with spi controller\n");

4
drivers/infiniband/core/cache.c
View File

@ -582,8 +582,8 @@ static int __ib_cache_gid_add(struct ib_device *ib_dev, u32 port,
out_unlock:
mutex_unlock(&table->lock);
if (ret)
pr_warn("%s: unable to add gid %pI6 error=%d\n",
__func__, gid->raw, ret);
pr_warn_ratelimited("%s: unable to add gid %pI6 error=%d\n",
__func__, gid->raw, ret);
return ret;
}

15
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
View File

@ -5331,11 +5331,10 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp,
{
struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device);
struct hns_roce_qp *hr_qp = to_hr_qp(ibqp);
struct hns_roce_v2_qp_context ctx[2];
struct hns_roce_v2_qp_context *context = ctx;
struct hns_roce_v2_qp_context *qpc_mask = ctx + 1;
struct hns_roce_v2_qp_context *context;
struct hns_roce_v2_qp_context *qpc_mask;
struct ib_device *ibdev = &hr_dev->ib_dev;
int ret;
int ret = -ENOMEM;
if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
return -EOPNOTSUPP;
@ -5346,7 +5345,11 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp,
* we should set all bits of the relevant fields in context mask to
* 0 at the same time, else set them to 0x1.
*/
memset(context, 0, hr_dev->caps.qpc_sz);
context = kvzalloc(sizeof(*context), GFP_KERNEL);
qpc_mask = kvzalloc(sizeof(*qpc_mask), GFP_KERNEL);
if (!context || !qpc_mask)
goto out;
memset(qpc_mask, 0xff, hr_dev->caps.qpc_sz);
ret = hns_roce_v2_set_abs_fields(ibqp, attr, attr_mask, cur_state,
@ -5388,6 +5391,8 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp,
clear_qp(hr_qp);
out:
kvfree(qpc_mask);
kvfree(context);
return ret;
}

2
drivers/infiniband/hw/mlx5/dm.c
View File

@ -282,7 +282,7 @@ static struct ib_dm *handle_alloc_dm_memic(struct ib_ucontext *ctx,
int err;
u64 address;
if (!MLX5_CAP_DEV_MEM(dm_db->dev, memic))
if (!dm_db || !MLX5_CAP_DEV_MEM(dm_db->dev, memic))
return ERR_PTR(-EOPNOTSUPP);
dm = kzalloc(sizeof(*dm), GFP_KERNEL);

4
drivers/input/keyboard/gpio_keys.c
View File

@ -495,7 +495,7 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id)
if (bdata->release_delay)
hrtimer_start(&bdata->release_timer,
ms_to_ktime(bdata->release_delay),
HRTIMER_MODE_REL_HARD);
HRTIMER_MODE_REL);
out:
spin_unlock_irqrestore(&bdata->lock, flags);
return IRQ_HANDLED;
@ -635,7 +635,7 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
bdata->release_delay = button->debounce_interval;
hrtimer_init(&bdata->release_timer,
CLOCK_REALTIME, HRTIMER_MODE_REL_HARD);
CLOCK_REALTIME, HRTIMER_MODE_REL);
bdata->release_timer.function = gpio_keys_irq_timer;
isr = gpio_keys_irq_isr;

1
drivers/interconnect/qcom/sc7280.c
View File

@ -164,6 +164,7 @@ static struct qcom_icc_node xm_pcie3_1 = {
.id = SC7280_MASTER_PCIE_1,
.channels = 1,
.buswidth = 8,
.num_links = 1,
.links = { SC7280_SLAVE_ANOC_PCIE_GEM_NOC },
};

6
drivers/interconnect/qcom/sc8180x.c
View File

@ -1507,22 +1507,26 @@ static struct qcom_icc_bcm bcm_sh3 = {
static struct qcom_icc_bcm bcm_sn0 = {
.name = "SN0",
.num_nodes = 1,
.nodes = { &slv_qns_gemnoc_sf }
};
static struct qcom_icc_bcm bcm_sn1 = {
.name = "SN1",
.num_nodes = 1,
.nodes = { &slv_qxs_imem }
};
static struct qcom_icc_bcm bcm_sn2 = {
.name = "SN2",
.keepalive = true,
.num_nodes = 1,
.nodes = { &slv_qns_gemnoc_gc }
};
static struct qcom_icc_bcm bcm_co2 = {
.name = "CO2",
.num_nodes = 1,
.nodes = { &mas_qnm_npu }
};
@ -1534,12 +1538,14 @@ static struct qcom_icc_bcm bcm_ip0 = {
static struct qcom_icc_bcm bcm_sn3 = {
.name = "SN3",
.keepalive = true,
.num_nodes = 2,
.nodes = { &slv_srvc_aggre1_noc,
&slv_qns_cnoc }
};
static struct qcom_icc_bcm bcm_sn4 = {
.name = "SN4",
.num_nodes = 1,
.nodes = { &slv_qxs_pimem }
};

1
drivers/interconnect/qcom/sc8280xp.c
View File

@ -47,6 +47,7 @@ static struct qcom_icc_node qnm_a1noc_cfg = {
.id = SC8280XP_MASTER_A1NOC_CFG,
.channels = 1,
.buswidth = 4,
.num_links = 1,
.links = { SC8280XP_SLAVE_SERVICE_A1NOC },
};

1
drivers/irqchip/Kconfig
View File

@ -486,6 +486,7 @@ config IMX_MU_MSI
tristate "i.MX MU used as MSI controller"
depends on OF && HAS_IOMEM
depends on ARCH_MXC || COMPILE_TEST
depends on ARM || ARM64
default m if ARCH_MXC
select IRQ_DOMAIN
select IRQ_DOMAIN_HIERARCHY

8
drivers/media/v4l2-core/v4l2-ctrls-core.c
View File

@ -651,12 +651,12 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx,
p_h264_sps->flags &=
~V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS;
if (p_h264_sps->chroma_format_idc < 3)
p_h264_sps->flags &=
~V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE;
}
if (p_h264_sps->chroma_format_idc < 3)
p_h264_sps->flags &=
~V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE;
if (p_h264_sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)
p_h264_sps->flags &=
~V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD;

2
drivers/mtd/ftl.c
View File

@ -344,7 +344,7 @@ static int erase_xfer(partition_t *part,
return -ENOMEM;
erase->addr = xfer->Offset;
erase->len = 1 << part->header.EraseUnitSize;
erase->len = 1ULL << part->header.EraseUnitSize;
ret = mtd_erase(part->mbd.mtd, erase);
if (!ret) {

2
drivers/mtd/nand/raw/atmel/nand-controller.c
View File

@ -373,7 +373,7 @@ static int atmel_nand_dma_transfer(struct atmel_nand_controller *nc,
dma_cookie_t cookie;
buf_dma = dma_map_single(nc->dev, buf, len, dir);
if (dma_mapping_error(nc->dev, dev_dma)) {
if (dma_mapping_error(nc->dev, buf_dma)) {
dev_err(nc->dev,
"Failed to prepare a buffer for DMA access\n");
goto err;

6
drivers/mtd/nand/raw/atmel/pmecc.c
View File

@ -143,6 +143,7 @@ struct atmel_pmecc_caps {
int nstrengths;
int el_offset;
bool correct_erased_chunks;
bool clk_ctrl;
};
struct atmel_pmecc {
@ -843,6 +844,10 @@ static struct atmel_pmecc *atmel_pmecc_create(struct platform_device *pdev,
if (IS_ERR(pmecc->regs.errloc))
return ERR_CAST(pmecc->regs.errloc);
/* pmecc data setup time */
if (caps->clk_ctrl)
writel(PMECC_CLK_133MHZ, pmecc->regs.base + ATMEL_PMECC_CLK);
/* Disable all interrupts before registering the PMECC handler. */
writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR);
atmel_pmecc_reset(pmecc);
@ -896,6 +901,7 @@ static struct atmel_pmecc_caps at91sam9g45_caps = {
.strengths = atmel_pmecc_strengths,
.nstrengths = 5,
.el_offset = 0x8c,
.clk_ctrl = true,
};
static struct atmel_pmecc_caps sama5d4_caps = {

15
drivers/mtd/nand/raw/rockchip-nand-controller.c
View File

@ -657,9 +657,16 @@ static int rk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf,
dma_data = dma_map_single(nfc->dev, (void *)nfc->page_buf,
mtd->writesize, DMA_TO_DEVICE);
if (dma_mapping_error(nfc->dev, dma_data))
return -ENOMEM;
dma_oob = dma_map_single(nfc->dev, nfc->oob_buf,
ecc->steps * oob_step,
DMA_TO_DEVICE);
if (dma_mapping_error(nfc->dev, dma_oob)) {
dma_unmap_single(nfc->dev, dma_data, mtd->writesize, DMA_TO_DEVICE);
return -ENOMEM;
}
reinit_completion(&nfc->done);
writel(INT_DMA, nfc->regs + nfc->cfg->int_en_off);
@ -773,9 +780,17 @@ static int rk_nfc_read_page_hwecc(struct nand_chip *chip, u8 *buf, int oob_on,
dma_data = dma_map_single(nfc->dev, nfc->page_buf,
mtd->writesize,
DMA_FROM_DEVICE);
if (dma_mapping_error(nfc->dev, dma_data))
return -ENOMEM;
dma_oob = dma_map_single(nfc->dev, nfc->oob_buf,
ecc->steps * oob_step,
DMA_FROM_DEVICE);
if (dma_mapping_error(nfc->dev, dma_oob)) {
dma_unmap_single(nfc->dev, dma_data, mtd->writesize,
DMA_FROM_DEVICE);
return -ENOMEM;
}
/*
* The first blocks (4, 8 or 16 depending on the device)

31
drivers/net/can/dev/dev.c
View File

@ -125,13 +125,16 @@ void can_change_state(struct net_device *dev, struct can_frame *cf,
EXPORT_SYMBOL_GPL(can_change_state);
/* CAN device restart for bus-off recovery */
static void can_restart(struct net_device *dev)
static int can_restart(struct net_device *dev)
{
struct can_priv *priv = netdev_priv(dev);
struct sk_buff *skb;
struct can_frame *cf;
int err;
if (!priv->do_set_mode)
return -EOPNOTSUPP;
if (netif_carrier_ok(dev))
netdev_err(dev, "Attempt to restart for bus-off recovery, but carrier is OK?\n");
@ -142,24 +145,25 @@ static void can_restart(struct net_device *dev)
/* send restart message upstream */
skb = alloc_can_err_skb(dev, &cf);
if (!skb)
goto restart;
cf->can_id |= CAN_ERR_RESTARTED;
netif_rx(skb);
restart:
netdev_dbg(dev, "restarted\n");
priv->can_stats.restarts++;
if (skb) {
cf->can_id |= CAN_ERR_RESTARTED;
netif_rx(skb);
}
/* Now restart the device */
netif_carrier_on(dev);
err = priv->do_set_mode(dev, CAN_MODE_START);
if (err) {
netdev_err(dev, "Error %d during restart", err);
netdev_err(dev, "Restart failed, error %pe\n", ERR_PTR(err));
netif_carrier_off(dev);
return err;
} else {
netdev_dbg(dev, "Restarted\n");
priv->can_stats.restarts++;
}
return 0;
}
static void can_restart_work(struct work_struct *work)
@ -184,9 +188,8 @@ int can_restart_now(struct net_device *dev)
return -EBUSY;
cancel_delayed_work_sync(&priv->restart_work);
can_restart(dev);
return 0;
return can_restart(dev);
}
/* CAN bus-off

12
drivers/net/can/dev/netlink.c
View File

@ -252,6 +252,12 @@ static int can_changelink(struct net_device *dev, struct nlattr *tb[],
}
if (data[IFLA_CAN_RESTART_MS]) {
if (!priv->do_set_mode) {
NL_SET_ERR_MSG(extack,
"Device doesn't support restart from Bus Off");
return -EOPNOTSUPP;
}
/* Do not allow changing restart delay while running */
if (dev->flags & IFF_UP)
return -EBUSY;
@ -259,6 +265,12 @@ static int can_changelink(struct net_device *dev, struct nlattr *tb[],
}
if (data[IFLA_CAN_RESTART]) {
if (!priv->do_set_mode) {
NL_SET_ERR_MSG(extack,
"Device doesn't support restart from Bus Off");
return -EOPNOTSUPP;
}
/* Do not allow a restart while not running */
if (!(dev->flags & IFF_UP))
return -EINVAL;

1
drivers/net/can/kvaser_pciefd.c
View File

@ -966,6 +966,7 @@ static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie)
can->err_rep_cnt = 0;
can->bec.txerr = 0;
can->bec.rxerr = 0;
can->can.dev->dev_port = i;
init_completion(&can->start_comp);
init_completion(&can->flush_comp);

1
drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c
View File

@ -858,6 +858,7 @@ static int kvaser_usb_init_one(struct kvaser_usb *dev, int channel)
}
SET_NETDEV_DEV(netdev, &dev->intf->dev);
netdev->dev_id = channel;
netdev->dev_port = channel;
dev->nets[channel] = priv;

17
drivers/net/can/usb/peak_usb/pcan_usb_fd.c
View File

@ -49,7 +49,7 @@ struct __packed pcan_ufd_fw_info {
__le32 ser_no; /* S/N */
__le32 flags; /* special functions */
/* extended data when type == PCAN_USBFD_TYPE_EXT */
/* extended data when type >= PCAN_USBFD_TYPE_EXT */
u8 cmd_out_ep; /* ep for cmd */
u8 cmd_in_ep; /* ep for replies */
u8 data_out_ep[2]; /* ep for CANx TX */
@ -939,10 +939,11 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)
dev->can.ctrlmode |= CAN_CTRLMODE_FD_NON_ISO;
}
/* if vendor rsp is of type 2, then it contains EP numbers to
* use for cmds pipes. If not, then default EP should be used.
/* if vendor rsp type is greater than or equal to 2, then it
* contains EP numbers to use for cmds pipes. If not, then
* default EP should be used.
*/
if (fw_info->type != cpu_to_le16(PCAN_USBFD_TYPE_EXT)) {
if (le16_to_cpu(fw_info->type) < PCAN_USBFD_TYPE_EXT) {
fw_info->cmd_out_ep = PCAN_USBPRO_EP_CMDOUT;
fw_info->cmd_in_ep = PCAN_USBPRO_EP_CMDIN;
}
@ -975,11 +976,11 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)
dev->device_number =
le32_to_cpu(pdev->usb_if->fw_info.dev_id[dev->ctrl_idx]);
/* if vendor rsp is of type 2, then it contains EP numbers to
* use for data pipes. If not, then statically defined EP are used
* (see peak_usb_create_dev()).
/* if vendor rsp type is greater than or equal to 2, then it contains EP
* numbers to use for data pipes. If not, then statically defined EP are
* used (see peak_usb_create_dev()).
*/
if (fw_info->type == cpu_to_le16(PCAN_USBFD_TYPE_EXT)) {
if (le16_to_cpu(fw_info->type) >= PCAN_USBFD_TYPE_EXT) {
dev->ep_msg_in = fw_info->data_in_ep;
dev->ep_msg_out = fw_info->data_out_ep[dev->ctrl_idx];
}

2
drivers/net/ethernet/emulex/benet/be_cmds.c
View File

@ -3851,8 +3851,8 @@ int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
status = be_mcc_notify_wait(adapter);
err:
dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
spin_unlock_bh(&adapter->mcc_lock);
dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
return status;
}

15
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
View File

@ -4446,12 +4446,19 @@ static int dpaa2_eth_connect_mac(struct dpaa2_eth_priv *priv)
if (PTR_ERR(dpmac_dev) == -EPROBE_DEFER)
return PTR_ERR(dpmac_dev);
if (IS_ERR(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)
if (IS_ERR(dpmac_dev))
return 0;
if (dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type) {
err = 0;
goto out_put_device;
}
mac = kzalloc(sizeof(struct dpaa2_mac), GFP_KERNEL);
if (!mac)
return -ENOMEM;
if (!mac) {
err = -ENOMEM;
goto out_put_device;
}
mac->mc_dev = dpmac_dev;
mac->mc_io = priv->mc_io;
@ -4478,6 +4485,8 @@ err_close_mac:
priv->mac = NULL;
err_free_mac:
kfree(mac);
out_put_device:
put_device(&dpmac_dev->dev);
return err;
}

15
drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c
View File

@ -1439,12 +1439,19 @@ static int dpaa2_switch_port_connect_mac(struct ethsw_port_priv *port_priv)
if (PTR_ERR(dpmac_dev) == -EPROBE_DEFER)
return PTR_ERR(dpmac_dev);
if (IS_ERR(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)
if (IS_ERR(dpmac_dev))
return 0;
if (dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type) {
err = 0;
goto out_put_device;
}
mac = kzalloc(sizeof(*mac), GFP_KERNEL);
if (!mac)
return -ENOMEM;
if (!mac) {
err = -ENOMEM;
goto out_put_device;
}
mac->mc_dev = dpmac_dev;
mac->mc_io = port_priv->ethsw_data->mc_io;
@ -1472,6 +1479,8 @@ err_close_mac:
port_priv->mac = NULL;
err_free_mac:
kfree(mac);
out_put_device:
put_device(&dpmac_dev->dev);
return err;
}

67
drivers/net/ethernet/google/gve/gve_main.c
View File

@ -1124,49 +1124,56 @@ static void gve_turnup(struct gve_priv *priv)
gve_set_napi_enabled(priv);
}
static void gve_tx_timeout(struct net_device *dev, unsigned int txqueue)
static struct gve_notify_block *gve_get_tx_notify_block(struct gve_priv *priv,
unsigned int txqueue)
{
struct gve_notify_block *block;
struct gve_tx_ring *tx = NULL;
struct gve_priv *priv;
u32 last_nic_done;
u32 current_time;
u32 ntfy_idx;
netdev_info(dev, "Timeout on tx queue, %d", txqueue);
priv = netdev_priv(dev);
if (txqueue > priv->tx_cfg.num_queues)
goto reset;
return NULL;
ntfy_idx = gve_tx_idx_to_ntfy(priv, txqueue);
if (ntfy_idx >= priv->num_ntfy_blks)
goto reset;
return NULL;
block = &priv->ntfy_blocks[ntfy_idx];
tx = block->tx;
return &priv->ntfy_blocks[ntfy_idx];
}
static bool gve_tx_timeout_try_q_kick(struct gve_priv *priv,
unsigned int txqueue)
{
struct gve_notify_block *block;
u32 current_time;
block = gve_get_tx_notify_block(priv, txqueue);
if (!block)
return false;
current_time = jiffies_to_msecs(jiffies);
if (tx->last_kick_msec + MIN_TX_TIMEOUT_GAP > current_time)
goto reset;
if (block->tx->last_kick_msec + MIN_TX_TIMEOUT_GAP > current_time)
return false;
/* Check to see if there are missed completions, which will allow us to
* kick the queue.
*/
last_nic_done = gve_tx_load_event_counter(priv, tx);
if (last_nic_done - tx->done) {
netdev_info(dev, "Kicking queue %d", txqueue);
iowrite32be(GVE_IRQ_MASK, gve_irq_doorbell(priv, block));
napi_schedule(&block->napi);
tx->last_kick_msec = current_time;
goto out;
} // Else reset.
netdev_info(priv->dev, "Kicking queue %d", txqueue);
napi_schedule(&block->napi);
block->tx->last_kick_msec = current_time;
return true;
}
reset:
gve_schedule_reset(priv);
static void gve_tx_timeout(struct net_device *dev, unsigned int txqueue)
{
struct gve_notify_block *block;
struct gve_priv *priv;
out:
if (tx)
tx->queue_timeout++;
netdev_info(dev, "Timeout on tx queue, %d", txqueue);
priv = netdev_priv(dev);
if (!gve_tx_timeout_try_q_kick(priv, txqueue))
gve_schedule_reset(priv);
block = gve_get_tx_notify_block(priv, txqueue);
if (block)
block->tx->queue_timeout++;
priv->tx_timeo_cnt++;
}

36
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
View File

@ -9599,33 +9599,36 @@ static bool hclge_need_enable_vport_vlan_filter(struct hclge_vport *vport)
return false;
}
int hclge_enable_vport_vlan_filter(struct hclge_vport *vport, bool request_en)
static int __hclge_enable_vport_vlan_filter(struct hclge_vport *vport,
bool request_en)
{
struct hclge_dev *hdev = vport->back;
bool need_en;
int ret;
mutex_lock(&hdev->vport_lock);
vport->req_vlan_fltr_en = request_en;
need_en = hclge_need_enable_vport_vlan_filter(vport);
if (need_en == vport->cur_vlan_fltr_en) {
mutex_unlock(&hdev->vport_lock);
if (need_en == vport->cur_vlan_fltr_en)
return 0;
}
ret = hclge_set_vport_vlan_filter(vport, need_en);
if (ret) {
mutex_unlock(&hdev->vport_lock);
if (ret)
return ret;
}
vport->cur_vlan_fltr_en = need_en;
return 0;
}
int hclge_enable_vport_vlan_filter(struct hclge_vport *vport, bool request_en)
{
struct hclge_dev *hdev = vport->back;
int ret;
mutex_lock(&hdev->vport_lock);
vport->req_vlan_fltr_en = request_en;
ret = __hclge_enable_vport_vlan_filter(vport, request_en);
mutex_unlock(&hdev->vport_lock);
return 0;
return ret;
}
static int hclge_enable_vlan_filter(struct hnae3_handle *handle, bool enable)
@ -10646,16 +10649,19 @@ static void hclge_sync_vlan_fltr_state(struct hclge_dev *hdev)
&vport->state))
continue;
ret = hclge_enable_vport_vlan_filter(vport,
vport->req_vlan_fltr_en);
mutex_lock(&hdev->vport_lock);
ret = __hclge_enable_vport_vlan_filter(vport,
vport->req_vlan_fltr_en);
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to sync vlan filter state for vport%u, ret = %d\n",
vport->vport_id, ret);
set_bit(HCLGE_VPORT_STATE_VLAN_FLTR_CHANGE,
&vport->state);
mutex_unlock(&hdev->vport_lock);
return;
}
mutex_unlock(&hdev->vport_lock);
}
}

9
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
View File

@ -509,14 +509,14 @@ int hclge_ptp_init(struct hclge_dev *hdev)
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to init freq, ret = %d\n", ret);
goto out;
goto out_clear_int;
}
ret = hclge_ptp_set_ts_mode(hdev, &hdev->ptp->ts_cfg);
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to init ts mode, ret = %d\n", ret);
goto out;
goto out_clear_int;
}
ktime_get_real_ts64(&ts);
@ -524,7 +524,7 @@ int hclge_ptp_init(struct hclge_dev *hdev)
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to init ts time, ret = %d\n", ret);
goto out;
goto out_clear_int;
}
set_bit(HCLGE_STATE_PTP_EN, &hdev->state);
@ -532,6 +532,9 @@ int hclge_ptp_init(struct hclge_dev *hdev)
return 0;
out_clear_int:
clear_bit(HCLGE_PTP_FLAG_EN, &hdev->ptp->flags);
hclge_ptp_int_en(hdev, false);
out:
hclge_ptp_destroy_clock(hdev);

6
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
View File

@ -3086,11 +3086,7 @@ static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)
static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev)
{
struct hnae3_handle *nic = &hdev->nic;
struct hnae3_knic_private_info *kinfo = &nic->kinfo;
return min_t(u32, hdev->rss_size_max,
hdev->num_tqps / kinfo->tc_info.num_tc);
return min(hdev->rss_size_max, hdev->num_tqps);
}
/**

3
drivers/net/ethernet/intel/e1000e/defines.h
View File

@ -638,6 +638,9 @@
/* For checksumming, the sum of all words in the NVM should equal 0xBABA. */
#define NVM_SUM 0xBABA
/* Uninitialized ("empty") checksum word value */
#define NVM_CHECKSUM_UNINITIALIZED 0xFFFF
/* PBA (printed board assembly) number words */
#define NVM_PBA_OFFSET_0 8
#define NVM_PBA_OFFSET_1 9

2
drivers/net/ethernet/intel/e1000e/ich8lan.c
View File

@ -4146,6 +4146,8 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
ret_val = e1000e_update_nvm_checksum(hw);
if (ret_val)
return ret_val;
} else if (hw->mac.type == e1000_pch_tgp) {
return 0;
}
}

6
drivers/net/ethernet/intel/e1000e/nvm.c
View File

@ -558,6 +558,12 @@ s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw)
checksum += nvm_data;
}
if (hw->mac.type == e1000_pch_tgp &&
nvm_data == NVM_CHECKSUM_UNINITIALIZED) {
e_dbg("Uninitialized NVM Checksum on TGP platform - ignoring\n");
return 0;
}
if (checksum != (u16)NVM_SUM) {
e_dbg("NVM Checksum Invalid\n");
return -E1000_ERR_NVM;

3
drivers/net/ethernet/intel/fm10k/fm10k.h
View File

@ -189,13 +189,14 @@ struct fm10k_q_vector {
struct fm10k_ring_container rx, tx;
struct napi_struct napi;
struct rcu_head rcu; /* to avoid race with update stats on free */
cpumask_t affinity_mask;
char name[IFNAMSIZ + 9];
#ifdef CONFIG_DEBUG_FS
struct dentry *dbg_q_vector;
#endif /* CONFIG_DEBUG_FS */
struct rcu_head rcu; /* to avoid race with update stats on free */
/* for dynamic allocation of rings associated with this q_vector */
struct fm10k_ring ring[] ____cacheline_internodealigned_in_smp;

2
drivers/net/ethernet/intel/i40e/i40e.h
View File

@ -980,6 +980,7 @@ struct i40e_q_vector {
u16 reg_idx; /* register index of the interrupt */
struct napi_struct napi;
struct rcu_head rcu; /* to avoid race with update stats on free */
struct i40e_ring_container rx;
struct i40e_ring_container tx;
@ -990,7 +991,6 @@ struct i40e_q_vector {
cpumask_t affinity_mask;
struct irq_affinity_notify affinity_notify;
struct rcu_head rcu; /* to avoid race with update stats on free */
char name[I40E_INT_NAME_STR_LEN];
bool arm_wb_state;
bool in_busy_poll;

3
drivers/net/ethernet/intel/i40e/i40e_ethtool.c
View File

@ -245,6 +245,7 @@ static const struct i40e_stats i40e_gstrings_net_stats[] = {
I40E_NETDEV_STAT(rx_errors),
I40E_NETDEV_STAT(tx_errors),
I40E_NETDEV_STAT(rx_dropped),
I40E_NETDEV_STAT(rx_missed_errors),
I40E_NETDEV_STAT(tx_dropped),
I40E_NETDEV_STAT(collisions),
I40E_NETDEV_STAT(rx_length_errors),
@ -321,7 +322,7 @@ static const struct i40e_stats i40e_gstrings_stats[] = {
I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards),
I40E_PF_STAT("port.rx_discards", stats.eth.rx_discards),
I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),

18
drivers/net/ethernet/intel/i40e/i40e_main.c
View File

@ -495,6 +495,7 @@ static void i40e_get_netdev_stats_struct(struct net_device *netdev,
stats->tx_dropped = vsi_stats->tx_dropped;
stats->rx_errors = vsi_stats->rx_errors;
stats->rx_dropped = vsi_stats->rx_dropped;
stats->rx_missed_errors = vsi_stats->rx_missed_errors;
stats->rx_crc_errors = vsi_stats->rx_crc_errors;
stats->rx_length_errors = vsi_stats->rx_length_errors;
}
@ -686,17 +687,13 @@ i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
struct i40e_eth_stats *stat_offset,
struct i40e_eth_stats *stat)
{
u64 rx_rdpc, rx_rxerr;
i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
&stat_offset->rx_discards, &rx_rdpc);
&stat_offset->rx_discards, &stat->rx_discards);
i40e_stat_update64(hw,
I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
offset_loaded, &stat_offset->rx_discards_other,
&rx_rxerr);
stat->rx_discards = rx_rdpc + rx_rxerr;
&stat->rx_discards_other);
}
/**
@ -718,9 +715,6 @@ void i40e_update_eth_stats(struct i40e_vsi *vsi)
i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
vsi->stat_offsets_loaded,
&oes->tx_errors, &es->tx_errors);
i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
vsi->stat_offsets_loaded,
&oes->rx_discards, &es->rx_discards);
i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
vsi->stat_offsets_loaded,
&oes->rx_unknown_protocol, &es->rx_unknown_protocol);
@ -977,8 +971,10 @@ static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
ns->tx_errors = es->tx_errors;
ons->multicast = oes->rx_multicast;
ns->multicast = es->rx_multicast;
ons->rx_dropped = oes->rx_discards;
ns->rx_dropped = es->rx_discards;
ons->rx_dropped = oes->rx_discards_other;
ns->rx_dropped = es->rx_discards_other;
ons->rx_missed_errors = oes->rx_discards;
ns->rx_missed_errors = es->rx_discards;
ons->tx_dropped = oes->tx_discards;
ns->tx_dropped = es->tx_discards;

8
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
View File

@ -3076,10 +3076,10 @@ static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
const u8 *addr = al->list[i].addr;
/* Allow to delete VF primary MAC only if it was not set
* administratively by PF or if VF is trusted.
* administratively by PF.
*/
if (ether_addr_equal(addr, vf->default_lan_addr.addr)) {
if (i40e_can_vf_change_mac(vf))
if (!vf->pf_set_mac)
was_unimac_deleted = true;
else
continue;
@ -4934,8 +4934,8 @@ int i40e_get_vf_stats(struct net_device *netdev, int vf_id,
vf_stats->tx_bytes = stats->tx_bytes;
vf_stats->broadcast = stats->rx_broadcast;
vf_stats->multicast = stats->rx_multicast;
vf_stats->rx_dropped = stats->rx_discards;
vf_stats->tx_dropped = stats->tx_discards;
vf_stats->rx_dropped = stats->rx_discards + stats->rx_discards_other;
vf_stats->tx_dropped = stats->tx_errors;
return 0;
}

2
drivers/net/ethernet/intel/ice/ice_flex_pipe.c
View File

@ -1753,6 +1753,8 @@ ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
return ICE_DDP_PKG_ERR;
buf_copy = devm_kmemdup(ice_hw_to_dev(hw), buf, len, GFP_KERNEL);
if (!buf_copy)
return ICE_DDP_PKG_ERR;
state = ice_init_pkg(hw, buf_copy, len);
if (!ice_is_init_pkg_successful(state)) {

3
drivers/net/ethernet/intel/ixgbe/ixgbe.h
View File

@ -498,9 +498,10 @@ struct ixgbe_q_vector {
struct ixgbe_ring_container rx, tx;
struct napi_struct napi;
struct rcu_head rcu; /* to avoid race with update stats on free */
cpumask_t affinity_mask;
int numa_node;
struct rcu_head rcu; /* to avoid race with update stats on free */
char name[IFNAMSIZ + 9];
/* for dynamic allocation of rings associated with this q_vector */

4
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
View File

@ -1913,8 +1913,8 @@ static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
err = mlx5_cmd_invoke(dev, inb, outb, out, out_size, callback, context,
pages_queue, token, force_polling);
if (callback)
return err;
if (callback && !err)
return 0;
if (err > 0) /* Failed in FW, command didn't execute */
err = deliv_status_to_err(err);

1
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
View File

@ -1428,6 +1428,7 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,
unsigned int hdrlen = mlx5e_lro_update_hdr(skb, cqe, cqe_bcnt);
skb_shinfo(skb)->gso_size = DIV_ROUND_UP(cqe_bcnt - hdrlen, lro_num_seg);
skb_shinfo(skb)->gso_segs = lro_num_seg;
/* Subtract one since we already counted this as one
* "regular" packet in mlx5e_complete_rx_cqe()
*/

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