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arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2

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On SM8650 the CPUs 0-1 are "silver" (Cortex-A520), CPU 2-6 are "gold"
(Cortex-A720) and CPU 7 is "gold-plus" (Cortex-X4).

So reference the correct "gold" idle-state for CPU core 2.

Fixes: d235037799 ("arm64: dts: qcom: add initial SM8650 dtsi")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250314-sm8650-cpu2-sleep-v1-1-31d5c7c87a5d@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luca Weiss 2025-03-14 09:21:16 +01:00 committed by Bjorn Andersson
parent cc13a858a7
commit 9bb5ca4641
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/qcom/sm8650.dtsi
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@ -1608,7 +1608,7 @@
cpu_pd2: power-domain-cpu2 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd>;
domain-idle-states = <&silver_cpu_sleep_0>;
domain-idle-states = <&gold_cpu_sleep_0>;
};
cpu_pd3: power-domain-cpu3 {