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Merge branch 'net-phy-dp83822-add-support-for-changing-the-transmit-amplitude-voltage'
Dimitri Fedrau via says: ==================== net: phy: dp83822: Add support for changing the transmit amplitude voltage Add support for changing the transmit amplitude voltage in 100BASE-TX mode. Add support for configuration via DT. v4: https://lore.kernel.org/20250211-dp83822-tx-swing-v4-0-1e8ebd71ad54@liebherr.com v3: https://lore.kernel.org/20250204-dp83822-tx-swing-v3-0-9798e96500d9@liebherr.com v2: https://lore.kernel.org/20250120-dp83822-tx-swing-v2-0-07c99dc42627@liebherr.com v1: https://lore.kernel.org/20250113-dp83822-tx-swing-v1-0-7ed5a9d80010@liebherr.com ==================== Link: https://patch.msgid.link/20250214-dp83822-tx-swing-v5-0-02ca72620599@liebherr.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
b706d9f068
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@ -232,6 +232,12 @@ properties:
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PHY's that have configurable TX internal delays. If this property is
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present then the PHY applies the TX delay.
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tx-amplitude-100base-tx-percent:
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description:
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Transmit amplitude gain applied for 100BASE-TX. 100% matches 2V
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peak-to-peak specified in ANSI X3.263. When omitted, the PHYs default
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will be left as is.
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leds:
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type: object
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@ -31,6 +31,7 @@
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#define MII_DP83822_RCSR 0x17
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#define MII_DP83822_RESET_CTRL 0x1f
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#define MII_DP83822_MLEDCR 0x25
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#define MII_DP83822_LDCTRL 0x403
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#define MII_DP83822_LEDCFG1 0x460
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#define MII_DP83822_IOCTRL1 0x462
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#define MII_DP83822_IOCTRL2 0x463
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@ -123,6 +124,9 @@
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#define DP83822_IOCTRL1_GPIO1_CTRL GENMASK(2, 0)
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#define DP83822_IOCTRL1_GPIO1_CTRL_LED_1 BIT(0)
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/* LDCTRL bits */
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#define DP83822_100BASE_TX_LINE_DRIVER_SWING GENMASK(7, 4)
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/* IOCTRL2 bits */
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#define DP83822_IOCTRL2_GPIO2_CLK_SRC GENMASK(6, 4)
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#define DP83822_IOCTRL2_GPIO2_CTRL GENMASK(2, 0)
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@ -197,6 +201,7 @@ struct dp83822_private {
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bool set_gpio2_clk_out;
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u32 gpio2_clk_out;
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bool led_pin_enable[DP83822_MAX_LED_PINS];
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int tx_amplitude_100base_tx_index;
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};
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static int dp83822_config_wol(struct phy_device *phydev,
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@ -522,6 +527,12 @@ static int dp83822_config_init(struct phy_device *phydev)
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FIELD_PREP(DP83822_IOCTRL2_GPIO2_CLK_SRC,
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dp83822->gpio2_clk_out));
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if (dp83822->tx_amplitude_100base_tx_index >= 0)
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phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_LDCTRL,
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DP83822_100BASE_TX_LINE_DRIVER_SWING,
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FIELD_PREP(DP83822_100BASE_TX_LINE_DRIVER_SWING,
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dp83822->tx_amplitude_100base_tx_index));
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err = dp83822_config_init_leds(phydev);
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if (err)
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return err;
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@ -720,6 +731,11 @@ static int dp83822_phy_reset(struct phy_device *phydev)
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}
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#ifdef CONFIG_OF_MDIO
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static const u32 tx_amplitude_100base_tx_gain[] = {
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80, 82, 83, 85, 87, 88, 90, 92,
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93, 95, 97, 98, 100, 102, 103, 105,
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};
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static int dp83822_of_init_leds(struct phy_device *phydev)
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{
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struct device_node *node = phydev->mdio.dev.of_node;
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@ -780,6 +796,8 @@ static int dp83822_of_init(struct phy_device *phydev)
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struct dp83822_private *dp83822 = phydev->priv;
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struct device *dev = &phydev->mdio.dev;
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const char *of_val;
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int i, ret;
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u32 val;
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/* Signal detection for the PHY is only enabled if the FX_EN and the
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* SD_EN pins are strapped. Signal detection can only enabled if FX_EN
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@ -815,6 +833,26 @@ static int dp83822_of_init(struct phy_device *phydev)
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dp83822->set_gpio2_clk_out = true;
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}
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dp83822->tx_amplitude_100base_tx_index = -1;
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ret = phy_get_tx_amplitude_gain(phydev, dev,
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ETHTOOL_LINK_MODE_100baseT_Full_BIT,
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&val);
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if (!ret) {
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for (i = 0; i < ARRAY_SIZE(tx_amplitude_100base_tx_gain); i++) {
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if (tx_amplitude_100base_tx_gain[i] == val) {
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dp83822->tx_amplitude_100base_tx_index = i;
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break;
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}
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}
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if (dp83822->tx_amplitude_100base_tx_index < 0) {
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phydev_err(phydev,
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"Invalid value for tx-amplitude-100base-tx-percent property (%u)\n",
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val);
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return -EINVAL;
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}
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}
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return dp83822_of_init_leds(phydev);
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}
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@ -3096,19 +3096,12 @@ void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause)
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EXPORT_SYMBOL(phy_get_pause);
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#if IS_ENABLED(CONFIG_OF_MDIO)
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static int phy_get_int_delay_property(struct device *dev, const char *name)
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static int phy_get_u32_property(struct device *dev, const char *name, u32 *val)
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{
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s32 int_delay;
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int ret;
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ret = device_property_read_u32(dev, name, &int_delay);
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if (ret)
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return ret;
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return int_delay;
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return device_property_read_u32(dev, name, val);
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}
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#else
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static int phy_get_int_delay_property(struct device *dev, const char *name)
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static int phy_get_u32_property(struct device *dev, const char *name, u32 *val)
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{
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return -EINVAL;
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}
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@ -3133,12 +3126,12 @@ static int phy_get_int_delay_property(struct device *dev, const char *name)
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s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
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const int *delay_values, int size, bool is_rx)
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{
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s32 delay;
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int i;
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int i, ret;
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u32 delay;
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if (is_rx) {
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delay = phy_get_int_delay_property(dev, "rx-internal-delay-ps");
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if (delay < 0 && size == 0) {
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ret = phy_get_u32_property(dev, "rx-internal-delay-ps", &delay);
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if (ret < 0 && size == 0) {
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
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phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
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return 1;
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@ -3147,8 +3140,8 @@ s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
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}
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} else {
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delay = phy_get_int_delay_property(dev, "tx-internal-delay-ps");
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if (delay < 0 && size == 0) {
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ret = phy_get_u32_property(dev, "tx-internal-delay-ps", &delay);
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if (ret < 0 && size == 0) {
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
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phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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return 1;
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@ -3157,8 +3150,8 @@ s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
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}
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}
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if (delay < 0)
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return delay;
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if (ret < 0)
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return ret;
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if (size == 0)
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return delay;
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@ -3193,6 +3186,30 @@ s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
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}
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EXPORT_SYMBOL(phy_get_internal_delay);
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/**
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* phy_get_tx_amplitude_gain - stores tx amplitude gain in @val
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* @phydev: phy_device struct
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* @dev: pointer to the devices device struct
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* @linkmode: linkmode for which the tx amplitude gain should be retrieved
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* @val: tx amplitude gain
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*
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* Returns: 0 on success, < 0 on failure
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*/
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int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev,
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enum ethtool_link_mode_bit_indices linkmode,
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u32 *val)
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{
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switch (linkmode) {
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case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
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return phy_get_u32_property(dev,
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"tx-amplitude-100base-tx-percent",
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val);
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default:
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return -EINVAL;
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}
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}
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EXPORT_SYMBOL_GPL(phy_get_tx_amplitude_gain);
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static int phy_led_set_brightness(struct led_classdev *led_cdev,
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enum led_brightness value)
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{
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@ -2097,6 +2097,10 @@ void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
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s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
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const int *delay_values, int size, bool is_rx);
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int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev,
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enum ethtool_link_mode_bit_indices linkmode,
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u32 *val);
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void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
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bool *tx_pause, bool *rx_pause);
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