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xtensa: ptrace: Remove zero-length alignment array

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Use a compiler attribute to align the areg field to 16 bytes instead of
using a zero-length alignment array.

Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Message-Id: <20250219114759.20110-2-thorsten.blum@linux.dev>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Thorsten Blum 2025-02-19 12:48:00 +01:00 committed by Max Filippov
parent ffd294d346
commit dbef257ab7
1 changed files with 1 additions and 4 deletions
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5
arch/xtensa/include/asm/ptrace.h
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@ -72,13 +72,10 @@ struct pt_regs {
/* Additional configurable registers that are used by the compiler. */
xtregs_opt_t xtregs_opt;
/* Make sure the areg field is 16 bytes aligned. */
int align[0] __attribute__ ((aligned(16)));
/* current register frame.
* Note: The ESF for kernel exceptions ends after 16 registers!
*/
unsigned long areg[XCHAL_NUM_AREGS];
unsigned long areg[XCHAL_NUM_AREGS] __aligned(16);
};
# define arch_has_single_step() (1)