mirror of
git://git.yoctoproject.org/linux-yocto.git
synced 2025-10-23 07:23:12 +02:00
ata changes for 6.16-rc1
- Simplify ata_print_version_once() using dev_dbg_once() (From Heiner)
- Some cleanups of libata-sata code to simplify the sense data fetching
code and use BIT() macro for tag bit handling (From Niklas)
- Fix variable name spelling in the sata_sx4 driver (From Colin)
- Improve sense data information field handling for passthrough
commands (from Igor)
- Add Rockchip RK3576 SoC compatible to the Designware AHCI DT bindings
(from Nicolas)
- Add a message to indicate if a port is marked as external or not, to
help with debugging potential issues with LPM (From Niklas)
- Convert DT bindings for "ti,dm816-ahci", "apm,xgene-ahci",
"cavium,ebt3000-compact-flash", "marvell,orion-sata", and
"arasan,cf-spear1340" to DT schema (from Rob)
- Cleanup and improve the code and related comments for HIPM and DIPM
(host initiated and device initiated power managent) handling. In
particular, keep DIPM disabled while modifying the allowed LPM states
to avoid races with the device initiating power state changes (from
Niklas)
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Merge tag 'ata-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux
Pull ata updates from Damien Le Moal:
- Simplify ata_print_version_once() using dev_dbg_once() (Heiner)
- Some cleanups of libata-sata code to simplify the sense data fetching
code and use BIT() macro for tag bit handling (Niklas)
- Fix variable name spelling in the sata_sx4 driver (Colin)
- Improve sense data information field handling for passthrough
commands (Igor)
- Add Rockchip RK3576 SoC compatible to the Designware AHCI DT bindings
(Nicolas)
- Add a message to indicate if a port is marked as external or not, to
help with debugging potential issues with LPM (Niklas)
- Convert DT bindings for "ti,dm816-ahci", "apm,xgene-ahci",
"cavium,ebt3000-compact-flash", "marvell,orion-sata", and
"arasan,cf-spear1340" to DT schema (Rob)
- Cleanup and improve the code and related comments for HIPM and DIPM
(host initiated and device initiated power managent) handling.
In particular, keep DIPM disabled while modifying the allowed LPM
states to avoid races with the device initiating power state changes
(Niklas)
* tag 'ata-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux:
ata: libata-eh: Keep DIPM disabled while modifying the allowed LPM states
ata: libata-eh: Rename no_dipm variable to be more clear
ata: libata-eh: Rename hipm and dipm variables
ata: libata-eh: Add ata_eh_set_lpm() WARN_ON_ONCE
ata: libata-eh: Update DIPM comments to reflect reality
dt-bindings: ata: Convert arasan,cf-spear1340 to DT schema
dt-bindings: ata: Convert marvell,orion-sata to DT schema
dt-bindings: ata: Convert cavium,ebt3000-compact-flash to DT schema
dt-bindings: ata: Convert apm,xgene-ahci to DT schema
dt-bindings: ata: Convert st,ahci to DT schema
dt-bindings: ata: Convert ti,dm816-ahci to DT schema
ata: libata: Print if port is external on boot
dt-bindings: ata: rockchip-dwc-ahci: add RK3576 compatible
ata: libata-scsi: Do not set the INFORMATION field twice for ATA PT
ata: sata_sx4: Fix spelling mistake "parttern" -> "pattern"
ata: libata-sata: Use BIT() macro to convert tag to bit field
ata: libata-sata: Simplify sense_valid fetching
ata: libata-core: Simplify ata_print_version_once
This commit is contained in:
Linus Torvalds
commit
efe19d34f6
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|
@ -1,21 +0,0 @@
|
|||
Device tree binding for the TI DM816 AHCI SATA Controller
|
||||
---------------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "ti,dm816-ahci"
|
||||
- reg: physical base address and size of the register region used by
|
||||
the controller (as defined by the AHCI 1.1 standard)
|
||||
- interrupts: interrupt specifier (refer to the interrupt binding)
|
||||
- clocks: list of phandle and clock specifier pairs (or only
|
||||
phandles for clock providers with '0' defined for
|
||||
#clock-cells); two clocks must be specified: the functional
|
||||
clock and an external reference clock
|
||||
|
||||
Example:
|
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|
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sata: sata@4a140000 {
|
||||
compatible = "ti,dm816-ahci";
|
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reg = <0x4a140000 0x10000>;
|
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interrupts = <16>;
|
||||
clocks = <&sysclk5_ck>, <&sata_refclk>;
|
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};
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
STMicroelectronics STi SATA controller
|
||||
|
||||
This binding describes a SATA device.
|
||||
|
||||
Required properties:
|
||||
- compatible : Must be "st,ahci"
|
||||
- reg : Physical base addresses and length of register sets
|
||||
- interrupts : Interrupt associated with the SATA device
|
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- interrupt-names : Associated name must be; "hostc"
|
||||
- clocks : The phandle for the clock
|
||||
- clock-names : Associated name must be; "ahci_clk"
|
||||
- phys : The phandle for the PHY port
|
||||
- phy-names : Associated name must be; "ahci_phy"
|
||||
|
||||
Optional properties:
|
||||
- resets : The power-down, soft-reset and power-reset lines of SATA IP
|
||||
- reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
|
||||
|
||||
Example:
|
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|
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/* Example for stih407 family silicon */
|
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sata0: sata@9b20000 {
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compatible = "st,ahci";
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reg = <0x9b20000 0x1000>;
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interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
|
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interrupt-names = "hostc";
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phys = <&phy_port0 PHY_TYPE_SATA>;
|
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phy-names = "ahci_phy";
|
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resets = <&powerdown STIH407_SATA0_POWERDOWN>,
|
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<&softreset STIH407_SATA0_SOFTRESET>,
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<&softreset STIH407_SATA0_PWR_SOFTRESET>;
|
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reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
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clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
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clock-names = "ahci_clk";
|
||||
};
|
||||
58
Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml
Normal file
58
Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml
Normal file
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@ -0,0 +1,58 @@
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|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
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%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/apm,xgene-ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: APM X-Gene 6.0 Gb/s SATA host controller
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
allOf:
|
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- $ref: ahci-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
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- apm,xgene-ahci
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- apm,xgene-ahci-pcie
|
||||
|
||||
reg:
|
||||
minItems: 4
|
||||
items:
|
||||
- description: AHCI memory resource
|
||||
- description: Host controller core
|
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- description: Host controller diagnostic
|
||||
- description: Host controller AXI
|
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- description: Host controller MUX
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- phys
|
||||
- phy-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@1a400000 {
|
||||
compatible = "apm,xgene-ahci";
|
||||
reg = <0x1a400000 0x1000>,
|
||||
<0x1f220000 0x1000>,
|
||||
<0x1f22d000 0x1000>,
|
||||
<0x1f22e000 0x1000>,
|
||||
<0x1f227000 0x1000>;
|
||||
clocks = <&sataclk 0>;
|
||||
dma-coherent;
|
||||
interrupts = <0x0 0x87 0x4>;
|
||||
phys = <&phy2 0>;
|
||||
phy-names = "sata-phy";
|
||||
};
|
||||
|
|
@ -1,77 +0,0 @@
|
|||
* APM X-Gene 6.0 Gb/s SATA host controller nodes
|
||||
|
||||
SATA host controller nodes are defined to describe on-chip Serial ATA
|
||||
controllers. Each SATA controller (pair of ports) have its own node.
|
||||
|
||||
Required properties:
|
||||
- compatible : Shall contain:
|
||||
* "apm,xgene-ahci"
|
||||
- reg : First memory resource shall be the AHCI memory
|
||||
resource.
|
||||
Second memory resource shall be the host controller
|
||||
core memory resource.
|
||||
Third memory resource shall be the host controller
|
||||
diagnostic memory resource.
|
||||
4th memory resource shall be the host controller
|
||||
AXI memory resource.
|
||||
5th optional memory resource shall be the host
|
||||
controller MUX memory resource if required.
|
||||
- interrupts : Interrupt-specifier for SATA host controller IRQ.
|
||||
- clocks : Reference to the clock entry.
|
||||
- phys : A list of phandles + phy-specifiers, one for each
|
||||
entry in phy-names.
|
||||
- phy-names : Should contain:
|
||||
* "sata-phy" for the SATA 6.0Gbps PHY
|
||||
|
||||
Optional properties:
|
||||
- dma-coherent : Present if dma operations are coherent
|
||||
- status : Shall be "ok" if enabled or "disabled" if disabled.
|
||||
Default is "ok".
|
||||
|
||||
Example:
|
||||
sataclk: sataclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <100000000>;
|
||||
clock-output-names = "sataclk";
|
||||
};
|
||||
|
||||
phy2: phy@1f22a000 {
|
||||
compatible = "apm,xgene-phy";
|
||||
reg = <0x0 0x1f22a000 0x0 0x100>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
phy3: phy@1f23a000 {
|
||||
compatible = "apm,xgene-phy";
|
||||
reg = <0x0 0x1f23a000 0x0 0x100>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
sata2: sata@1a400000 {
|
||||
compatible = "apm,xgene-ahci";
|
||||
reg = <0x0 0x1a400000 0x0 0x1000>,
|
||||
<0x0 0x1f220000 0x0 0x1000>,
|
||||
<0x0 0x1f22d000 0x0 0x1000>,
|
||||
<0x0 0x1f22e000 0x0 0x1000>,
|
||||
<0x0 0x1f227000 0x0 0x1000>;
|
||||
interrupts = <0x0 0x87 0x4>;
|
||||
dma-coherent;
|
||||
clocks = <&sataclk 0>;
|
||||
phys = <&phy2 0>;
|
||||
phy-names = "sata-phy";
|
||||
};
|
||||
|
||||
sata3: sata@1a800000 {
|
||||
compatible = "apm,xgene-ahci-pcie";
|
||||
reg = <0x0 0x1a800000 0x0 0x1000>,
|
||||
<0x0 0x1f230000 0x0 0x1000>,
|
||||
<0x0 0x1f23d000 0x0 0x1000>,
|
||||
<0x0 0x1f23e000 0x0 0x1000>,
|
||||
<0x0 0x1f237000 0x0 0x1000>;
|
||||
interrupts = <0x0 0x88 0x4>;
|
||||
dma-coherent;
|
||||
clocks = <&sataclk 0>;
|
||||
phys = <&phy3 0>;
|
||||
phy-names = "sata-phy";
|
||||
};
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/arasan,cf-spear1340.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arasan PATA Compact Flash Controller
|
||||
|
||||
maintainers:
|
||||
- Viresh Kumar <viresh.kumar@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arasan,cf-spear1340
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
arasan,broken-udma:
|
||||
description: UDMA mode is unusable
|
||||
type: boolean
|
||||
|
||||
arasan,broken-mwdma:
|
||||
description: MWDMA mode is unusable
|
||||
type: boolean
|
||||
|
||||
arasan,broken-pio:
|
||||
description: PIO mode is unusable
|
||||
type: boolean
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: data
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
required:
|
||||
- arasan,broken-udma
|
||||
- arasan,broken-mwdma
|
||||
then:
|
||||
required:
|
||||
- dmas
|
||||
- dma-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
cf@fc000000 {
|
||||
compatible = "arasan,cf-spear1340";
|
||||
reg = <0xfc000000 0x1000>;
|
||||
interrupts = <12>;
|
||||
dmas = <&dma 23>;
|
||||
dma-names = "data";
|
||||
};
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/cavium,ebt3000-compact-flash.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cavium Compact Flash
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
description:
|
||||
The Cavium Compact Flash device is connected to the Octeon Boot Bus, and is
|
||||
thus a child of the Boot Bus device. It can read and write industry standard
|
||||
compact flash devices.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cavium,ebt3000-compact-flash
|
||||
|
||||
reg:
|
||||
description: The base address of the CF chip select banks.
|
||||
items:
|
||||
- description: CF chip select bank 0
|
||||
- description: CF chip select bank 1
|
||||
|
||||
cavium,bus-width:
|
||||
description: The width of the connection to the CF devices.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [8, 16]
|
||||
|
||||
cavium,true-ide:
|
||||
description: True IDE mode when present.
|
||||
type: boolean
|
||||
|
||||
cavium,dma-engine-handle:
|
||||
description: A phandle for the DMA Engine connected to this device.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
||||
compact-flash@5,0 {
|
||||
compatible = "cavium,ebt3000-compact-flash";
|
||||
reg = <5 0 0x10000>, <6 0 0x10000>;
|
||||
cavium,bus-width = <16>;
|
||||
cavium,true-ide;
|
||||
cavium,dma-engine-handle = <&dma0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,30 +0,0 @@
|
|||
* Compact Flash
|
||||
|
||||
The Cavium Compact Flash device is connected to the Octeon Boot Bus,
|
||||
and is thus a child of the Boot Bus device. It can read and write
|
||||
industry standard compact flash devices.
|
||||
|
||||
Properties:
|
||||
- compatible: "cavium,ebt3000-compact-flash";
|
||||
|
||||
Compatibility with many Cavium evaluation boards.
|
||||
|
||||
- reg: The base address of the CF chip select banks. Depending on
|
||||
the device configuration, there may be one or two banks.
|
||||
|
||||
- cavium,bus-width: The width of the connection to the CF devices. Valid
|
||||
values are 8 and 16.
|
||||
|
||||
- cavium,true-ide: Optional, if present the CF connection is in True IDE mode.
|
||||
|
||||
- cavium,dma-engine-handle: Optional, a phandle for the DMA Engine connected
|
||||
to this device.
|
||||
|
||||
Example:
|
||||
compact-flash@5,0 {
|
||||
compatible = "cavium,ebt3000-compact-flash";
|
||||
reg = <5 0 0x10000>, <6 0 0x10000>;
|
||||
cavium,bus-width = <16>;
|
||||
cavium,true-ide;
|
||||
cavium,dma-engine-handle = <&dma0>;
|
||||
};
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/marvell,orion-sata.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Orion SATA
|
||||
|
||||
maintainers:
|
||||
- Andrew Lunn <andrew@lunn.ch>
|
||||
- Gregory Clement <gregory.clement@bootlin.com>
|
||||
|
||||
allOf:
|
||||
- $ref: sata-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,orion-sata
|
||||
- marvell,armada-370-sata
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: '0'
|
||||
- const: '1'
|
||||
- const: '2'
|
||||
- const: '3'
|
||||
- const: '4'
|
||||
- const: '5'
|
||||
- const: '6'
|
||||
- const: '7'
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
nr-ports:
|
||||
description:
|
||||
Number of SATA ports in use.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 8
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: port0
|
||||
- const: port1
|
||||
- const: port2
|
||||
- const: port3
|
||||
- const: port4
|
||||
- const: port5
|
||||
- const: port6
|
||||
- const: port7
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- nr-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@80000 {
|
||||
compatible = "marvell,orion-sata";
|
||||
reg = <0x80000 0x5000>;
|
||||
interrupts = <21>;
|
||||
phys = <&sata_phy0>, <&sata_phy1>;
|
||||
phy-names = "port0", "port1";
|
||||
nr-ports = <2>;
|
||||
};
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
* Marvell Orion SATA
|
||||
|
||||
Required Properties:
|
||||
- compatibility : "marvell,orion-sata" or "marvell,armada-370-sata"
|
||||
- reg : Address range of controller
|
||||
- interrupts : Interrupt controller is using
|
||||
- nr-ports : Number of SATA ports in use.
|
||||
|
||||
Optional Properties:
|
||||
- phys : List of phandles to sata phys
|
||||
- phy-names : Should be "0", "1", etc, one number per phandle
|
||||
|
||||
Example:
|
||||
|
||||
sata@80000 {
|
||||
compatible = "marvell,orion-sata";
|
||||
reg = <0x80000 0x5000>;
|
||||
interrupts = <21>;
|
||||
phys = <&sata_phy0>, <&sata_phy1>;
|
||||
phy-names = "0", "1";
|
||||
nr-ports = <2>;
|
||||
}
|
||||
|
|
@ -1,37 +0,0 @@
|
|||
* ARASAN PATA COMPACT FLASH CONTROLLER
|
||||
|
||||
Required properties:
|
||||
- compatible: "arasan,cf-spear1340"
|
||||
- reg: Address range of the CF registers
|
||||
- interrupt: Should contain the CF interrupt number
|
||||
- clock-frequency: Interface clock rate, in Hz, one of
|
||||
25000000
|
||||
33000000
|
||||
40000000
|
||||
50000000
|
||||
66000000
|
||||
75000000
|
||||
100000000
|
||||
125000000
|
||||
150000000
|
||||
166000000
|
||||
200000000
|
||||
|
||||
Optional properties:
|
||||
- arasan,broken-udma: if present, UDMA mode is unusable
|
||||
- arasan,broken-mwdma: if present, MWDMA mode is unusable
|
||||
- arasan,broken-pio: if present, PIO mode is unusable
|
||||
- dmas: one DMA channel, as described in bindings/dma/dma.txt
|
||||
required unless both UDMA and MWDMA mode are broken
|
||||
- dma-names: the corresponding channel name, must be "data"
|
||||
|
||||
Example:
|
||||
|
||||
cf@fc000000 {
|
||||
compatible = "arasan,cf-spear1340";
|
||||
reg = <0xfc000000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <12>;
|
||||
dmas = <&dma-controller 23>;
|
||||
dma-names = "data";
|
||||
};
|
||||
|
|
@ -20,6 +20,7 @@ select:
|
|||
contains:
|
||||
enum:
|
||||
- rockchip,rk3568-dwc-ahci
|
||||
- rockchip,rk3576-dwc-ahci
|
||||
- rockchip,rk3588-dwc-ahci
|
||||
required:
|
||||
- compatible
|
||||
|
|
@ -29,6 +30,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- rockchip,rk3568-dwc-ahci
|
||||
- rockchip,rk3576-dwc-ahci
|
||||
- rockchip,rk3588-dwc-ahci
|
||||
- const: snps,dwc-ahci
|
||||
|
||||
|
|
@ -83,6 +85,7 @@ allOf:
|
|||
contains:
|
||||
enum:
|
||||
- rockchip,rk3568-dwc-ahci
|
||||
- rockchip,rk3576-dwc-ahci
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
|
|
|||
72
Documentation/devicetree/bindings/ata/st,ahci.yaml
Normal file
72
Documentation/devicetree/bindings/ata/st,ahci.yaml
Normal file
|
|
@ -0,0 +1,72 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/st,ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STi SATA controller
|
||||
|
||||
maintainers:
|
||||
- Patrice Chotard <patrice.chotard@foss.st.com>
|
||||
|
||||
allOf:
|
||||
- $ref: ahci-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: st,ahci
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: hostc
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ahci_clk
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: Power-down line
|
||||
- description: Soft-reset line
|
||||
- description: Power-reset line
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: pwr-dwn
|
||||
- const: sw-rst
|
||||
- const: pwr-rst
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupt-names
|
||||
- phys
|
||||
- phy-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/reset/stih407-resets.h>
|
||||
#include <dt-bindings/clock/stih407-clks.h>
|
||||
|
||||
sata@9b20000 {
|
||||
compatible = "st,ahci";
|
||||
reg = <0x9b20000 0x1000>;
|
||||
interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
|
||||
interrupt-names = "hostc";
|
||||
phys = <&phy_port0 PHY_TYPE_SATA>;
|
||||
phy-names = "sata-phy";
|
||||
resets = <&powerdown STIH407_SATA0_POWERDOWN>,
|
||||
<&softreset STIH407_SATA0_SOFTRESET>,
|
||||
<&softreset STIH407_SATA0_PWR_SOFTRESET>;
|
||||
reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
|
||||
clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
|
||||
clock-names = "ahci_clk";
|
||||
};
|
||||
43
Documentation/devicetree/bindings/ata/ti,dm816-ahci.yaml
Normal file
43
Documentation/devicetree/bindings/ata/ti,dm816-ahci.yaml
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/ti,dm816-ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI DM816 AHCI SATA Controller
|
||||
|
||||
maintainers:
|
||||
- Bartosz Golaszewski <brgl@bgdev.pl>
|
||||
|
||||
allOf:
|
||||
- $ref: ahci-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,dm816-ahci
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: functional clock
|
||||
- description: external reference clock
|
||||
|
||||
ti,hwmods:
|
||||
const: sata
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@4a140000 {
|
||||
compatible = "ti,dm816-ahci";
|
||||
reg = <0x4a140000 0x10000>;
|
||||
interrupts = <16>;
|
||||
clocks = <&sysclk5_ck>, <&sata_refclk>;
|
||||
};
|
||||
|
|
@ -6682,12 +6682,6 @@ const struct ata_port_info ata_dummy_port_info = {
|
|||
};
|
||||
EXPORT_SYMBOL_GPL(ata_dummy_port_info);
|
||||
|
||||
void ata_print_version(const struct device *dev, const char *version)
|
||||
{
|
||||
dev_printk(KERN_DEBUG, dev, "version %s\n", version);
|
||||
}
|
||||
EXPORT_SYMBOL(ata_print_version);
|
||||
|
||||
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_tf_load);
|
||||
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_exec_command);
|
||||
EXPORT_TRACEPOINT_SYMBOL_GPL(ata_bmdma_setup);
|
||||
|
|
|
|||
|
|
@ -3432,7 +3432,7 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
|
|||
struct ata_eh_context *ehc = &link->eh_context;
|
||||
struct ata_device *dev, *link_dev = NULL, *lpm_dev = NULL;
|
||||
enum ata_lpm_policy old_policy = link->lpm_policy;
|
||||
bool no_dipm = link->ap->flags & ATA_FLAG_NO_DIPM;
|
||||
bool host_has_dipm = !(link->ap->flags & ATA_FLAG_NO_DIPM);
|
||||
unsigned int hints = ATA_LPM_EMPTY | ATA_LPM_HIPM;
|
||||
unsigned int err_mask;
|
||||
int rc;
|
||||
|
|
@ -3443,28 +3443,35 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
|
|||
return 0;
|
||||
|
||||
/*
|
||||
* DIPM is enabled only for MIN_POWER as some devices
|
||||
* misbehave when the host NACKs transition to SLUMBER. Order
|
||||
* device and link configurations such that the host always
|
||||
* allows DIPM requests.
|
||||
* This function currently assumes that it will never be supplied policy
|
||||
* ATA_LPM_UNKNOWN.
|
||||
*/
|
||||
if (WARN_ON_ONCE(policy == ATA_LPM_UNKNOWN))
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* DIPM is enabled only for ATA_LPM_MIN_POWER,
|
||||
* ATA_LPM_MIN_POWER_WITH_PARTIAL, and ATA_LPM_MED_POWER_WITH_DIPM, as
|
||||
* some devices misbehave when the host NACKs transition to SLUMBER.
|
||||
*/
|
||||
ata_for_each_dev(dev, link, ENABLED) {
|
||||
bool hipm = ata_id_has_hipm(dev->id);
|
||||
bool dipm = ata_id_has_dipm(dev->id) && !no_dipm;
|
||||
bool dev_has_hipm = ata_id_has_hipm(dev->id);
|
||||
bool dev_has_dipm = ata_id_has_dipm(dev->id);
|
||||
|
||||
/* find the first enabled and LPM enabled devices */
|
||||
if (!link_dev)
|
||||
link_dev = dev;
|
||||
|
||||
if (!lpm_dev && (hipm || dipm))
|
||||
if (!lpm_dev &&
|
||||
(dev_has_hipm || (dev_has_dipm && host_has_dipm)))
|
||||
lpm_dev = dev;
|
||||
|
||||
hints &= ~ATA_LPM_EMPTY;
|
||||
if (!hipm)
|
||||
if (!dev_has_hipm)
|
||||
hints &= ~ATA_LPM_HIPM;
|
||||
|
||||
/* disable DIPM before changing link config */
|
||||
if (policy < ATA_LPM_MED_POWER_WITH_DIPM && dipm) {
|
||||
if (dev_has_dipm) {
|
||||
err_mask = ata_dev_set_feature(dev,
|
||||
SETFEATURES_SATA_DISABLE, SATA_DIPM);
|
||||
if (err_mask && err_mask != AC_ERR_DEV) {
|
||||
|
|
@ -3505,10 +3512,16 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
|
|||
if (ap && ap->slave_link)
|
||||
ap->slave_link->lpm_policy = policy;
|
||||
|
||||
/* host config updated, enable DIPM if transitioning to MIN_POWER */
|
||||
/*
|
||||
* Host config updated, enable DIPM if transitioning to
|
||||
* ATA_LPM_MIN_POWER, ATA_LPM_MIN_POWER_WITH_PARTIAL, or
|
||||
* ATA_LPM_MED_POWER_WITH_DIPM.
|
||||
*/
|
||||
ata_for_each_dev(dev, link, ENABLED) {
|
||||
if (policy >= ATA_LPM_MED_POWER_WITH_DIPM && !no_dipm &&
|
||||
ata_id_has_dipm(dev->id)) {
|
||||
bool dev_has_dipm = ata_id_has_dipm(dev->id);
|
||||
|
||||
if (policy >= ATA_LPM_MED_POWER_WITH_DIPM && host_has_dipm &&
|
||||
dev_has_dipm) {
|
||||
err_mask = ata_dev_set_feature(dev,
|
||||
SETFEATURES_SATA_ENABLE, SATA_DIPM);
|
||||
if (err_mask && err_mask != AC_ERR_DEV) {
|
||||
|
|
|
|||
|
|
@ -1509,9 +1509,10 @@ int ata_eh_get_ncq_success_sense(struct ata_link *link)
|
|||
struct ata_queued_cmd *qc;
|
||||
unsigned int err_mask, tag;
|
||||
u8 *sense, sk = 0, asc = 0, ascq = 0;
|
||||
u64 sense_valid, val;
|
||||
u16 extended_sense;
|
||||
bool aux_icc_valid;
|
||||
u32 sense_valid;
|
||||
u64 val;
|
||||
int ret = 0;
|
||||
|
||||
err_mask = ata_read_log_page(dev, ATA_LOG_SENSE_NCQ, 0, buf, 2);
|
||||
|
|
@ -1529,8 +1530,7 @@ int ata_eh_get_ncq_success_sense(struct ata_link *link)
|
|||
return -EIO;
|
||||
}
|
||||
|
||||
sense_valid = (u64)buf[8] | ((u64)buf[9] << 8) |
|
||||
((u64)buf[10] << 16) | ((u64)buf[11] << 24);
|
||||
sense_valid = get_unaligned_le32(&buf[8]);
|
||||
extended_sense = get_unaligned_le16(&buf[14]);
|
||||
aux_icc_valid = extended_sense & BIT(15);
|
||||
|
||||
|
|
@ -1545,7 +1545,7 @@ int ata_eh_get_ncq_success_sense(struct ata_link *link)
|
|||
* If the command does not have any sense data, clear ATA_SENSE.
|
||||
* Keep ATA_QCFLAG_EH_SUCCESS_CMD so that command is finished.
|
||||
*/
|
||||
if (!(sense_valid & (1ULL << tag))) {
|
||||
if (!(sense_valid & BIT(tag))) {
|
||||
qc->result_tf.status &= ~ATA_SENSE;
|
||||
continue;
|
||||
}
|
||||
|
|
@ -1634,7 +1634,7 @@ void ata_eh_analyze_ncq_error(struct ata_link *link)
|
|||
return;
|
||||
}
|
||||
|
||||
if (!(link->sactive & (1 << tag))) {
|
||||
if (!(link->sactive & BIT(tag))) {
|
||||
ata_link_err(link, "log page 10h reported inactive tag %d\n",
|
||||
tag);
|
||||
return;
|
||||
|
|
@ -1659,8 +1659,6 @@ void ata_eh_analyze_ncq_error(struct ata_link *link)
|
|||
if (ata_scsi_sense_is_valid(sense_key, asc, ascq)) {
|
||||
ata_scsi_set_sense(dev, qc->scsicmd, sense_key, asc,
|
||||
ascq);
|
||||
ata_scsi_set_sense_information(dev, qc->scsicmd,
|
||||
&qc->result_tf);
|
||||
qc->flags |= ATA_QCFLAG_SENSE_VALID;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -216,17 +216,21 @@ void ata_scsi_set_sense(struct ata_device *dev, struct scsi_cmnd *cmd,
|
|||
scsi_build_sense(cmd, d_sense, sk, asc, ascq);
|
||||
}
|
||||
|
||||
void ata_scsi_set_sense_information(struct ata_device *dev,
|
||||
struct scsi_cmnd *cmd,
|
||||
const struct ata_taskfile *tf)
|
||||
static void ata_scsi_set_sense_information(struct ata_queued_cmd *qc)
|
||||
{
|
||||
u64 information;
|
||||
|
||||
information = ata_tf_read_block(tf, dev);
|
||||
if (!(qc->flags & ATA_QCFLAG_RTF_FILLED)) {
|
||||
ata_dev_dbg(qc->dev,
|
||||
"missing result TF: can't set INFORMATION sense field\n");
|
||||
return;
|
||||
}
|
||||
|
||||
information = ata_tf_read_block(&qc->result_tf, qc->dev);
|
||||
if (information == U64_MAX)
|
||||
return;
|
||||
|
||||
scsi_set_sense_information(cmd->sense_buffer,
|
||||
scsi_set_sense_information(qc->scsicmd->sense_buffer,
|
||||
SCSI_SENSE_BUFFERSIZE, information);
|
||||
}
|
||||
|
||||
|
|
@ -971,8 +975,7 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc)
|
|||
* ata_gen_ata_sense - generate a SCSI fixed sense block
|
||||
* @qc: Command that we are erroring out
|
||||
*
|
||||
* Generate sense block for a failed ATA command @qc. Descriptor
|
||||
* format is used to accommodate LBA48 block address.
|
||||
* Generate sense block for a failed ATA command @qc.
|
||||
*
|
||||
* LOCKING:
|
||||
* None.
|
||||
|
|
@ -982,8 +985,6 @@ static void ata_gen_ata_sense(struct ata_queued_cmd *qc)
|
|||
struct ata_device *dev = qc->dev;
|
||||
struct scsi_cmnd *cmd = qc->scsicmd;
|
||||
struct ata_taskfile *tf = &qc->result_tf;
|
||||
unsigned char *sb = cmd->sense_buffer;
|
||||
u64 block;
|
||||
u8 sense_key, asc, ascq;
|
||||
|
||||
if (ata_dev_disabled(dev)) {
|
||||
|
|
@ -1014,12 +1015,6 @@ static void ata_gen_ata_sense(struct ata_queued_cmd *qc)
|
|||
ata_scsi_set_sense(dev, cmd, ABORTED_COMMAND, 0, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
block = ata_tf_read_block(&qc->result_tf, dev);
|
||||
if (block == U64_MAX)
|
||||
return;
|
||||
|
||||
scsi_set_sense_information(sb, SCSI_SENSE_BUFFERSIZE, block);
|
||||
}
|
||||
|
||||
void ata_scsi_sdev_config(struct scsi_device *sdev)
|
||||
|
|
@ -1679,8 +1674,10 @@ static void ata_scsi_qc_complete(struct ata_queued_cmd *qc)
|
|||
ata_scsi_set_passthru_sense_fields(qc);
|
||||
if (is_ck_cond_request)
|
||||
set_status_byte(qc->scsicmd, SAM_STAT_CHECK_CONDITION);
|
||||
} else if (is_error && !have_sense) {
|
||||
ata_gen_ata_sense(qc);
|
||||
} else if (is_error) {
|
||||
if (!have_sense)
|
||||
ata_gen_ata_sense(qc);
|
||||
ata_scsi_set_sense_information(qc);
|
||||
}
|
||||
|
||||
ata_qc_done(qc);
|
||||
|
|
|
|||
|
|
@ -141,9 +141,6 @@ extern int ata_scsi_offline_dev(struct ata_device *dev);
|
|||
extern bool ata_scsi_sense_is_valid(u8 sk, u8 asc, u8 ascq);
|
||||
extern void ata_scsi_set_sense(struct ata_device *dev,
|
||||
struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq);
|
||||
extern void ata_scsi_set_sense_information(struct ata_device *dev,
|
||||
struct scsi_cmnd *cmd,
|
||||
const struct ata_taskfile *tf);
|
||||
extern void ata_scsi_media_change_notify(struct ata_device *dev);
|
||||
extern void ata_scsi_hotplug(struct work_struct *work);
|
||||
extern void ata_scsi_dev_rescan(struct work_struct *work);
|
||||
|
|
|
|||
|
|
@ -1301,32 +1301,32 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
|
|||
}
|
||||
|
||||
if (dimm_test) {
|
||||
u8 test_parttern1[40] =
|
||||
u8 test_pattern1[40] =
|
||||
{0x55,0xAA,'P','r','o','m','i','s','e',' ',
|
||||
'N','o','t',' ','Y','e','t',' ',
|
||||
'D','e','f','i','n','e','d',' ',
|
||||
'1','.','1','0',
|
||||
'9','8','0','3','1','6','1','2',0,0};
|
||||
u8 test_parttern2[40] = {0};
|
||||
u8 test_pattern2[40] = {0};
|
||||
|
||||
pdc20621_put_to_dimm(host, test_parttern2, 0x10040, 40);
|
||||
pdc20621_put_to_dimm(host, test_parttern2, 0x40, 40);
|
||||
pdc20621_put_to_dimm(host, test_pattern2, 0x10040, 40);
|
||||
pdc20621_put_to_dimm(host, test_pattern2, 0x40, 40);
|
||||
|
||||
pdc20621_put_to_dimm(host, test_parttern1, 0x10040, 40);
|
||||
pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40);
|
||||
dev_info(host->dev, "DIMM test pattern 1: %x, %x, %s\n", test_parttern2[0],
|
||||
test_parttern2[1], &(test_parttern2[2]));
|
||||
pdc20621_get_from_dimm(host, test_parttern2, 0x10040,
|
||||
pdc20621_put_to_dimm(host, test_pattern1, 0x10040, 40);
|
||||
pdc20621_get_from_dimm(host, test_pattern2, 0x40, 40);
|
||||
dev_info(host->dev, "DIMM test pattern 1: %x, %x, %s\n", test_pattern2[0],
|
||||
test_pattern2[1], &(test_pattern2[2]));
|
||||
pdc20621_get_from_dimm(host, test_pattern2, 0x10040,
|
||||
40);
|
||||
dev_info(host->dev, "DIMM test pattern 2: %x, %x, %s\n",
|
||||
test_parttern2[0],
|
||||
test_parttern2[1], &(test_parttern2[2]));
|
||||
test_pattern2[0],
|
||||
test_pattern2[1], &(test_pattern2[2]));
|
||||
|
||||
pdc20621_put_to_dimm(host, test_parttern1, 0x40, 40);
|
||||
pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40);
|
||||
pdc20621_put_to_dimm(host, test_pattern1, 0x40, 40);
|
||||
pdc20621_get_from_dimm(host, test_pattern2, 0x40, 40);
|
||||
dev_info(host->dev, "DIMM test pattern 3: %x, %x, %s\n",
|
||||
test_parttern2[0],
|
||||
test_parttern2[1], &(test_parttern2[2]));
|
||||
test_pattern2[0],
|
||||
test_pattern2[1], &(test_pattern2[2]));
|
||||
}
|
||||
|
||||
/* ECC initiliazation. */
|
||||
|
|
|
|||
|
|
@ -41,17 +41,6 @@
|
|||
*/
|
||||
#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
|
||||
|
||||
|
||||
#define ata_print_version_once(dev, version) \
|
||||
({ \
|
||||
static bool __print_once; \
|
||||
\
|
||||
if (!__print_once) { \
|
||||
__print_once = true; \
|
||||
ata_print_version(dev, version); \
|
||||
} \
|
||||
})
|
||||
|
||||
/* defines only for the constants which don't work well as enums */
|
||||
#define ATA_TAG_POISON 0xfafbfcfdU
|
||||
|
||||
|
|
@ -1593,7 +1582,11 @@ do { \
|
|||
#define ata_dev_dbg(dev, fmt, ...) \
|
||||
ata_dev_printk(debug, dev, fmt, ##__VA_ARGS__)
|
||||
|
||||
void ata_print_version(const struct device *dev, const char *version);
|
||||
static inline void ata_print_version_once(const struct device *dev,
|
||||
const char *version)
|
||||
{
|
||||
dev_dbg_once(dev, "version %s\n", version);
|
||||
}
|
||||
|
||||
/*
|
||||
* ata_eh_info helpers
|
||||
|
|
@ -1625,6 +1618,8 @@ static inline void ata_port_desc_misc(struct ata_port *ap, int irq)
|
|||
{
|
||||
ata_port_desc(ap, "irq %d", irq);
|
||||
ata_port_desc(ap, "lpm-pol %d", ap->target_lpm_policy);
|
||||
if (ap->pflags & ATA_PFLAG_EXTERNAL)
|
||||
ata_port_desc(ap, "ext");
|
||||
}
|
||||
|
||||
static inline bool ata_tag_internal(unsigned int tag)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user