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Merge branch 'pci/controller/affinity'
- Add MSI_FLAG_NO_AFFINITY flag for devices that mux MSIs onto a single IRQ line and cannot set the affinity of each MSI to a specific CPU core (Marek Vasut) - Use MSI_FLAG_NO_AFFINITY and remove unnecessary .irq_set_affinity() implementations in aardvark, altera, brcmstb, dwc, mediatek-gen3, mediatek, mobiveil, plda, rcar, tegra, vmd, xilinx-nwl, xilinx-xdma, and xilinx drivers to avoid "IRQ: set affinity failed" warnings (Marek Vasut) * pci/controller/affinity: PCI: xilinx: Silence 'set affinity failed' warning PCI: xilinx-xdma: Silence 'set affinity failed' warning PCI: xilinx-nwl: Silence 'set affinity failed' warning PCI: vmd: Silence 'set affinity failed' warning PCI: tegra: Silence 'set affinity failed' warning PCI: rcar-host: Silence 'set affinity failed' warning PCI: plda: Silence 'set affinity failed' warning PCI: mobiveil: Silence 'set affinity failed' warning PCI: mediatek: Silence 'set affinity failed' warning PCI: mediatek-gen3: Silence 'set affinity failed' warning PCI: dwc: Silence 'set affinity failed' warning PCI: brcmstb: Silence 'set affinity failed' warning PCI: altera-msi: Silence 'set affinity failed' warning PCI: aardvark: Silence 'set affinity failed' warning genirq/msi: Silence 'set affinity failed' warning
This commit is contained in:
commit
f045bc60d5
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@ -189,12 +189,6 @@ static void ks_pcie_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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(int)data->hwirq, msg->address_hi, msg->address_lo);
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}
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static int ks_pcie_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void ks_pcie_msi_mask(struct irq_data *data)
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{
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struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(data);
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@ -247,7 +241,6 @@ static struct irq_chip ks_pcie_msi_irq_chip = {
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.name = "KEYSTONE-PCI-MSI",
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.irq_ack = ks_pcie_msi_irq_ack,
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.irq_compose_msi_msg = ks_pcie_compose_msi_msg,
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.irq_set_affinity = ks_pcie_msi_set_affinity,
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.irq_mask = ks_pcie_msi_mask,
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.irq_unmask = ks_pcie_msi_unmask,
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};
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@ -48,8 +48,9 @@ static struct irq_chip dw_pcie_msi_irq_chip = {
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};
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static struct msi_domain_info dw_pcie_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX |
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MSI_FLAG_MULTI_PCI_MSI,
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.chip = &dw_pcie_msi_irq_chip,
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};
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@ -116,12 +117,6 @@ static void dw_pci_setup_msi_msg(struct irq_data *d, struct msi_msg *msg)
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(int)d->hwirq, msg->address_hi, msg->address_lo);
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}
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static int dw_pci_msi_set_affinity(struct irq_data *d,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void dw_pci_bottom_mask(struct irq_data *d)
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{
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struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(d);
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@ -177,7 +172,6 @@ static struct irq_chip dw_pci_msi_bottom_irq_chip = {
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.name = "DWPCI-MSI",
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.irq_ack = dw_pci_bottom_ack,
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.irq_compose_msi_msg = dw_pci_setup_msi_msg,
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.irq_set_affinity = dw_pci_msi_set_affinity,
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.irq_mask = dw_pci_bottom_mask,
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.irq_unmask = dw_pci_bottom_unmask,
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};
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@ -360,8 +360,8 @@ static struct irq_chip mobiveil_msi_irq_chip = {
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};
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static struct msi_domain_info mobiveil_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
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.chip = &mobiveil_msi_irq_chip,
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};
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@ -378,16 +378,9 @@ static void mobiveil_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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(int)data->hwirq, msg->address_hi, msg->address_lo);
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}
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static int mobiveil_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static struct irq_chip mobiveil_msi_bottom_irq_chip = {
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.name = "Mobiveil MSI",
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.irq_compose_msi_msg = mobiveil_compose_msi_msg,
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.irq_set_affinity = mobiveil_msi_set_affinity,
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};
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static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain,
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@ -1304,12 +1304,6 @@ static void advk_msi_irq_compose_msi_msg(struct irq_data *data,
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msg->data = data->hwirq;
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}
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static int advk_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void advk_msi_irq_mask(struct irq_data *d)
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{
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struct advk_pcie *pcie = d->domain->host_data;
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@ -1353,7 +1347,6 @@ static void advk_msi_top_irq_unmask(struct irq_data *d)
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static struct irq_chip advk_msi_bottom_irq_chip = {
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.name = "MSI",
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.irq_compose_msi_msg = advk_msi_irq_compose_msi_msg,
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.irq_set_affinity = advk_msi_set_affinity,
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.irq_mask = advk_msi_irq_mask,
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.irq_unmask = advk_msi_irq_unmask,
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};
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@ -1451,7 +1444,8 @@ static struct irq_chip advk_msi_irq_chip = {
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static struct msi_domain_info advk_msi_domain_info = {
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI |
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MSI_FLAG_PCI_MSIX,
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.chip = &advk_msi_irq_chip,
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};
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@ -1629,11 +1629,6 @@ static void tegra_msi_irq_unmask(struct irq_data *d)
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spin_unlock_irqrestore(&msi->mask_lock, flags);
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}
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static int tegra_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void tegra_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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{
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struct tegra_msi *msi = irq_data_get_irq_chip_data(data);
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@ -1648,7 +1643,6 @@ static struct irq_chip tegra_msi_bottom_chip = {
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.irq_ack = tegra_msi_irq_ack,
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.irq_mask = tegra_msi_irq_mask,
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.irq_unmask = tegra_msi_irq_unmask,
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.irq_set_affinity = tegra_msi_set_affinity,
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.irq_compose_msi_msg = tegra_compose_msi_msg,
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};
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@ -1697,8 +1691,8 @@ static const struct irq_domain_ops tegra_msi_domain_ops = {
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};
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static struct msi_domain_info tegra_msi_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
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.chip = &tegra_msi_top_chip,
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};
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@ -81,8 +81,8 @@ static struct irq_chip altera_msi_irq_chip = {
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};
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static struct msi_domain_info altera_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
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.chip = &altera_msi_irq_chip,
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};
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@ -99,16 +99,9 @@ static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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(int)data->hwirq, msg->address_hi, msg->address_lo);
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}
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static int altera_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static struct irq_chip altera_msi_bottom_irq_chip = {
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.name = "Altera MSI",
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.irq_compose_msi_msg = altera_compose_msi_msg,
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.irq_set_affinity = altera_msi_set_affinity,
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};
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static int altera_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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@ -445,8 +445,8 @@ static struct irq_chip brcm_msi_irq_chip = {
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};
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static struct msi_domain_info brcm_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
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.chip = &brcm_msi_irq_chip,
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};
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@ -484,12 +484,6 @@ static void brcm_msi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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msg->data = (0xffff & PCIE_MISC_MSI_DATA_CONFIG_VAL_32) | data->hwirq;
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}
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static int brcm_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void brcm_msi_ack_irq(struct irq_data *data)
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{
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struct brcm_msi *msi = irq_data_get_irq_chip_data(data);
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@ -502,7 +496,6 @@ static void brcm_msi_ack_irq(struct irq_data *data)
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static struct irq_chip brcm_msi_bottom_irq_chip = {
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.name = "BRCM STB MSI",
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.irq_compose_msi_msg = brcm_msi_compose_msi_msg,
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.irq_set_affinity = brcm_msi_set_affinity,
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.irq_ack = brcm_msi_ack_irq,
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};
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@ -424,12 +424,6 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie)
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return 0;
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}
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static int mtk_pcie_set_affinity(struct irq_data *data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void mtk_pcie_msi_irq_mask(struct irq_data *data)
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{
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pci_msi_mask_irq(data);
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@ -450,8 +444,9 @@ static struct irq_chip mtk_msi_irq_chip = {
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};
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static struct msi_domain_info mtk_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX |
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MSI_FLAG_MULTI_PCI_MSI,
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.chip = &mtk_msi_irq_chip,
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};
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@ -517,7 +512,6 @@ static struct irq_chip mtk_msi_bottom_irq_chip = {
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.irq_mask = mtk_msi_bottom_irq_mask,
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.irq_unmask = mtk_msi_bottom_irq_unmask,
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.irq_compose_msi_msg = mtk_compose_msi_msg,
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.irq_set_affinity = mtk_pcie_set_affinity,
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.name = "MSI",
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};
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@ -618,7 +612,6 @@ static struct irq_chip mtk_intx_irq_chip = {
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.irq_mask = mtk_intx_mask,
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.irq_unmask = mtk_intx_unmask,
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.irq_eoi = mtk_intx_eoi,
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.irq_set_affinity = mtk_pcie_set_affinity,
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.name = "INTx",
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};
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@ -407,12 +407,6 @@ static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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(int)data->hwirq, msg->address_hi, msg->address_lo);
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}
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static int mtk_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void mtk_msi_ack_irq(struct irq_data *data)
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{
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struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data);
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@ -424,7 +418,6 @@ static void mtk_msi_ack_irq(struct irq_data *data)
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static struct irq_chip mtk_msi_bottom_irq_chip = {
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.name = "MTK MSI",
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.irq_compose_msi_msg = mtk_compose_msi_msg,
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.irq_set_affinity = mtk_msi_set_affinity,
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.irq_ack = mtk_msi_ack_irq,
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};
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@ -486,8 +479,8 @@ static struct irq_chip mtk_msi_irq_chip = {
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};
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static struct msi_domain_info mtk_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
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.chip = &mtk_msi_irq_chip,
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};
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@ -658,11 +658,6 @@ static void rcar_msi_irq_unmask(struct irq_data *d)
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spin_unlock_irqrestore(&msi->mask_lock, flags);
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}
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static int rcar_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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{
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struct rcar_msi *msi = irq_data_get_irq_chip_data(data);
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@ -678,7 +673,6 @@ static struct irq_chip rcar_msi_bottom_chip = {
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.irq_ack = rcar_msi_irq_ack,
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.irq_mask = rcar_msi_irq_mask,
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.irq_unmask = rcar_msi_irq_unmask,
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.irq_set_affinity = rcar_msi_set_affinity,
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.irq_compose_msi_msg = rcar_compose_msi_msg,
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};
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@ -725,8 +719,8 @@ static const struct irq_domain_ops rcar_msi_domain_ops = {
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};
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static struct msi_domain_info rcar_msi_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
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.chip = &rcar_msi_top_chip,
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};
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|
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@ -355,8 +355,8 @@ static struct irq_chip xilinx_msi_irq_chip = {
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};
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static struct msi_domain_info xilinx_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
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.chip = &xilinx_msi_irq_chip,
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};
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@ -370,16 +370,9 @@ static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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msg->data = data->hwirq;
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}
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static int xilinx_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static struct irq_chip xilinx_irq_chip = {
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.name = "pl_dma:MSI",
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.irq_compose_msi_msg = xilinx_compose_msi_msg,
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.irq_set_affinity = xilinx_msi_set_affinity,
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};
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static int xilinx_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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|
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@ -425,8 +425,8 @@ static struct irq_chip nwl_msi_irq_chip = {
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};
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static struct msi_domain_info nwl_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
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.chip = &nwl_msi_irq_chip,
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};
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#endif
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|
@ -441,16 +441,9 @@ static void nwl_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
|
|||
msg->data = data->hwirq;
|
||||
}
|
||||
|
||||
static int nwl_msi_set_affinity(struct irq_data *irq_data,
|
||||
const struct cpumask *mask, bool force)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static struct irq_chip nwl_irq_chip = {
|
||||
.name = "Xilinx MSI",
|
||||
.irq_compose_msi_msg = nwl_compose_msi_msg,
|
||||
.irq_set_affinity = nwl_msi_set_affinity,
|
||||
};
|
||||
|
||||
static int nwl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
|
||||
|
|
|
@ -208,11 +208,6 @@ static struct irq_chip xilinx_msi_top_chip = {
|
|||
.irq_ack = xilinx_msi_top_irq_ack,
|
||||
};
|
||||
|
||||
static int xilinx_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
|
||||
{
|
||||
struct xilinx_pcie *pcie = irq_data_get_irq_chip_data(data);
|
||||
|
@ -225,7 +220,6 @@ static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
|
|||
|
||||
static struct irq_chip xilinx_msi_bottom_chip = {
|
||||
.name = "Xilinx MSI",
|
||||
.irq_set_affinity = xilinx_msi_set_affinity,
|
||||
.irq_compose_msi_msg = xilinx_compose_msi_msg,
|
||||
};
|
||||
|
||||
|
@ -271,7 +265,8 @@ static const struct irq_domain_ops xilinx_msi_domain_ops = {
|
|||
};
|
||||
|
||||
static struct msi_domain_info xilinx_msi_info = {
|
||||
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS),
|
||||
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
|
||||
MSI_FLAG_NO_AFFINITY,
|
||||
.chip = &xilinx_msi_top_chip,
|
||||
};
|
||||
|
||||
|
|
|
@ -76,17 +76,10 @@ static void plda_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
|
|||
(int)data->hwirq, msg->address_hi, msg->address_lo);
|
||||
}
|
||||
|
||||
static int plda_msi_set_affinity(struct irq_data *irq_data,
|
||||
const struct cpumask *mask, bool force)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static struct irq_chip plda_msi_bottom_irq_chip = {
|
||||
.name = "PLDA MSI",
|
||||
.irq_ack = plda_msi_bottom_irq_ack,
|
||||
.irq_compose_msi_msg = plda_compose_msi_msg,
|
||||
.irq_set_affinity = plda_msi_set_affinity,
|
||||
};
|
||||
|
||||
static int plda_irq_msi_domain_alloc(struct irq_domain *domain,
|
||||
|
@ -146,8 +139,8 @@ static struct irq_chip plda_msi_irq_chip = {
|
|||
};
|
||||
|
||||
static struct msi_domain_info plda_msi_domain_info = {
|
||||
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
|
||||
MSI_FLAG_PCI_MSIX),
|
||||
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
|
||||
MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
|
||||
.chip = &plda_msi_irq_chip,
|
||||
};
|
||||
|
||||
|
|
|
@ -204,22 +204,11 @@ static void vmd_irq_disable(struct irq_data *data)
|
|||
raw_spin_unlock_irqrestore(&list_lock, flags);
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX: Stubbed until we develop acceptable way to not create conflicts with
|
||||
* other devices sharing the same vector.
|
||||
*/
|
||||
static int vmd_irq_set_affinity(struct irq_data *data,
|
||||
const struct cpumask *dest, bool force)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static struct irq_chip vmd_msi_controller = {
|
||||
.name = "VMD-MSI",
|
||||
.irq_enable = vmd_irq_enable,
|
||||
.irq_disable = vmd_irq_disable,
|
||||
.irq_compose_msi_msg = vmd_compose_msi_msg,
|
||||
.irq_set_affinity = vmd_irq_set_affinity,
|
||||
};
|
||||
|
||||
static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
|
||||
|
@ -326,7 +315,7 @@ static struct msi_domain_ops vmd_msi_domain_ops = {
|
|||
|
||||
static struct msi_domain_info vmd_msi_domain_info = {
|
||||
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
|
||||
MSI_FLAG_PCI_MSIX,
|
||||
MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
|
||||
.ops = &vmd_msi_domain_ops,
|
||||
.chip = &vmd_msi_controller,
|
||||
};
|
||||
|
|
|
@ -554,6 +554,8 @@ enum {
|
|||
MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19),
|
||||
/* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */
|
||||
MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20),
|
||||
/* PCI MSIs cannot be steered separately to CPU cores */
|
||||
MSI_FLAG_NO_AFFINITY = (1 << 21),
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
@ -832,7 +832,7 @@ static void msi_domain_update_chip_ops(struct msi_domain_info *info)
|
|||
struct irq_chip *chip = info->chip;
|
||||
|
||||
BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
|
||||
if (!chip->irq_set_affinity)
|
||||
if (!chip->irq_set_affinity && !(info->flags & MSI_FLAG_NO_AFFINITY))
|
||||
chip->irq_set_affinity = msi_domain_set_affinity;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue
Block a user