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Merge branch 'eth-fix-calling-napi_enable-in-atomic-context'
Jakub Kicinski says: ==================== eth: fix calling napi_enable() in atomic context Dan has reported that I missed a lot of drivers which call napi_enable() in atomic with the naive coccinelle search for spin locks: https://lore.kernel.org/dcfd56bc-de32-4b11-9e19-d8bd1543745d@stanley.mountain Fix them. Most of the fixes involve taking the netdev_lock() before the spin lock. mt76 is special because we can just move napi_enable() from the BH section. All patches compile tested only. v2: https://lore.kernel.org/20250123004520.806855-1-kuba@kernel.org v1: https://lore.kernel.org/20250121221519.392014-1-kuba@kernel.org ==================== Link: https://patch.msgid.link/20250124031841.1179756-1-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
f17b15d0c2
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@ -7424,7 +7424,7 @@ static void tg3_napi_enable(struct tg3 *tp)
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for (i = 0; i < tp->irq_cnt; i++) {
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tnapi = &tp->napi[i];
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napi_enable(&tnapi->napi);
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napi_enable_locked(&tnapi->napi);
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if (tnapi->tx_buffers) {
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netif_queue_set_napi(tp->dev, txq_idx,
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NETDEV_QUEUE_TYPE_TX,
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@ -7445,9 +7445,10 @@ static void tg3_napi_init(struct tg3 *tp)
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int i;
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for (i = 0; i < tp->irq_cnt; i++) {
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netif_napi_add(tp->dev, &tp->napi[i].napi,
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i ? tg3_poll_msix : tg3_poll);
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netif_napi_set_irq(&tp->napi[i].napi, tp->napi[i].irq_vec);
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netif_napi_add_locked(tp->dev, &tp->napi[i].napi,
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i ? tg3_poll_msix : tg3_poll);
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netif_napi_set_irq_locked(&tp->napi[i].napi,
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tp->napi[i].irq_vec);
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}
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}
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@ -11259,6 +11260,8 @@ static void tg3_timer_stop(struct tg3 *tp)
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static int tg3_restart_hw(struct tg3 *tp, bool reset_phy)
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__releases(tp->lock)
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__acquires(tp->lock)
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__releases(tp->dev->lock)
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__acquires(tp->dev->lock)
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{
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int err;
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@ -11271,7 +11274,9 @@ static int tg3_restart_hw(struct tg3 *tp, bool reset_phy)
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tg3_timer_stop(tp);
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tp->irq_sync = 0;
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tg3_napi_enable(tp);
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netdev_unlock(tp->dev);
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dev_close(tp->dev);
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netdev_lock(tp->dev);
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tg3_full_lock(tp, 0);
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}
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return err;
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@ -11299,6 +11304,7 @@ static void tg3_reset_task(struct work_struct *work)
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tg3_netif_stop(tp);
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netdev_lock(tp->dev);
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tg3_full_lock(tp, 1);
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if (tg3_flag(tp, TX_RECOVERY_PENDING)) {
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@ -11318,12 +11324,14 @@ static void tg3_reset_task(struct work_struct *work)
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* call cancel_work_sync() and wait forever.
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*/
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tg3_flag_clear(tp, RESET_TASK_PENDING);
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netdev_unlock(tp->dev);
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dev_close(tp->dev);
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goto out;
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}
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tg3_netif_start(tp);
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tg3_full_unlock(tp);
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netdev_unlock(tp->dev);
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tg3_phy_start(tp);
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tg3_flag_clear(tp, RESET_TASK_PENDING);
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out:
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@ -11683,9 +11691,11 @@ static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq,
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if (err)
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goto out_ints_fini;
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netdev_lock(dev);
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tg3_napi_init(tp);
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tg3_napi_enable(tp);
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netdev_unlock(dev);
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for (i = 0; i < tp->irq_cnt; i++) {
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err = tg3_request_irq(tp, i);
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@ -12569,6 +12579,7 @@ static int tg3_set_ringparam(struct net_device *dev,
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irq_sync = 1;
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}
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netdev_lock(dev);
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tg3_full_lock(tp, irq_sync);
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tp->rx_pending = ering->rx_pending;
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@ -12597,6 +12608,7 @@ static int tg3_set_ringparam(struct net_device *dev,
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}
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tg3_full_unlock(tp);
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netdev_unlock(dev);
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if (irq_sync && !err)
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tg3_phy_start(tp);
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@ -12678,6 +12690,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
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irq_sync = 1;
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}
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netdev_lock(dev);
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tg3_full_lock(tp, irq_sync);
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if (epause->autoneg)
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@ -12707,6 +12720,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
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}
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tg3_full_unlock(tp);
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netdev_unlock(dev);
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}
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tp->phy_flags |= TG3_PHYFLG_USER_CONFIGURED;
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@ -13911,6 +13925,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
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data[TG3_INTERRUPT_TEST] = 1;
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}
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netdev_lock(dev);
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tg3_full_lock(tp, 0);
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tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
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@ -13922,6 +13937,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
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}
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tg3_full_unlock(tp);
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netdev_unlock(dev);
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if (irq_sync && !err2)
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tg3_phy_start(tp);
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@ -14365,6 +14381,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)
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tg3_set_mtu(dev, tp, new_mtu);
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netdev_lock(dev);
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tg3_full_lock(tp, 1);
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tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
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@ -14384,6 +14401,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)
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tg3_netif_start(tp);
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tg3_full_unlock(tp);
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netdev_unlock(dev);
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if (!err)
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tg3_phy_start(tp);
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@ -18164,6 +18182,7 @@ static int tg3_resume(struct device *device)
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netif_device_attach(dev);
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netdev_lock(dev);
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tg3_full_lock(tp, 0);
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tg3_ape_driver_state_change(tp, RESET_KIND_INIT);
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@ -18180,6 +18199,7 @@ static int tg3_resume(struct device *device)
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out:
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tg3_full_unlock(tp);
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netdev_unlock(dev);
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if (!err)
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tg3_phy_start(tp);
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@ -18260,7 +18280,9 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev,
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done:
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if (state == pci_channel_io_perm_failure) {
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if (netdev) {
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netdev_lock(netdev);
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tg3_napi_enable(tp);
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netdev_unlock(netdev);
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dev_close(netdev);
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}
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err = PCI_ERS_RESULT_DISCONNECT;
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@ -18314,7 +18336,9 @@ static pci_ers_result_t tg3_io_slot_reset(struct pci_dev *pdev)
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done:
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if (rc != PCI_ERS_RESULT_RECOVERED && netdev && netif_running(netdev)) {
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netdev_lock(netdev);
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tg3_napi_enable(tp);
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netdev_unlock(netdev);
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dev_close(netdev);
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}
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rtnl_unlock();
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@ -18340,12 +18364,14 @@ static void tg3_io_resume(struct pci_dev *pdev)
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if (!netdev || !netif_running(netdev))
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goto done;
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netdev_lock(netdev);
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tg3_full_lock(tp, 0);
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tg3_ape_driver_state_change(tp, RESET_KIND_INIT);
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tg3_flag_set(tp, INIT_COMPLETE);
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err = tg3_restart_hw(tp, true);
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if (err) {
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tg3_full_unlock(tp);
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netdev_unlock(netdev);
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netdev_err(netdev, "Cannot restart hardware after reset.\n");
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goto done;
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}
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@ -18357,6 +18383,7 @@ static void tg3_io_resume(struct pci_dev *pdev)
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tg3_netif_start(tp);
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tg3_full_unlock(tp);
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netdev_unlock(netdev);
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tg3_phy_start(tp);
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@ -1120,20 +1120,6 @@ static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)
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}
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}
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static void nv_napi_enable(struct net_device *dev)
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{
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struct fe_priv *np = get_nvpriv(dev);
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napi_enable(&np->napi);
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}
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static void nv_napi_disable(struct net_device *dev)
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{
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struct fe_priv *np = get_nvpriv(dev);
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napi_disable(&np->napi);
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}
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#define MII_READ (-1)
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/* mii_rw: read/write a register on the PHY.
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*
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@ -3114,7 +3100,7 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu)
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* Changing the MTU is a rare event, it shouldn't matter.
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*/
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nv_disable_irq(dev);
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nv_napi_disable(dev);
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napi_disable(&np->napi);
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netif_tx_lock_bh(dev);
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netif_addr_lock(dev);
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spin_lock(&np->lock);
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@ -3143,7 +3129,7 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu)
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spin_unlock(&np->lock);
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netif_addr_unlock(dev);
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netif_tx_unlock_bh(dev);
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nv_napi_enable(dev);
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napi_enable(&np->napi);
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nv_enable_irq(dev);
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}
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return 0;
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@ -4731,7 +4717,7 @@ static int nv_set_ringparam(struct net_device *dev,
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if (netif_running(dev)) {
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nv_disable_irq(dev);
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nv_napi_disable(dev);
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napi_disable(&np->napi);
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netif_tx_lock_bh(dev);
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netif_addr_lock(dev);
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spin_lock(&np->lock);
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|
@ -4784,7 +4770,7 @@ static int nv_set_ringparam(struct net_device *dev,
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spin_unlock(&np->lock);
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netif_addr_unlock(dev);
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netif_tx_unlock_bh(dev);
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nv_napi_enable(dev);
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napi_enable(&np->napi);
|
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nv_enable_irq(dev);
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}
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return 0;
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|
@ -5277,7 +5263,7 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64
|
|||
if (test->flags & ETH_TEST_FL_OFFLINE) {
|
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if (netif_running(dev)) {
|
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netif_stop_queue(dev);
|
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nv_napi_disable(dev);
|
||||
napi_disable(&np->napi);
|
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netif_tx_lock_bh(dev);
|
||||
netif_addr_lock(dev);
|
||||
spin_lock_irq(&np->lock);
|
||||
|
@ -5334,7 +5320,7 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64
|
|||
/* restart rx engine */
|
||||
nv_start_rxtx(dev);
|
||||
netif_start_queue(dev);
|
||||
nv_napi_enable(dev);
|
||||
napi_enable(&np->napi);
|
||||
nv_enable_hw_interrupts(dev, np->irqmask);
|
||||
}
|
||||
}
|
||||
|
@ -5576,6 +5562,7 @@ static int nv_open(struct net_device *dev)
|
|||
/* ask for interrupts */
|
||||
nv_enable_hw_interrupts(dev, np->irqmask);
|
||||
|
||||
netdev_lock(dev);
|
||||
spin_lock_irq(&np->lock);
|
||||
writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
|
||||
writel(0, base + NvRegMulticastAddrB);
|
||||
|
@ -5594,7 +5581,7 @@ static int nv_open(struct net_device *dev)
|
|||
ret = nv_update_linkspeed(dev);
|
||||
nv_start_rxtx(dev);
|
||||
netif_start_queue(dev);
|
||||
nv_napi_enable(dev);
|
||||
napi_enable_locked(&np->napi);
|
||||
|
||||
if (ret) {
|
||||
netif_carrier_on(dev);
|
||||
|
@ -5611,6 +5598,7 @@ static int nv_open(struct net_device *dev)
|
|||
round_jiffies(jiffies + STATS_INTERVAL));
|
||||
|
||||
spin_unlock_irq(&np->lock);
|
||||
netdev_unlock(dev);
|
||||
|
||||
/* If the loopback feature was set while the device was down, make sure
|
||||
* that it's set correctly now.
|
||||
|
@ -5632,7 +5620,7 @@ static int nv_close(struct net_device *dev)
|
|||
spin_lock_irq(&np->lock);
|
||||
np->in_shutdown = 1;
|
||||
spin_unlock_irq(&np->lock);
|
||||
nv_napi_disable(dev);
|
||||
napi_disable(&np->napi);
|
||||
synchronize_irq(np->pci_dev->irq);
|
||||
|
||||
del_timer_sync(&np->oom_kick);
|
||||
|
|
|
@ -1684,6 +1684,7 @@ static void rtl8139_tx_timeout_task (struct work_struct *work)
|
|||
if (tmp8 & CmdTxEnb)
|
||||
RTL_W8 (ChipCmd, CmdRxEnb);
|
||||
|
||||
netdev_lock(dev);
|
||||
spin_lock_bh(&tp->rx_lock);
|
||||
/* Disable interrupts by clearing the interrupt mask. */
|
||||
RTL_W16 (IntrMask, 0x0000);
|
||||
|
@ -1694,11 +1695,12 @@ static void rtl8139_tx_timeout_task (struct work_struct *work)
|
|||
spin_unlock_irq(&tp->lock);
|
||||
|
||||
/* ...and finally, reset everything */
|
||||
napi_enable(&tp->napi);
|
||||
napi_enable_locked(&tp->napi);
|
||||
rtl8139_hw_start(dev);
|
||||
netif_wake_queue(dev);
|
||||
|
||||
spin_unlock_bh(&tp->rx_lock);
|
||||
netdev_unlock(dev);
|
||||
}
|
||||
|
||||
static void rtl8139_tx_timeout(struct net_device *dev, unsigned int txqueue)
|
||||
|
|
|
@ -6086,7 +6086,7 @@ static void niu_enable_napi(struct niu *np)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < np->num_ldg; i++)
|
||||
napi_enable(&np->ldg[i].napi);
|
||||
napi_enable_locked(&np->ldg[i].napi);
|
||||
}
|
||||
|
||||
static void niu_disable_napi(struct niu *np)
|
||||
|
@ -6116,7 +6116,9 @@ static int niu_open(struct net_device *dev)
|
|||
if (err)
|
||||
goto out_free_channels;
|
||||
|
||||
netdev_lock(dev);
|
||||
niu_enable_napi(np);
|
||||
netdev_unlock(dev);
|
||||
|
||||
spin_lock_irq(&np->lock);
|
||||
|
||||
|
@ -6521,6 +6523,7 @@ static void niu_reset_task(struct work_struct *work)
|
|||
|
||||
niu_reset_buffers(np);
|
||||
|
||||
netdev_lock(np->dev);
|
||||
spin_lock_irqsave(&np->lock, flags);
|
||||
|
||||
err = niu_init_hw(np);
|
||||
|
@ -6531,6 +6534,7 @@ static void niu_reset_task(struct work_struct *work)
|
|||
}
|
||||
|
||||
spin_unlock_irqrestore(&np->lock, flags);
|
||||
netdev_unlock(np->dev);
|
||||
}
|
||||
|
||||
static void niu_tx_timeout(struct net_device *dev, unsigned int txqueue)
|
||||
|
@ -6761,7 +6765,9 @@ static int niu_change_mtu(struct net_device *dev, int new_mtu)
|
|||
|
||||
niu_free_channels(np);
|
||||
|
||||
netdev_lock(dev);
|
||||
niu_enable_napi(np);
|
||||
netdev_unlock(dev);
|
||||
|
||||
err = niu_alloc_channels(np);
|
||||
if (err)
|
||||
|
@ -9937,6 +9943,7 @@ static int __maybe_unused niu_resume(struct device *dev_d)
|
|||
|
||||
spin_lock_irqsave(&np->lock, flags);
|
||||
|
||||
netdev_lock(dev);
|
||||
err = niu_init_hw(np);
|
||||
if (!err) {
|
||||
np->timer.expires = jiffies + HZ;
|
||||
|
@ -9945,6 +9952,7 @@ static int __maybe_unused niu_resume(struct device *dev_d)
|
|||
}
|
||||
|
||||
spin_unlock_irqrestore(&np->lock, flags);
|
||||
netdev_unlock(dev);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
|
|
@ -1568,7 +1568,7 @@ static void init_registers(struct net_device *dev)
|
|||
if (rp->quirks & rqMgmt)
|
||||
rhine_init_cam_filter(dev);
|
||||
|
||||
napi_enable(&rp->napi);
|
||||
napi_enable_locked(&rp->napi);
|
||||
|
||||
iowrite16(RHINE_EVENT & 0xffff, ioaddr + IntrEnable);
|
||||
|
||||
|
@ -1696,7 +1696,10 @@ static int rhine_open(struct net_device *dev)
|
|||
rhine_power_init(dev);
|
||||
rhine_chip_reset(dev);
|
||||
rhine_task_enable(rp);
|
||||
|
||||
netdev_lock(dev);
|
||||
init_registers(dev);
|
||||
netdev_unlock(dev);
|
||||
|
||||
netif_dbg(rp, ifup, dev, "%s() Done - status %04x MII status: %04x\n",
|
||||
__func__, ioread16(ioaddr + ChipCmd),
|
||||
|
@ -1727,6 +1730,8 @@ static void rhine_reset_task(struct work_struct *work)
|
|||
|
||||
napi_disable(&rp->napi);
|
||||
netif_tx_disable(dev);
|
||||
|
||||
netdev_lock(dev);
|
||||
spin_lock_bh(&rp->lock);
|
||||
|
||||
/* clear all descriptors */
|
||||
|
@ -1740,6 +1745,7 @@ static void rhine_reset_task(struct work_struct *work)
|
|||
init_registers(dev);
|
||||
|
||||
spin_unlock_bh(&rp->lock);
|
||||
netdev_unlock(dev);
|
||||
|
||||
netif_trans_update(dev); /* prevent tx timeout */
|
||||
dev->stats.tx_errors++;
|
||||
|
@ -2541,9 +2547,12 @@ static int rhine_resume(struct device *device)
|
|||
alloc_tbufs(dev);
|
||||
rhine_reset_rbufs(rp);
|
||||
rhine_task_enable(rp);
|
||||
|
||||
netdev_lock(dev);
|
||||
spin_lock_bh(&rp->lock);
|
||||
init_registers(dev);
|
||||
spin_unlock_bh(&rp->lock);
|
||||
netdev_unlock(dev);
|
||||
|
||||
netif_device_attach(dev);
|
||||
|
||||
|
|
|
@ -1479,14 +1479,13 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
|
|||
tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
|
||||
mt7603_beacon_set_timer(dev, -1, beacon_int);
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
|
||||
napi_enable(&dev->mt76.napi[0]);
|
||||
napi_schedule(&dev->mt76.napi[0]);
|
||||
|
||||
napi_enable(&dev->mt76.napi[1]);
|
||||
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
napi_schedule(&dev->mt76.napi[0]);
|
||||
napi_schedule(&dev->mt76.napi[1]);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -164,12 +164,16 @@ static int mt7615_pci_resume(struct pci_dev *pdev)
|
|||
dev_err(mdev->dev, "PDMA engine must be reinitialized\n");
|
||||
|
||||
mt76_worker_enable(&mdev->tx_worker);
|
||||
local_bh_disable();
|
||||
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_enable(&mdev->napi[i]);
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_enable(&mdev->tx_napi);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_schedule(&mdev->tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -262,12 +262,14 @@ void mt7615_mac_reset_work(struct work_struct *work)
|
|||
|
||||
mt76_worker_enable(&dev->mt76.tx_worker);
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
}
|
||||
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
local_bh_enable();
|
||||
|
|
|
@ -282,14 +282,16 @@ static int mt76x0e_resume(struct pci_dev *pdev)
|
|||
|
||||
mt76_worker_enable(&mdev->tx_worker);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
mt76_queue_rx_reset(dev, i);
|
||||
napi_enable(&mdev->napi[i]);
|
||||
}
|
||||
napi_enable(&mdev->tx_napi);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
|
||||
napi_enable(&mdev->tx_napi);
|
||||
napi_schedule(&mdev->tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -504,12 +504,14 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev)
|
|||
mt76_worker_enable(&dev->mt76.tx_worker);
|
||||
tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
}
|
||||
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
local_bh_enable();
|
||||
|
|
|
@ -151,12 +151,15 @@ mt76x2e_resume(struct pci_dev *pdev)
|
|||
|
||||
mt76_worker_enable(&mdev->tx_worker);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_enable(&mdev->napi[i]);
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_enable(&mdev->tx_napi);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_schedule(&mdev->tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -1356,10 +1356,15 @@ mt7915_mac_restart(struct mt7915_dev *dev)
|
|||
|
||||
mt7915_dma_reset(dev, true);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
if (mdev->q_rx[i].ndesc) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
}
|
||||
}
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
if (mdev->q_rx[i].ndesc) {
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
}
|
||||
|
@ -1419,8 +1424,9 @@ out:
|
|||
if (phy2)
|
||||
clear_bit(MT76_RESET, &phy2->mt76->state);
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
@ -1570,9 +1576,12 @@ void mt7915_mac_reset_work(struct work_struct *work)
|
|||
if (phy2)
|
||||
clear_bit(MT76_RESET, &phy2->mt76->state);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
}
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
local_bh_enable();
|
||||
|
@ -1581,8 +1590,8 @@ void mt7915_mac_reset_work(struct work_struct *work)
|
|||
|
||||
mt76_worker_enable(&dev->mt76.tx_worker);
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -523,12 +523,15 @@ static int mt7921_pci_resume(struct device *device)
|
|||
|
||||
mt76_worker_enable(&mdev->tx_worker);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_enable(&mdev->napi[i]);
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_enable(&mdev->tx_napi);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_schedule(&mdev->tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -81,9 +81,12 @@ int mt7921e_mac_reset(struct mt792x_dev *dev)
|
|||
|
||||
mt792x_wpdma_reset(dev, true);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
}
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
local_bh_enable();
|
||||
|
@ -115,8 +118,8 @@ int mt7921e_mac_reset(struct mt792x_dev *dev)
|
|||
err = __mt7921_start(&dev->phy);
|
||||
out:
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -556,12 +556,15 @@ static int mt7925_pci_resume(struct device *device)
|
|||
|
||||
mt76_worker_enable(&mdev->tx_worker);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_enable(&mdev->napi[i]);
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_enable(&mdev->tx_napi);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
napi_schedule(&mdev->napi[i]);
|
||||
}
|
||||
napi_schedule(&mdev->tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -101,12 +101,15 @@ int mt7925e_mac_reset(struct mt792x_dev *dev)
|
|||
|
||||
mt792x_wpdma_reset(dev, true);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
}
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
|
@ -1695,7 +1695,6 @@ mt7996_mac_restart(struct mt7996_dev *dev)
|
|||
|
||||
mt7996_dma_reset(dev, true);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(mdev, i) {
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
|
||||
mt76_queue_is_wed_rro(&mdev->q_rx[i]))
|
||||
|
@ -1703,10 +1702,11 @@ mt7996_mac_restart(struct mt7996_dev *dev)
|
|||
|
||||
if (mdev->q_rx[i].ndesc) {
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
local_bh_enable();
|
||||
}
|
||||
}
|
||||
local_bh_enable();
|
||||
clear_bit(MT76_MCU_RESET, &dev->mphy.state);
|
||||
clear_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
|
||||
|
||||
|
@ -1764,8 +1764,8 @@ out:
|
|||
if (phy3)
|
||||
clear_bit(MT76_RESET, &phy3->mt76->state);
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
@ -1958,23 +1958,23 @@ void mt7996_mac_reset_work(struct work_struct *work)
|
|||
if (phy3)
|
||||
clear_bit(MT76_RESET, &phy3->mt76->state);
|
||||
|
||||
local_bh_disable();
|
||||
mt76_for_each_q_rx(&dev->mt76, i) {
|
||||
if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
|
||||
mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
|
||||
continue;
|
||||
|
||||
napi_enable(&dev->mt76.napi[i]);
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.napi[i]);
|
||||
local_bh_enable();
|
||||
}
|
||||
local_bh_enable();
|
||||
|
||||
tasklet_schedule(&dev->mt76.irq_tasklet);
|
||||
|
||||
mt76_worker_enable(&dev->mt76.tx_worker);
|
||||
|
||||
local_bh_disable();
|
||||
napi_enable(&dev->mt76.tx_napi);
|
||||
local_bh_disable();
|
||||
napi_schedule(&dev->mt76.tx_napi);
|
||||
local_bh_enable();
|
||||
|
||||
|
|
Loading…
Reference in New Issue
Block a user