drm/xe/lrc: Add table with LRC layout

Add a table to document the LRC's BO layout to make it easier to
visualize how each region stacks on top of each other.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Link: https://lore.kernel.org/r/20250710-lrc-refactors-v2-4-a5e2ca03f6bd@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
This commit is contained in:
Lucas De Marchi 2025-07-10 13:33:49 -07:00
parent aded26ccaa
commit f4d51b6ce5

View File

@ -43,6 +43,30 @@
#define LRC_INDIRECT_RING_STATE_SIZE SZ_4K
#define LRC_WA_BB_SIZE SZ_4K
/*
* Layout of the LRC and associated data allocated as
* lrc->bo:
*
* Region Size
* +============================+=================================+ <- __xe_lrc_ring_offset()
* | Ring | ring_size, see |
* | | xe_lrc_init() |
* +============================+=================================+ <- __xe_lrc_pphwsp_offset()
* | PPHWSP (includes SW state) | 4K |
* +----------------------------+---------------------------------+ <- __xe_lrc_regs_offset()
* | Engine Context Image | n * 4K, see |
* | | xe_gt_lrc_size() |
* +----------------------------+---------------------------------+ <- __xe_lrc_indirect_ring_offset()
* | Indirect Ring State Page | 0 or 4k, see |
* | | XE_LRC_FLAG_INDIRECT_RING_STATE |
* +============================+=================================+ <- __xe_lrc_indirect_ctx_offset()
* | Indirect Context Page | 0 or 4k, see |
* | | XE_LRC_FLAG_INDIRECT_CTX |
* +============================+=================================+ <- __xe_lrc_wa_bb_offset()
* | WA BB Per Ctx | 4k |
* +============================+=================================+ <- xe_bo_size(lrc->bo)
*/
static struct xe_device *
lrc_to_xe(struct xe_lrc *lrc)
{