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arm64: dts: imx8mn-beacon: Fix HS400 USDHC clock speed

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[ Upstream commit e16ad6c799 ]

The reference manual for the i.MX8MN states the clock rate in
MMC mode is 1/2 of the input clock, therefore to properly run
at HS400 rates, the input clock must be 400MHz to operate at
200MHz.  Currently the clock is set to 200MHz which is half the
rate it should be, so the throughput is half of what it should be
for HS400 operation.

Fixes: 36ca3c8ccb ("arm64: dts: imx: Add Beacon i.MX8M Nano development kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Adam Ford 2025-06-20 16:34:46 -05:00 committed by Greg Kroah-Hartman
parent a7b5787db8
commit fdbce5ec39
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
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@ -295,6 +295,8 @@
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
assigned-clocks = <&clk IMX8MN_CLK_USDHC3>;
assigned-clock-rates = <400000000>;
bus-width = <8>;
non-removable;
status = "okay";