Sergey Matyukevich 9f393d8e75 riscv: dts: allwinner: d1: fix vlenb property ... According to [1], the C906 vector registers are 128 bits wide. The 'thead,vlenb' property specifies the vector register length in bytes, so its value must be set to 16. [1] https://dl.linux-sunxi.org/D1/Xuantie_C906_R1S0_User_Manual.pdf Fixes: ce1daeeba6 ("riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree") Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com> Link: https://patch.msgid.link/20251119203508.1032716-1-geomatsi@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>		2025-11-22 09:19:42 +08:00
..
dts	riscv: dts: allwinner: d1: fix vlenb property	2025-11-22 09:19:42 +08:00
.gitignore	riscv: efi: enable generic EFI compressed boot	2022-09-20 09:50:30 +02:00
install.sh	kbuild: Abort make on install failures	2024-07-20 13:34:54 +09:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00
loader.S
Makefile	kbuild: Create intermediate vmlinux build with relocations preserved	2025-03-17 00:29:50 +09:00