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1b30f87e08
Not starting the TDR after GT reset on exec queue which have been restarted can lead to jobs being able to be run forever. Fix this by restarting the TDR. Fixes:dd08ebf6c3("drm/xe: Introduce a new DRM driver for Intel GPUs") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240724235919.1917216-1-matthew.brost@intel.com (cherry picked from commit8ec5a4e5ce) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
114 lines
2.8 KiB
C
114 lines
2.8 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2023 Intel Corporation
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*/
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#include "xe_gpu_scheduler.h"
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static void xe_sched_process_msg_queue(struct xe_gpu_scheduler *sched)
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{
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if (!READ_ONCE(sched->base.pause_submit))
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queue_work(sched->base.submit_wq, &sched->work_process_msg);
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}
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static void xe_sched_process_msg_queue_if_ready(struct xe_gpu_scheduler *sched)
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{
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struct xe_sched_msg *msg;
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xe_sched_msg_lock(sched);
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msg = list_first_entry_or_null(&sched->msgs, struct xe_sched_msg, link);
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if (msg)
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xe_sched_process_msg_queue(sched);
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xe_sched_msg_unlock(sched);
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}
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static struct xe_sched_msg *
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xe_sched_get_msg(struct xe_gpu_scheduler *sched)
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{
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struct xe_sched_msg *msg;
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xe_sched_msg_lock(sched);
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msg = list_first_entry_or_null(&sched->msgs,
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struct xe_sched_msg, link);
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if (msg)
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list_del_init(&msg->link);
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xe_sched_msg_unlock(sched);
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return msg;
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}
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static void xe_sched_process_msg_work(struct work_struct *w)
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{
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struct xe_gpu_scheduler *sched =
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container_of(w, struct xe_gpu_scheduler, work_process_msg);
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struct xe_sched_msg *msg;
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if (READ_ONCE(sched->base.pause_submit))
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return;
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msg = xe_sched_get_msg(sched);
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if (msg) {
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sched->ops->process_msg(msg);
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xe_sched_process_msg_queue_if_ready(sched);
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}
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}
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int xe_sched_init(struct xe_gpu_scheduler *sched,
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const struct drm_sched_backend_ops *ops,
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const struct xe_sched_backend_ops *xe_ops,
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struct workqueue_struct *submit_wq,
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uint32_t hw_submission, unsigned hang_limit,
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long timeout, struct workqueue_struct *timeout_wq,
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atomic_t *score, const char *name,
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struct device *dev)
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{
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sched->ops = xe_ops;
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INIT_LIST_HEAD(&sched->msgs);
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INIT_WORK(&sched->work_process_msg, xe_sched_process_msg_work);
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return drm_sched_init(&sched->base, ops, submit_wq, 1, hw_submission,
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hang_limit, timeout, timeout_wq, score, name,
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dev);
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}
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void xe_sched_fini(struct xe_gpu_scheduler *sched)
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{
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xe_sched_submission_stop(sched);
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drm_sched_fini(&sched->base);
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}
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void xe_sched_submission_start(struct xe_gpu_scheduler *sched)
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{
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drm_sched_wqueue_start(&sched->base);
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queue_work(sched->base.submit_wq, &sched->work_process_msg);
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}
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void xe_sched_submission_stop(struct xe_gpu_scheduler *sched)
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{
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drm_sched_wqueue_stop(&sched->base);
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cancel_work_sync(&sched->work_process_msg);
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}
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void xe_sched_submission_resume_tdr(struct xe_gpu_scheduler *sched)
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{
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drm_sched_resume_timeout(&sched->base, sched->base.timeout);
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}
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void xe_sched_add_msg(struct xe_gpu_scheduler *sched,
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struct xe_sched_msg *msg)
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{
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xe_sched_msg_lock(sched);
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xe_sched_add_msg_locked(sched, msg);
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xe_sched_msg_unlock(sched);
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}
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void xe_sched_add_msg_locked(struct xe_gpu_scheduler *sched,
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struct xe_sched_msg *msg)
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{
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lockdep_assert_held(&sched->base.job_list_lock);
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list_add_tail(&msg->link, &sched->msgs);
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xe_sched_process_msg_queue(sched);
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}
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