linux-yocto/drivers/gpu/drm/xe/xe_pt_walk.h
Thomas Hellström 8cb92dc730 drm/xe/pt: Allow for stricter type- and range checking
Distinguish between xe_pt and the xe_pt_dir subclass when
allocating and freeing. Also use a fixed-size array for the
xe_pt_dir page entries to make life easier for dynamic range-
checkers. Finally rename the page-directory child pointer array
to "children".

While no functional change, this fixes ubsan splats similar to:

[   51.463021] ------------[ cut here ]------------
[   51.463022] UBSAN: array-index-out-of-bounds in drivers/gpu/drm/xe/xe_pt.c:47:9
[   51.463023] index 0 is out of range for type 'xe_ptw *[*]'
[   51.463024] CPU: 5 PID: 2778 Comm: xe_vm Tainted: G     U             6.8.0-rc1+ #218
[   51.463026] Hardware name: ASUS System Product Name/PRIME B560M-A AC, BIOS 2001 02/01/2023
[   51.463027] Call Trace:
[   51.463028]  <TASK>
[   51.463029]  dump_stack_lvl+0x47/0x60
[   51.463030]  __ubsan_handle_out_of_bounds+0x95/0xd0
[   51.463032]  xe_pt_destroy+0xa5/0x150 [xe]
[   51.463088]  __xe_pt_unbind_vma+0x36c/0x9b0 [xe]
[   51.463144]  xe_vm_unbind+0xd8/0x580 [xe]
[   51.463204]  ? drm_exec_prepare_obj+0x3f/0x60 [drm_exec]
[   51.463208]  __xe_vma_op_execute+0x5da/0x910 [xe]
[   51.463268]  ? __drm_gpuvm_sm_unmap+0x1cb/0x220 [drm_gpuvm]
[   51.463272]  ? radix_tree_node_alloc.constprop.0+0x89/0xc0
[   51.463275]  ? drm_gpuva_it_remove+0x1f3/0x2a0 [drm_gpuvm]
[   51.463279]  ? drm_gpuva_remove+0x2f/0xc0 [drm_gpuvm]
[   51.463283]  xe_vm_bind_ioctl+0x1a55/0x20b0 [xe]
[   51.463344]  ? __pfx_xe_vm_bind_ioctl+0x10/0x10 [xe]
[   51.463414]  drm_ioctl_kernel+0xb6/0x120
[   51.463416]  drm_ioctl+0x287/0x4e0
[   51.463418]  ? __pfx_xe_vm_bind_ioctl+0x10/0x10 [xe]
[   51.463481]  __x64_sys_ioctl+0x94/0xd0
[   51.463484]  do_syscall_64+0x86/0x170
[   51.463486]  ? syscall_exit_to_user_mode+0x7d/0x200
[   51.463488]  ? do_syscall_64+0x96/0x170
[   51.463490]  ? do_syscall_64+0x96/0x170
[   51.463492]  entry_SYSCALL_64_after_hwframe+0x6e/0x76
[   51.463494] RIP: 0033:0x7f246bfe817d
[   51.463498] Code: 04 25 28 00 00 00 48 89 45 c8 31 c0 48 8d 45 10 c7 45 b0 10 00 00 00 48 89 45 b8 48 8d 45 d0 48 89 45 c0 b8 10 00 00 00 0f 05 <89> c2 3d 00 f0 ff ff 77 1a 48 8b 45 c8 64 48 2b 04 25 28 00 00 00
[   51.463501] RSP: 002b:00007ffc1bd19ad0 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
[   51.463502] RAX: ffffffffffffffda RBX: 0000000000000003 RCX: 00007f246bfe817d
[   51.463504] RDX: 00007ffc1bd19b60 RSI: 0000000040886445 RDI: 0000000000000003
[   51.463505] RBP: 00007ffc1bd19b20 R08: 0000000000000000 R09: 0000000000000000
[   51.463506] R10: 0000000000000000 R11: 0000000000000246 R12: 00007ffc1bd19b60
[   51.463508] R13: 0000000040886445 R14: 0000000000000003 R15: 0000000000010000
[   51.463510]  </TASK>
[   51.463517] ---[ end trace ]---

v2
- Fix kerneldoc warning (Matthew Brost)

Fixes: dd08ebf6c3 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240209112655.4872-1-thomas.hellstrom@linux.intel.com
(cherry picked from commit 157261c58b)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2024-02-15 09:53:18 +01:00

149 lines
4.3 KiB
C

/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright © 2022 Intel Corporation
*/
#ifndef __XE_PT_WALK__
#define __XE_PT_WALK__
#include <linux/pagewalk.h>
#include <linux/types.h>
/**
* struct xe_ptw - base class for driver pagetable subclassing.
* @children: Pointer to an array of children if any.
*
* Drivers could subclass this, and if it's a page-directory, typically
* embed an array of xe_ptw pointers.
*/
struct xe_ptw {
struct xe_ptw **children;
};
/**
* struct xe_pt_walk - Embeddable struct for walk parameters
*/
struct xe_pt_walk {
/** @ops: The walk ops used for the pagewalk */
const struct xe_pt_walk_ops *ops;
/**
* @shifts: Array of page-table entry shifts used for the
* different levels, starting out with the leaf level 0
* page-shift as the first entry. It's legal for this pointer to be
* changed during the walk.
*/
const u64 *shifts;
/** @max_level: Highest populated level in @sizes */
unsigned int max_level;
/**
* @shared_pt_mode: Whether to skip all entries that are private
* to the address range and called only for entries that are
* shared with other address ranges. Such entries are referred to
* as shared pagetables.
*/
bool shared_pt_mode;
};
/**
* typedef xe_pt_entry_fn - gpu page-table-walk callback-function
* @parent: The parent page.table.
* @offset: The offset (number of entries) into the page table.
* @level: The level of @parent.
* @addr: The virtual address.
* @next: The virtual address for the next call, or end address.
* @child: Pointer to pointer to child page-table at this @offset. The
* function may modify the value pointed to if, for example, allocating a
* child page table.
* @action: The walk action to take upon return. See <linux/pagewalk.h>.
* @walk: The walk parameters.
*/
typedef int (*xe_pt_entry_fn)(struct xe_ptw *parent, pgoff_t offset,
unsigned int level, u64 addr, u64 next,
struct xe_ptw **child,
enum page_walk_action *action,
struct xe_pt_walk *walk);
/**
* struct xe_pt_walk_ops - Walk callbacks.
*/
struct xe_pt_walk_ops {
/**
* @pt_entry: Callback to be called for each page table entry prior
* to descending to the next level. The returned value of the action
* function parameter is honored.
*/
xe_pt_entry_fn pt_entry;
/**
* @pt_post_descend: Callback to be called for each page table entry
* after return from descending to the next level. The returned value
* of the action function parameter is ignored.
*/
xe_pt_entry_fn pt_post_descend;
};
int xe_pt_walk_range(struct xe_ptw *parent, unsigned int level,
u64 addr, u64 end, struct xe_pt_walk *walk);
int xe_pt_walk_shared(struct xe_ptw *parent, unsigned int level,
u64 addr, u64 end, struct xe_pt_walk *walk);
/**
* xe_pt_covers - Whether the address range covers an entire entry in @level
* @addr: Start of the range.
* @end: End of range + 1.
* @level: Page table level.
* @walk: Page table walk info.
*
* This function is a helper to aid in determining whether a leaf page table
* entry can be inserted at this @level.
*
* Return: Whether the range provided covers exactly an entry at this level.
*/
static inline bool xe_pt_covers(u64 addr, u64 end, unsigned int level,
const struct xe_pt_walk *walk)
{
u64 pt_size = 1ull << walk->shifts[level];
return end - addr == pt_size && IS_ALIGNED(addr, pt_size);
}
/**
* xe_pt_num_entries: Number of page-table entries of a given range at this
* level
* @addr: Start address.
* @end: End address.
* @level: Page table level.
* @walk: Walk info.
*
* Return: The number of page table entries at this level between @start and
* @end.
*/
static inline pgoff_t
xe_pt_num_entries(u64 addr, u64 end, unsigned int level,
const struct xe_pt_walk *walk)
{
u64 pt_size = 1ull << walk->shifts[level];
return (round_up(end, pt_size) - round_down(addr, pt_size)) >>
walk->shifts[level];
}
/**
* xe_pt_offset: Offset of the page-table entry for a given address.
* @addr: The address.
* @level: Page table level.
* @walk: Walk info.
*
* Return: The page table entry offset for the given address in a
* page table with size indicated by @level.
*/
static inline pgoff_t
xe_pt_offset(u64 addr, unsigned int level, const struct xe_pt_walk *walk)
{
if (level < walk->max_level)
addr &= ((1ull << walk->shifts[level + 1]) - 1);
return addr >> walk->shifts[level];
}
#endif