mirror of
git://git.yoctoproject.org/linux-yocto.git
synced 2025-08-21 16:31:14 +02:00
fad8afdcc1
tldr; Just FYI, I'm carrying this on the perf tools tree.
Full explanation:
There used to be no copies, with tools/ code using kernel headers
directly. From time to time tools/perf/ broke due to legitimate kernel
hacking. At some point Linus complained about such direct usage. Then we
adopted the current model.
The way these headers are used in perf are not restricted to just
including them to compile something.
There are sometimes used in scripts that convert defines into string
tables, etc, so some change may break one of these scripts, or new MSRs
may use some different #define pattern, etc.
E.g.:
$ ls -1 tools/perf/trace/beauty/*.sh | head -5
tools/perf/trace/beauty/arch_errno_names.sh
tools/perf/trace/beauty/drm_ioctl.sh
tools/perf/trace/beauty/fadvise.sh
tools/perf/trace/beauty/fsconfig.sh
tools/perf/trace/beauty/fsmount.sh
$
$ tools/perf/trace/beauty/fadvise.sh
static const char *fadvise_advices[] = {
[0] = "NORMAL",
[1] = "RANDOM",
[2] = "SEQUENTIAL",
[3] = "WILLNEED",
[4] = "DONTNEED",
[5] = "NOREUSE",
};
$
The tools/perf/check-headers.sh script, part of the tools/ build
process, points out changes in the original files.
So its important not to touch the copies in tools/ when doing changes in
the original kernel headers, that will be done later, when
check-headers.sh inform about the change to the perf tools hackers.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20231121225650.390246-9-namhyung@kernel.org
49 lines
1.0 KiB
C
49 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
|
#ifndef _ASM_ARM64_PERF_REGS_H
|
|
#define _ASM_ARM64_PERF_REGS_H
|
|
|
|
enum perf_event_arm_regs {
|
|
PERF_REG_ARM64_X0,
|
|
PERF_REG_ARM64_X1,
|
|
PERF_REG_ARM64_X2,
|
|
PERF_REG_ARM64_X3,
|
|
PERF_REG_ARM64_X4,
|
|
PERF_REG_ARM64_X5,
|
|
PERF_REG_ARM64_X6,
|
|
PERF_REG_ARM64_X7,
|
|
PERF_REG_ARM64_X8,
|
|
PERF_REG_ARM64_X9,
|
|
PERF_REG_ARM64_X10,
|
|
PERF_REG_ARM64_X11,
|
|
PERF_REG_ARM64_X12,
|
|
PERF_REG_ARM64_X13,
|
|
PERF_REG_ARM64_X14,
|
|
PERF_REG_ARM64_X15,
|
|
PERF_REG_ARM64_X16,
|
|
PERF_REG_ARM64_X17,
|
|
PERF_REG_ARM64_X18,
|
|
PERF_REG_ARM64_X19,
|
|
PERF_REG_ARM64_X20,
|
|
PERF_REG_ARM64_X21,
|
|
PERF_REG_ARM64_X22,
|
|
PERF_REG_ARM64_X23,
|
|
PERF_REG_ARM64_X24,
|
|
PERF_REG_ARM64_X25,
|
|
PERF_REG_ARM64_X26,
|
|
PERF_REG_ARM64_X27,
|
|
PERF_REG_ARM64_X28,
|
|
PERF_REG_ARM64_X29,
|
|
PERF_REG_ARM64_LR,
|
|
PERF_REG_ARM64_SP,
|
|
PERF_REG_ARM64_PC,
|
|
PERF_REG_ARM64_MAX,
|
|
|
|
/* Extended/pseudo registers */
|
|
PERF_REG_ARM64_VG = 46, /* SVE Vector Granule */
|
|
PERF_REG_ARM64_EXTENDED_MAX
|
|
};
|
|
|
|
#define PERF_REG_EXTENDED_MASK (1ULL << PERF_REG_ARM64_VG)
|
|
|
|
#endif /* _ASM_ARM64_PERF_REGS_H */
|