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1506af6db8
v0.1 HW_ID packets have a new field that describes which sink each CPU writes to. Use the sink ID to link trace ID maps to each other so that mappings are shared wherever the sink is shared. Also update the error message to show that overlapping IDs aren't an error in per-thread mode, just not supported. In the future we can use the CPU ID from the AUX records, or watch for changing sink IDs on HW_ID packets to use the correct decoders. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> Cc: Ian Rogers <irogers@google.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linux.dev> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20240722101202.26915-7-james.clark@linaro.org Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
70 lines
2.3 KiB
C
70 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright(C) 2015 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*/
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#ifndef _LINUX_CORESIGHT_PMU_H
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#define _LINUX_CORESIGHT_PMU_H
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#include <linux/bits.h>
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#define CORESIGHT_ETM_PMU_NAME "cs_etm"
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/*
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* The legacy Trace ID system based on fixed calculation from the cpu
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* number. This has been replaced by drivers using a dynamic allocation
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* system - but need to retain the legacy algorithm for backward comparibility
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* in certain situations:-
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* a) new perf running on older systems that generate the legacy mapping
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* b) older tools that may not update at the same time as the kernel.
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*/
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#define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) (0x10 + (cpu * 2))
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/*
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* Below are the definition of bit offsets for perf option, and works as
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* arbitrary values for all ETM versions.
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*
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* Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
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* ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
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* directly use below macros as config bits.
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*/
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#define ETM_OPT_BRANCH_BROADCAST 8
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#define ETM_OPT_CYCACC 12
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#define ETM_OPT_CTXTID 14
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#define ETM_OPT_CTXTID2 15
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#define ETM_OPT_TS 28
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#define ETM_OPT_RETSTK 29
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/* ETMv4 CONFIGR programming bits for the ETM OPTs */
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#define ETM4_CFG_BIT_BB 3
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#define ETM4_CFG_BIT_CYCACC 4
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#define ETM4_CFG_BIT_CTXTID 6
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#define ETM4_CFG_BIT_VMID 7
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#define ETM4_CFG_BIT_TS 11
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#define ETM4_CFG_BIT_RETSTK 12
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#define ETM4_CFG_BIT_VMID_OPT 15
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/*
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* Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.
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* Used to associate a CPU with the CoreSight Trace ID.
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* [07:00] - Trace ID - uses 8 bits to make value easy to read in file.
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* [39:08] - Sink ID - as reported in /sys/bus/event_source/devices/cs_etm/sinks/
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* Added in minor version 1.
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* [55:40] - Unused (SBZ)
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* [59:56] - Minor Version - previously existing fields are compatible with
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* all minor versions.
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* [63:60] - Major Version - previously existing fields mean different things
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* in new major versions.
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*/
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#define CS_AUX_HW_ID_TRACE_ID_MASK GENMASK_ULL(7, 0)
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#define CS_AUX_HW_ID_SINK_ID_MASK GENMASK_ULL(39, 8)
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#define CS_AUX_HW_ID_MINOR_VERSION_MASK GENMASK_ULL(59, 56)
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#define CS_AUX_HW_ID_MAJOR_VERSION_MASK GENMASK_ULL(63, 60)
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#define CS_AUX_HW_ID_MAJOR_VERSION 0
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#define CS_AUX_HW_ID_MINOR_VERSION 1
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#endif
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